1 /*
2 * Device Tree Source for AM33XX SoC
3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This file is licensed under the terms of the GNU General Public License
7 * version 2. This program is licensed "as is" without any warranty of any
8 * kind, whether express or implied.
9 */
11 #include <dt-bindings/gpio/gpio.h>
12 #include <dt-bindings/pinctrl/am33xx.h>
14 #include "skeleton.dtsi"
16 / {
17 compatible = "ti,am33xx";
18 interrupt-parent = <&intc>;
20 aliases {
21 i2c0 = &i2c0;
22 i2c1 = &i2c1;
23 i2c2 = &i2c2;
24 serial0 = &uart0;
25 serial1 = &uart1;
26 serial2 = &uart2;
27 serial3 = &uart3;
28 serial4 = &uart4;
29 serial5 = &uart5;
30 d_can0 = &dcan0;
31 d_can1 = &dcan1;
32 usb0 = &usb0;
33 usb1 = &usb1;
34 phy0 = &usb0_phy;
35 phy1 = &usb1_phy;
36 ethernet0 = &cpsw_emac0;
37 ethernet1 = &cpsw_emac1;
38 };
40 cpus {
41 #address-cells = <1>;
42 #size-cells = <0>;
43 cpu@0 {
44 compatible = "arm,cortex-a8";
45 device_type = "cpu";
46 reg = <0>;
48 voltage-tolerance = <2>; /* 2 percentage */
50 clocks = <&dpll_mpu_ck>;
51 clock-names = "cpu";
53 clock-latency = <300000>; /* From omap-cpufreq driver */
54 };
55 };
57 pmu {
58 compatible = "arm,cortex-a8-pmu";
59 interrupts = <3>;
60 };
62 /*
63 * The soc node represents the soc top level view. It is used for IPs
64 * that are not memory mapped in the MPU view or for the MPU itself.
65 */
66 soc {
67 compatible = "ti,omap-infra";
68 mpu {
69 compatible = "ti,omap3-mpu";
70 ti,hwmods = "mpu";
71 sram = <&ocmcram>;
72 };
73 };
75 /*
76 * XXX: Use a flat representation of the AM33XX interconnect.
77 * The real AM33XX interconnect network is quite complex. Since
78 * it will not bring real advantage to represent that in DT
79 * for the moment, just use a fake OCP bus entry to represent
80 * the whole bus hierarchy.
81 */
82 ocp {
83 compatible = "simple-bus";
84 #address-cells = <1>;
85 #size-cells = <1>;
86 ranges;
87 ti,hwmods = "l3_main";
89 l4_wkup: l4_wkup@44c00000 {
90 compatible = "ti,am3-l4-wkup", "simple-bus";
91 #address-cells = <1>;
92 #size-cells = <1>;
93 ranges = <0 0x44c00000 0x280000>;
95 wkup_m3: wkup_m3@100000 {
96 compatible = "ti,am3352-wkup-m3";
97 reg = <0x100000 0x4000>,
98 <0x180000 0x2000>;
99 reg-names = "umem", "dmem";
100 ti,hwmods = "wkup_m3";
101 ti,pm-firmware = "am335x-pm-firmware.elf";
102 };
104 prcm: prcm@200000 {
105 compatible = "ti,am3-prcm";
106 reg = <0x200000 0x4000>;
108 prcm_clocks: clocks {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 };
113 prcm_clockdomains: clockdomains {
114 };
115 };
117 scm: scm@210000 {
118 compatible = "ti,am3-scm", "simple-bus";
119 reg = <0x210000 0x2000>;
120 #address-cells = <1>;
121 #size-cells = <1>;
122 ranges = <0 0x210000 0x2000>;
124 am33xx_pinmux: pinmux@800 {
125 compatible = "pinctrl-single";
126 reg = <0x800 0x238>;
127 #address-cells = <1>;
128 #size-cells = <0>;
129 pinctrl-single,register-width = <32>;
130 pinctrl-single,function-mask = <0x7f>;
131 };
133 scm_conf: scm_conf@0 {
134 compatible = "syscon";
135 reg = <0x0 0x800>;
136 #address-cells = <1>;
137 #size-cells = <1>;
139 scm_clocks: clocks {
140 #address-cells = <1>;
141 #size-cells = <0>;
142 };
143 };
145 wkup_m3_ipc: wkup_m3_ipc@1324 {
146 compatible = "ti,am3352-wkup-m3-ipc";
147 reg = <0x1324 0x24>;
148 interrupts = <78>;
149 ti,rproc = <&wkup_m3>;
150 mboxes = <&mailbox &mbox_wkupm3>;
151 };
153 scm_clockdomains: clockdomains {
154 };
155 };
156 };
158 intc: interrupt-controller@48200000 {
159 compatible = "ti,am33xx-intc";
160 interrupt-controller;
161 #interrupt-cells = <1>;
162 reg = <0x48200000 0x1000>;
163 };
165 edma: edma@49000000 {
166 compatible = "ti,edma3";
167 ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
168 reg = <0x49000000 0x10000>,
169 <0x44e10f90 0x40>;
170 interrupts = <12 13 14>;
171 #dma-cells = <1>;
172 };
174 emif: emif@4c000000 {
175 compatible = "ti,emif-am3352";
176 reg = <0x4C000000 0x1000>;
177 sram = <&ocmcram>;
178 };
180 gpio0: gpio@44e07000 {
181 compatible = "ti,omap4-gpio";
182 ti,hwmods = "gpio1";
183 gpio-controller;
184 #gpio-cells = <2>;
185 interrupt-controller;
186 #interrupt-cells = <2>;
187 reg = <0x44e07000 0x1000>;
188 interrupts = <96>;
189 };
191 gpio1: gpio@4804c000 {
192 compatible = "ti,omap4-gpio";
193 ti,hwmods = "gpio2";
194 gpio-controller;
195 #gpio-cells = <2>;
196 interrupt-controller;
197 #interrupt-cells = <2>;
198 reg = <0x4804c000 0x1000>;
199 interrupts = <98>;
200 };
202 gpio2: gpio@481ac000 {
203 compatible = "ti,omap4-gpio";
204 ti,hwmods = "gpio3";
205 gpio-controller;
206 #gpio-cells = <2>;
207 interrupt-controller;
208 #interrupt-cells = <2>;
209 reg = <0x481ac000 0x1000>;
210 interrupts = <32>;
211 };
213 gpio3: gpio@481ae000 {
214 compatible = "ti,omap4-gpio";
215 ti,hwmods = "gpio4";
216 gpio-controller;
217 #gpio-cells = <2>;
218 interrupt-controller;
219 #interrupt-cells = <2>;
220 reg = <0x481ae000 0x1000>;
221 interrupts = <62>;
222 };
224 uart0: serial@44e09000 {
225 compatible = "ti,am3352-uart", "ti,omap3-uart";
226 ti,hwmods = "uart1";
227 clock-frequency = <48000000>;
228 reg = <0x44e09000 0x2000>;
229 interrupts = <72>;
230 status = "disabled";
231 dmas = <&edma 26>, <&edma 27>;
232 dma-names = "tx", "rx";
233 };
235 uart1: serial@48022000 {
236 compatible = "ti,am3352-uart", "ti,omap3-uart";
237 ti,hwmods = "uart2";
238 clock-frequency = <48000000>;
239 reg = <0x48022000 0x2000>;
240 interrupts = <73>;
241 status = "disabled";
242 dmas = <&edma 28>, <&edma 29>;
243 dma-names = "tx", "rx";
244 };
246 uart2: serial@48024000 {
247 compatible = "ti,am3352-uart", "ti,omap3-uart";
248 ti,hwmods = "uart3";
249 clock-frequency = <48000000>;
250 reg = <0x48024000 0x2000>;
251 interrupts = <74>;
252 status = "disabled";
253 dmas = <&edma 30>, <&edma 31>;
254 dma-names = "tx", "rx";
255 };
257 uart3: serial@481a6000 {
258 compatible = "ti,am3352-uart", "ti,omap3-uart";
259 ti,hwmods = "uart4";
260 clock-frequency = <48000000>;
261 reg = <0x481a6000 0x2000>;
262 interrupts = <44>;
263 status = "disabled";
264 };
266 uart4: serial@481a8000 {
267 compatible = "ti,am3352-uart", "ti,omap3-uart";
268 ti,hwmods = "uart5";
269 clock-frequency = <48000000>;
270 reg = <0x481a8000 0x2000>;
271 interrupts = <45>;
272 status = "disabled";
273 };
275 uart5: serial@481aa000 {
276 compatible = "ti,am3352-uart", "ti,omap3-uart";
277 ti,hwmods = "uart6";
278 clock-frequency = <48000000>;
279 reg = <0x481aa000 0x2000>;
280 interrupts = <46>;
281 status = "disabled";
282 };
284 i2c0: i2c@44e0b000 {
285 compatible = "ti,omap4-i2c";
286 #address-cells = <1>;
287 #size-cells = <0>;
288 ti,hwmods = "i2c1";
289 reg = <0x44e0b000 0x1000>;
290 interrupts = <70>;
291 status = "disabled";
292 };
294 i2c1: i2c@4802a000 {
295 compatible = "ti,omap4-i2c";
296 #address-cells = <1>;
297 #size-cells = <0>;
298 ti,hwmods = "i2c2";
299 reg = <0x4802a000 0x1000>;
300 interrupts = <71>;
301 status = "disabled";
302 };
304 i2c2: i2c@4819c000 {
305 compatible = "ti,omap4-i2c";
306 #address-cells = <1>;
307 #size-cells = <0>;
308 ti,hwmods = "i2c3";
309 reg = <0x4819c000 0x1000>;
310 interrupts = <30>;
311 status = "disabled";
312 };
314 mmc1: mmc@48060000 {
315 compatible = "ti,omap4-hsmmc";
316 ti,hwmods = "mmc1";
317 ti,dual-volt;
318 ti,needs-special-reset;
319 ti,needs-special-hs-handling;
320 dmas = <&edma 24
321 &edma 25>;
322 dma-names = "tx", "rx";
323 interrupts = <64>;
324 interrupt-parent = <&intc>;
325 reg = <0x48060000 0x1000>;
326 status = "disabled";
327 };
329 mmc2: mmc@481d8000 {
330 compatible = "ti,omap4-hsmmc";
331 ti,hwmods = "mmc2";
332 ti,needs-special-reset;
333 dmas = <&edma 2
334 &edma 3>;
335 dma-names = "tx", "rx";
336 interrupts = <28>;
337 interrupt-parent = <&intc>;
338 reg = <0x481d8000 0x1000>;
339 status = "disabled";
340 };
342 mmc3: mmc@47810000 {
343 compatible = "ti,omap4-hsmmc";
344 ti,hwmods = "mmc3";
345 ti,needs-special-reset;
346 interrupts = <29>;
347 interrupt-parent = <&intc>;
348 reg = <0x47810000 0x1000>;
349 status = "disabled";
350 };
352 hwspinlock: spinlock@480ca000 {
353 compatible = "ti,omap4-hwspinlock";
354 reg = <0x480ca000 0x1000>;
355 ti,hwmods = "spinlock";
356 #hwlock-cells = <1>;
357 };
359 wdt2: wdt@44e35000 {
360 compatible = "ti,omap3-wdt";
361 ti,hwmods = "wd_timer2";
362 reg = <0x44e35000 0x1000>;
363 interrupts = <91>;
364 };
366 dcan0: can@481cc000 {
367 compatible = "ti,am3352-d_can";
368 ti,hwmods = "d_can0";
369 reg = <0x481cc000 0x2000>;
370 clocks = <&dcan0_fck>;
371 clock-names = "fck";
372 syscon-raminit = <&scm_conf 0x644 0>;
373 interrupts = <52>;
374 status = "disabled";
375 };
377 dcan1: can@481d0000 {
378 compatible = "ti,am3352-d_can";
379 ti,hwmods = "d_can1";
380 reg = <0x481d0000 0x2000>;
381 clocks = <&dcan1_fck>;
382 clock-names = "fck";
383 syscon-raminit = <&scm_conf 0x644 1>;
384 interrupts = <55>;
385 status = "disabled";
386 };
388 mailbox: mailbox@480C8000 {
389 compatible = "ti,omap4-mailbox";
390 reg = <0x480C8000 0x200>;
391 interrupts = <77>;
392 ti,hwmods = "mailbox";
393 #mbox-cells = <1>;
394 ti,mbox-num-users = <4>;
395 ti,mbox-num-fifos = <8>;
396 mbox_wkupm3: wkup_m3 {
397 ti,mbox-send-noirq;
398 ti,mbox-tx = <0 0 0>;
399 ti,mbox-rx = <0 0 3>;
400 };
401 mbox_pru0: mbox_pru0 {
402 ti,mbox-tx = <2 0 0>;
403 ti,mbox-rx = <3 0 0>;
404 };
405 mbox_pru1: mbox_pru1 {
406 ti,mbox-tx = <4 0 0>;
407 ti,mbox-rx = <5 0 0>;
408 };
409 };
411 timer1: timer@44e31000 {
412 compatible = "ti,am335x-timer-1ms";
413 reg = <0x44e31000 0x400>;
414 interrupts = <67>;
415 ti,hwmods = "timer1";
416 ti,timer-alwon;
417 };
419 timer2: timer@48040000 {
420 compatible = "ti,am335x-timer";
421 reg = <0x48040000 0x400>;
422 interrupts = <68>;
423 ti,hwmods = "timer2";
424 };
426 timer3: timer@48042000 {
427 compatible = "ti,am335x-timer";
428 reg = <0x48042000 0x400>;
429 interrupts = <69>;
430 ti,hwmods = "timer3";
431 };
433 timer4: timer@48044000 {
434 compatible = "ti,am335x-timer";
435 reg = <0x48044000 0x400>;
436 interrupts = <92>;
437 ti,hwmods = "timer4";
438 ti,timer-pwm;
439 };
441 timer5: timer@48046000 {
442 compatible = "ti,am335x-timer";
443 reg = <0x48046000 0x400>;
444 interrupts = <93>;
445 ti,hwmods = "timer5";
446 ti,timer-pwm;
447 };
449 timer6: timer@48048000 {
450 compatible = "ti,am335x-timer";
451 reg = <0x48048000 0x400>;
452 interrupts = <94>;
453 ti,hwmods = "timer6";
454 ti,timer-pwm;
455 };
457 timer7: timer@4804a000 {
458 compatible = "ti,am335x-timer";
459 reg = <0x4804a000 0x400>;
460 interrupts = <95>;
461 ti,hwmods = "timer7";
462 ti,timer-pwm;
463 };
465 rtc: rtc@44e3e000 {
466 compatible = "ti,am3352-rtc", "ti,da830-rtc";
467 reg = <0x44e3e000 0x1000>;
468 interrupts = <75
469 76>;
470 ti,hwmods = "rtc";
471 };
473 spi0: spi@48030000 {
474 compatible = "ti,omap4-mcspi";
475 #address-cells = <1>;
476 #size-cells = <0>;
477 reg = <0x48030000 0x400>;
478 interrupts = <65>;
479 ti,spi-num-cs = <2>;
480 ti,hwmods = "spi0";
481 dmas = <&edma 16
482 &edma 17
483 &edma 18
484 &edma 19>;
485 dma-names = "tx0", "rx0", "tx1", "rx1";
486 status = "disabled";
487 };
489 spi1: spi@481a0000 {
490 compatible = "ti,omap4-mcspi";
491 #address-cells = <1>;
492 #size-cells = <0>;
493 reg = <0x481a0000 0x400>;
494 interrupts = <125>;
495 ti,spi-num-cs = <2>;
496 ti,hwmods = "spi1";
497 dmas = <&edma 42
498 &edma 43
499 &edma 44
500 &edma 45>;
501 dma-names = "tx0", "rx0", "tx1", "rx1";
502 status = "disabled";
503 };
505 usb: usb@47400000 {
506 compatible = "ti,am33xx-usb";
507 reg = <0x47400000 0x1000>;
508 ranges;
509 #address-cells = <1>;
510 #size-cells = <1>;
511 ti,hwmods = "usb_otg_hs";
512 status = "disabled";
514 usb_ctrl_mod: control@44e10620 {
515 compatible = "ti,am335x-usb-ctrl-module";
516 reg = <0x44e10620 0x10
517 0x44e10648 0x4>;
518 reg-names = "phy_ctrl", "wakeup";
519 status = "disabled";
520 };
522 usb0_phy: usb-phy@47401300 {
523 compatible = "ti,am335x-usb-phy";
524 reg = <0x47401300 0x100>;
525 reg-names = "phy";
526 status = "disabled";
527 ti,ctrl_mod = <&usb_ctrl_mod>;
528 };
530 usb0: usb@47401000 {
531 compatible = "ti,musb-am33xx";
532 status = "disabled";
533 reg = <0x47401400 0x400
534 0x47401000 0x200>;
535 reg-names = "mc", "control";
537 interrupts = <18>;
538 interrupt-names = "mc";
539 dr_mode = "otg";
540 mentor,multipoint = <1>;
541 mentor,num-eps = <16>;
542 mentor,ram-bits = <12>;
543 mentor,power = <500>;
544 phys = <&usb0_phy>;
546 dmas = <&cppi41dma 0 0 &cppi41dma 1 0
547 &cppi41dma 2 0 &cppi41dma 3 0
548 &cppi41dma 4 0 &cppi41dma 5 0
549 &cppi41dma 6 0 &cppi41dma 7 0
550 &cppi41dma 8 0 &cppi41dma 9 0
551 &cppi41dma 10 0 &cppi41dma 11 0
552 &cppi41dma 12 0 &cppi41dma 13 0
553 &cppi41dma 14 0 &cppi41dma 0 1
554 &cppi41dma 1 1 &cppi41dma 2 1
555 &cppi41dma 3 1 &cppi41dma 4 1
556 &cppi41dma 5 1 &cppi41dma 6 1
557 &cppi41dma 7 1 &cppi41dma 8 1
558 &cppi41dma 9 1 &cppi41dma 10 1
559 &cppi41dma 11 1 &cppi41dma 12 1
560 &cppi41dma 13 1 &cppi41dma 14 1>;
561 dma-names =
562 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
563 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
564 "rx14", "rx15",
565 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
566 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
567 "tx14", "tx15";
568 };
570 usb1_phy: usb-phy@47401b00 {
571 compatible = "ti,am335x-usb-phy";
572 reg = <0x47401b00 0x100>;
573 reg-names = "phy";
574 status = "disabled";
575 ti,ctrl_mod = <&usb_ctrl_mod>;
576 };
578 usb1: usb@47401800 {
579 compatible = "ti,musb-am33xx";
580 status = "disabled";
581 reg = <0x47401c00 0x400
582 0x47401800 0x200>;
583 reg-names = "mc", "control";
584 interrupts = <19>;
585 interrupt-names = "mc";
586 dr_mode = "otg";
587 mentor,multipoint = <1>;
588 mentor,num-eps = <16>;
589 mentor,ram-bits = <12>;
590 mentor,power = <500>;
591 phys = <&usb1_phy>;
593 dmas = <&cppi41dma 15 0 &cppi41dma 16 0
594 &cppi41dma 17 0 &cppi41dma 18 0
595 &cppi41dma 19 0 &cppi41dma 20 0
596 &cppi41dma 21 0 &cppi41dma 22 0
597 &cppi41dma 23 0 &cppi41dma 24 0
598 &cppi41dma 25 0 &cppi41dma 26 0
599 &cppi41dma 27 0 &cppi41dma 28 0
600 &cppi41dma 29 0 &cppi41dma 15 1
601 &cppi41dma 16 1 &cppi41dma 17 1
602 &cppi41dma 18 1 &cppi41dma 19 1
603 &cppi41dma 20 1 &cppi41dma 21 1
604 &cppi41dma 22 1 &cppi41dma 23 1
605 &cppi41dma 24 1 &cppi41dma 25 1
606 &cppi41dma 26 1 &cppi41dma 27 1
607 &cppi41dma 28 1 &cppi41dma 29 1>;
608 dma-names =
609 "rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
610 "rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
611 "rx14", "rx15",
612 "tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
613 "tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
614 "tx14", "tx15";
615 };
617 cppi41dma: dma-controller@47402000 {
618 compatible = "ti,am3359-cppi41";
619 reg = <0x47400000 0x1000
620 0x47402000 0x1000
621 0x47403000 0x1000
622 0x47404000 0x4000>;
623 reg-names = "glue", "controller", "scheduler", "queuemgr";
624 interrupts = <17>;
625 interrupt-names = "glue";
626 #dma-cells = <2>;
627 #dma-channels = <30>;
628 #dma-requests = <256>;
629 status = "disabled";
630 };
631 };
633 epwmss0: epwmss@48300000 {
634 compatible = "ti,am33xx-pwmss";
635 reg = <0x48300000 0x10>;
636 ti,hwmods = "epwmss0";
637 #address-cells = <1>;
638 #size-cells = <1>;
639 status = "disabled";
640 ranges = <0x48300100 0x48300100 0x80 /* ECAP */
641 0x48300180 0x48300180 0x80 /* EQEP */
642 0x48300200 0x48300200 0x80>; /* EHRPWM */
644 ecap0: ecap@48300100 {
645 compatible = "ti,am33xx-ecap";
646 #pwm-cells = <3>;
647 reg = <0x48300100 0x80>;
648 interrupts = <31>;
649 interrupt-names = "ecap0";
650 ti,hwmods = "ecap0";
651 status = "disabled";
652 };
654 ehrpwm0: ehrpwm@48300200 {
655 compatible = "ti,am33xx-ehrpwm";
656 #pwm-cells = <3>;
657 reg = <0x48300200 0x80>;
658 ti,hwmods = "ehrpwm0";
659 status = "disabled";
660 };
661 };
663 epwmss1: epwmss@48302000 {
664 compatible = "ti,am33xx-pwmss";
665 reg = <0x48302000 0x10>;
666 ti,hwmods = "epwmss1";
667 #address-cells = <1>;
668 #size-cells = <1>;
669 status = "disabled";
670 ranges = <0x48302100 0x48302100 0x80 /* ECAP */
671 0x48302180 0x48302180 0x80 /* EQEP */
672 0x48302200 0x48302200 0x80>; /* EHRPWM */
674 ecap1: ecap@48302100 {
675 compatible = "ti,am33xx-ecap";
676 #pwm-cells = <3>;
677 reg = <0x48302100 0x80>;
678 interrupts = <47>;
679 interrupt-names = "ecap1";
680 ti,hwmods = "ecap1";
681 status = "disabled";
682 };
684 ehrpwm1: ehrpwm@48302200 {
685 compatible = "ti,am33xx-ehrpwm";
686 #pwm-cells = <3>;
687 reg = <0x48302200 0x80>;
688 ti,hwmods = "ehrpwm1";
689 status = "disabled";
690 };
691 };
693 epwmss2: epwmss@48304000 {
694 compatible = "ti,am33xx-pwmss";
695 reg = <0x48304000 0x10>;
696 ti,hwmods = "epwmss2";
697 #address-cells = <1>;
698 #size-cells = <1>;
699 status = "disabled";
700 ranges = <0x48304100 0x48304100 0x80 /* ECAP */
701 0x48304180 0x48304180 0x80 /* EQEP */
702 0x48304200 0x48304200 0x80>; /* EHRPWM */
704 ecap2: ecap@48304100 {
705 compatible = "ti,am33xx-ecap";
706 #pwm-cells = <3>;
707 reg = <0x48304100 0x80>;
708 interrupts = <61>;
709 interrupt-names = "ecap2";
710 ti,hwmods = "ecap2";
711 status = "disabled";
712 };
714 ehrpwm2: ehrpwm@48304200 {
715 compatible = "ti,am33xx-ehrpwm";
716 #pwm-cells = <3>;
717 reg = <0x48304200 0x80>;
718 ti,hwmods = "ehrpwm2";
719 status = "disabled";
720 };
721 };
723 mac: ethernet@4a100000 {
724 compatible = "ti,am335x-cpsw","ti,cpsw";
725 ti,hwmods = "cpgmac0";
726 clocks = <&cpsw_125mhz_gclk>, <&cpsw_cpts_rft_clk>;
727 clock-names = "fck", "cpts";
728 cpdma_channels = <8>;
729 ale_entries = <1024>;
730 bd_ram_size = <0x2000>;
731 no_bd_ram = <0>;
732 rx_descs = <64>;
733 mac_control = <0x20>;
734 slaves = <2>;
735 active_slave = <0>;
736 cpts_clock_mult = <0x80000000>;
737 cpts_clock_shift = <29>;
738 reg = <0x4a100000 0x800
739 0x4a101200 0x100>;
740 #address-cells = <1>;
741 #size-cells = <1>;
742 interrupt-parent = <&intc>;
743 /*
744 * c0_rx_thresh_pend
745 * c0_rx_pend
746 * c0_tx_pend
747 * c0_misc_pend
748 */
749 interrupts = <40 41 42 43>;
750 ranges;
751 syscon = <&scm_conf>;
752 status = "disabled";
754 davinci_mdio: mdio@4a101000 {
755 compatible = "ti,davinci_mdio";
756 #address-cells = <1>;
757 #size-cells = <0>;
758 ti,hwmods = "davinci_mdio";
759 bus_freq = <1000000>;
760 reg = <0x4a101000 0x100>;
761 status = "disabled";
762 };
764 cpsw_emac0: slave@4a100200 {
765 /* Filled in by U-Boot */
766 mac-address = [ 00 00 00 00 00 00 ];
767 };
769 cpsw_emac1: slave@4a100300 {
770 /* Filled in by U-Boot */
771 mac-address = [ 00 00 00 00 00 00 ];
772 };
774 phy_sel: cpsw-phy-sel@44e10650 {
775 compatible = "ti,am3352-cpsw-phy-sel";
776 reg= <0x44e10650 0x4>;
777 reg-names = "gmii-sel";
778 };
779 };
781 ocmcram: ocmcram@40300000 {
782 compatible = "mmio-sram";
783 reg = <0x40300000 0x10000>; /* 64k */
784 map-exec;
785 };
787 pruss: pruss@4a300000 {
788 compatible = "ti,am3352-pruss";
789 ti,hwmods = "pruss";
790 reg = <0x4a300000 0x2000>,
791 <0x4a302000 0x2000>,
792 <0x4a310000 0x3000>,
793 <0x4a320000 0x2000>,
794 <0x4a326000 0x2000>;
795 reg-names = "dram0", "dram1", "shrdram2", "intc", "cfg";
796 interrupts = <20 21 22 23 24 25 26 27>;
797 #address-cells = <1>;
798 #size-cells = <1>;
799 ranges;
801 pru0: pru@4a334000 {
802 compatible = "ti,am3352-pru-rproc";
803 reg = <0x4a334000 0x2000>,
804 <0x4a322000 0x400>,
805 <0x4a322400 0x100>;
806 reg-names = "iram", "control", "debug";
807 mboxes = <&mailbox &mbox_pru0>;
808 };
810 pru1: pru@4a338000 {
811 compatible = "ti,am3352-pru-rproc";
812 reg = <0x4a338000 0x2000>,
813 <0x4a324000 0x400>,
814 <0x4a324400 0x100>;
815 reg-names = "iram", "control", "debug";
816 mboxes = <&mailbox &mbox_pru1>;
817 };
818 };
820 elm: elm@48080000 {
821 compatible = "ti,am3352-elm";
822 reg = <0x48080000 0x2000>;
823 interrupts = <4>;
824 ti,hwmods = "elm";
825 status = "disabled";
826 };
828 lcdc: lcdc@4830e000 {
829 compatible = "ti,am33xx-tilcdc";
830 reg = <0x4830e000 0x1000>;
831 interrupt-parent = <&intc>;
832 interrupts = <36>;
833 ti,hwmods = "lcdc";
834 status = "disabled";
835 };
837 tscadc: tscadc@44e0d000 {
838 compatible = "ti,am3359-tscadc";
839 reg = <0x44e0d000 0x1000>;
840 interrupt-parent = <&intc>;
841 interrupts = <16>;
842 ti,hwmods = "adc_tsc";
843 status = "disabled";
845 tsc {
846 compatible = "ti,am3359-tsc";
847 };
848 am335x_adc: adc {
849 #io-channel-cells = <1>;
850 compatible = "ti,am3359-adc";
851 };
852 };
854 gpmc: gpmc@50000000 {
855 compatible = "ti,am3352-gpmc";
856 ti,hwmods = "gpmc";
857 ti,no-idle-on-init;
858 reg = <0x50000000 0x2000>;
859 interrupts = <100>;
860 dmas = <&edma 52>;
861 dma-names = "rxtx";
862 gpmc,num-cs = <7>;
863 gpmc,num-waitpins = <2>;
864 #address-cells = <2>;
865 #size-cells = <1>;
866 gpio-controller;
867 #gpio-cells = <2>;
868 interrupt-controller;
869 #interrupt-cells = <2>;
870 status = "disabled";
871 };
873 sham: sham@53100000 {
874 compatible = "ti,omap4-sham";
875 ti,hwmods = "sham";
876 reg = <0x53100000 0x200>;
877 interrupts = <109>;
878 dmas = <&edma 36>;
879 dma-names = "rx";
880 };
882 aes: aes@53500000 {
883 compatible = "ti,omap4-aes";
884 ti,hwmods = "aes";
885 reg = <0x53500000 0xa0>;
886 interrupts = <103>;
887 dmas = <&edma 6>,
888 <&edma 5>;
889 dma-names = "tx", "rx";
890 };
892 mcasp0: mcasp@48038000 {
893 compatible = "ti,am33xx-mcasp-audio";
894 ti,hwmods = "mcasp0";
895 reg = <0x48038000 0x2000>,
896 <0x46000000 0x400000>;
897 reg-names = "mpu", "dat";
898 interrupts = <80>, <81>;
899 interrupt-names = "tx", "rx";
900 status = "disabled";
901 dmas = <&edma 8>,
902 <&edma 9>;
903 dma-names = "tx", "rx";
904 };
906 mcasp1: mcasp@4803C000 {
907 compatible = "ti,am33xx-mcasp-audio";
908 ti,hwmods = "mcasp1";
909 reg = <0x4803C000 0x2000>,
910 <0x46400000 0x400000>;
911 reg-names = "mpu", "dat";
912 interrupts = <82>, <83>;
913 interrupt-names = "tx", "rx";
914 status = "disabled";
915 dmas = <&edma 10>,
916 <&edma 11>;
917 dma-names = "tx", "rx";
918 };
920 rng: rng@48310000 {
921 compatible = "ti,omap4-rng";
922 ti,hwmods = "rng";
923 reg = <0x48310000 0x2000>;
924 interrupts = <111>;
925 };
927 /*
928 * The SGX is disabled by default because it is an optional
929 * module and only some AM335x variants contain this module,
930 * such as AM3358 and AM3357. The status should be overwritten
931 * as "OK" at the corresponding board.dts.
932 */
933 sgx: sgx@0x56000000 {
934 compatible = "ti,am3352-sgx530", "img,sgx530";
935 ti,hwmods = "gfx";
936 reg = <0x56000000 0x1000000>;
937 interrupts = <37>;
938 status = "disabled";
939 };
940 };
941 };
943 /include/ "am33xx-clocks.dtsi"