diff options
Diffstat (limited to 'daemon/events-ARM11.xml')
-rw-r--r-- | daemon/events-ARM11.xml | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/daemon/events-ARM11.xml b/daemon/events-ARM11.xml index d4a2914..0a5ee66 100644 --- a/daemon/events-ARM11.xml +++ b/daemon/events-ARM11.xml | |||
@@ -1,9 +1,5 @@ | |||
1 | <counter_set name="ARM_ARM11_cntX"> | 1 | <counter_set name="ARM_ARM11_cnt" count="3"/> |
2 | <counter name="ARM_ARM11_cnt0"/> | 2 | <category name="ARM11" counter_set="ARM_ARM11_cnt" per_cpu="yes"> |
3 | <counter name="ARM_ARM11_cnt1"/> | ||
4 | <counter name="ARM_ARM11_cnt2"/> | ||
5 | </counter_set> | ||
6 | <category name="ARM11" counter_set="ARM_ARM11_cntX" per_cpu="yes"> | ||
7 | <event counter="ARM_ARM11_ccnt" title="Clock" name="Cycles" display="hertz" units="Hz" average_selection="yes" description="The number of core clock cycles"/> | 3 | <event counter="ARM_ARM11_ccnt" title="Clock" name="Cycles" display="hertz" units="Hz" average_selection="yes" description="The number of core clock cycles"/> |
8 | <event event="0x00" title="Cache" name="Inst miss" description="Instruction cache miss to a cacheable location, which requires a fetch from external memory"/> | 4 | <event event="0x00" title="Cache" name="Inst miss" description="Instruction cache miss to a cacheable location, which requires a fetch from external memory"/> |
9 | <event event="0x01" title="Pipeline" name="Instruction stall" description="Stall because instruction buffer cannot deliver an instruction"/> | 5 | <event event="0x01" title="Pipeline" name="Instruction stall" description="Stall because instruction buffer cannot deliver an instruction"/> |