/*
* Copyright (C) 2014 Texas Instruments Incorporated - http://www.ti.com/
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
/*
* Following are the carveout addresses and the sizes for ION. SMC is not reserved for now
* C0000000 - SDRAM+1G
* BFD00000 - SMC (3MB)
* BA300000 - ION (90MB)
* B4300000 - TILER SECURE (81 MB)
* B3400000 - TILER NONSECURE (15 MB)
*/
/memreserve/ 0xba300000 0x5a00000;
/memreserve/ 0xb5200000 0x5100000;
/memreserve/ 0xb4300000 0xf00000;
/*
* Memory is reserved for ipu1 for rearview camera
*/
/memreserve/ 0x8E000000 0x1000000;
/memreserve/ 0xA0000000 0x1800000;
/include/ "dra72x.dtsi"
/ {
model = "TI DRA722";
compatible = "ti,dra72-evm", "ti,dra722", "ti,dra72", "ti,dra7";
cpus {
cpu@0 {
cpu0-supply = <&abb_mpu>;
operating-points = <
/* kHz uV */
/* The OPP_HIGH Only for DVFS enabled Samples */
/* OPP_OD need to be enabled only for Refreshed poly fixed Samples */
/* dieID reg: 0x4AE0C20C FT_Rev bits[15:8] should be 5 or more to enable OPP_OD */
1000000 1090000
1176000 1210000
1500000 1280000
>;
clocks = <&dpll_mpu_ck>;
clock-names = "cpu";
/*
* Transition latency reference from omap5.
* TBD: to be instrumented and use the actual
* value at later point of time
*/
clock-latency = <300000>;
timer {
compatible = "arm,armv7-timer";
/*
* PPI secure/nonsecure IRQ,
* active low level-sensitive
*/
interrupts = <1 13 0x308>,
<1 14 0x308>;
clock-frequency = <6144000>;
};
};
};
memory {
device_type = "memory";
reg = <0x80000000 0x40000000>; /* 1024 MB */
};
vmmc2_fixed: fixedregulator-mmc2 {
compatible = "regulator-fixed";
regulator-name = "vmmc2_fixed";
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
};
ion_config {
compatible = "ti,ion-omap";
ti,omap_ion_heap_secure_input_base = <0xba300000>;
ti,omap_ion_heap_tiler_base = <0xb5200000>;
ti,omap_ion_heap_nonsecure_tiler_base = <0xb4300000>;
/*90 MB*/
ti,omap_ion_heap_secure_input_size = <0x5A00000>;
/*81MB*/
ti,omap_ion_heap_tiler_size = <0x5100000>;
/*15 MB*/
ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>;
};
display_layout {
compatible = "ti, omap4-dsscomp";
ti,num_displays = <3>;
ti,default_display = "lcd";
};
vmmcwl_fixed: fixedregulator-mmcwl {
compatible = "regulator-fixed";
regulator-name = "vmmcwl_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
gpio = <&gpio5 8 0>; /* gpio5_8 */
startup-delay-us = <70000>;
enable-active-high;
};
wlcore {
compatible = "wlcore";
gpio = <135>;
};
vaudio_1v8: fixedregulator-vaudio-dig {
compatible = "regulator-fixed";
regulator-name = "vdac_fixed";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-boot-on;
};
vaudio_3v3: fixedregulator-vaudio-anlg {
compatible = "regulator-fixed";
regulator-name = "vdac_fixed";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
sound {
compatible = "ti,dra7-evm-sound";
ti,model = "dra7evm";
ti,always-on;
gpios = <&pcf_hdmi 1 0>;
/* Audio routing */
ti,audio-routing =
"LINE1L", "Line In",
"LINE1R", "Line In",
"MIC3L", "Mic Bias 2V",
"MIC3R", "Mic Bias 2V",
"Mic Bias 2V", "Main Mic",
"Headphone", "HPLOUT",
"Headphone", "HPROUT",
"Line Out", "LLOUT",
"Line Out", "RLOUT",
"J3A LINE1L", "JAMR3 Stereo Aux In",
"J3A LINE1R", "JAMR3 Stereo Aux In",
"J3B LINE1L", "JAMR3 Mono Mic 1",
"J3B LINE1R", "JAMR3 Mono Mic 2",
"JAMR3 Line Out 1", "J3A LLOUT",
"JAMR3 Line Out 1", "J3A RLOUT",
"JAMR3 Line Out 2", "J3B LLOUT",
"JAMR3 Line Out 2", "J3B RLOUT",
"JAMR3 Line Out 3", "J3C LLOUT",
"JAMR3 Line Out 3", "J3C RLOUT";
/* Media DAI link */
ti,media-cpu = <&mcasp3>;
ti,media-codec = <&tlv320aic3106>;
ti,media-mclk-freq = <11289600>;
ti,media-slots = <2>;
/* Multichannel DAI link */
ti,multichannel-cpu = <&mcasp6>;
ti,multichannel-codec-a = <&tlv320aic3106a>;
ti,multichannel-codec-b = <&tlv320aic3106b>;
ti,multichannel-codec-c = <&tlv320aic3106c>;
ti,multichannel-slots = <8>;
ti,multichannel-mclk-freq = <11289600>;
ti,multichannel-shared;
/* Bluetooth */
ti,bt-cpu = <&mcasp7>;
ti,bt-bclk-freq = <512000>;
/* Loopback */
ti,loopback-cpu = <&mcasp5>;
ti,loopback-mclk-freq = <11289600>;
ti,loopback-slots = <2>;
};
radio {
compatible = "ti,dra7xx_radio";
gpios = <&gpio6 20 0>;
radio_helper1 {
compatible = "ti,dra7xx_radio_subdev";
ti,hwmods = "mcasp2";
status = "okay";
};
};
sound_hdmi {
compatible = "ti,omap-hdmi-tpd12s015-audio";
ti,model = "OMAP5HDMI";
ti,hdmi_audio = <&hdmi>;
ti,level_shifter = <&tpd12s015>;
};
extcon1: gpio_usbvid_extcon1 {
compatible = "ti,gpio-usb-id";
gpios = <&pcf_lcd3 1 0>;
interrupt_mode = <0>;
dr_mode = "peripheral";
};
extcon2: gpio_usbvid_extcon2 {
compatible = "ti,gpio-usb-id";
gpios = <&pcf_lcd3 2 0>;
interrupt_mode = <0>;
dr_mode = "host";
};
kim {
compatible = "kim";
nshutdown_gpio = <132>;
dev_name = "/dev/ttyO2";
flow_cntrl = <1>;
baud_rate = <3686400>;
gpios = <&pcf_lcd3 14 0>; /* pcf8575@21 P16 */
};
btwilink {
compatible = "btwilink";
};
};
&dra7_pmx_core {
pinctrl-names = "default";
pinctrl-0 = <
&atl_pins
&mcasp3_pins
&mcasp6_pins
&mcasp7_pins
&vout1_pins
&usb_pins
&wl_pins
&wlirq_pins
&bt_uart3_pins
&radio_pins
>;
i2c1_pins: pinmux_i2c1_pins {
pinctrl-single,pins = <
0x400 0x60000 /* i2c1_sda */
0x404 0x60000 /* i2c1_scl */
>;
};
i2c2_pins: pinmux_i2c2_pins {
pinctrl-single,pins = <
0x408 0x60001 /* hdmi_sda INPUT | MODE1 */
0x40C 0x60001 /* hdmi_scl INPUT | MODE1 */
>;
};
i2c3_pins: pinmux_i2c3_pins {
pinctrl-single,pins = <
0x410 0x60000 /* i2c3_sda INPUT | MODE0 */
0x414 0x60000 /* i2c3_scl INPUT | MODE0 */
>;
};
i2c5_pins: pinmux_i2c5_pins {
pinctrl-single,pins = <
0x2b4 0x6000a /* i2c5_sda INPUT | MODE10 */
0x2b8 0x6000a /* i2c5_scl INPUT | MODE10 */
>;
};
usb_pins: pinmux_usb_pins {
pinctrl-single,pins = <
0x280 0xc0000 /* DRV1_VBUS SLEW | PULLDEN | MODE14 */
0x284 0xc0000 /* DRV2_VBUS SLEW | PULLDEN | MODE14 */
>;
};
wl_pins: pinmux_wl_pins {
pinctrl-single,pins = <
0x3e8 0x60003 /* MMC4_CLK: INPUTENABLE | PULLUP | MODE3 */
0x3ec 0x60003 /* MMC4_CMD: INPUTENABLE | PULLUP | MODE3 */
0x3f0 0x60003 /* MMC4_DAT0: INPUTENABLE | PULLUP | MODE3 */
0x3f4 0x60003 /* MMC4_DAT1: INPUTENABLE | PULLUP | MODE3 */
0x3f8 0x60003 /* MMC4_DAT2: INPUTENABLE | PULLUP | MODE3 */
0x3fc 0x60003 /* MMC4_DAT3: INPUTENABLE | PULLUP | MODE3 */
0x2cc 0x2000E /* WLAN_EN: OUTPUT | MODE14 */
>;
};
wlirq_pins: pinmux_wlirq_pins {
pinctrl-single,pins = <
0x2c8 0x106000E /* WLAN_IRQ: INPUT | WAKEUP_ENABLE | MODE 14 */
>;
};
bt_uart3_pins: pinmux_bt_uart3_pins {
pinctrl-single,pins = <
0x3c0 0x60001 /* uart3_rx.spi2_sclk: INPUT | PULLUP | MODE 1 */
0x3c4 0x1 /* uart3_tx.spi2.d1: OUTPUT | MODE 1 */
0x3c8 0x40001 /* uart3_rts.spi2.c0: OUTPUT | PULLUP | MODE 1 */
0x3cc 0x60001 /* uart3_cts.spi2.d0: INPUT | MODE 1 */
0x2bc 0xE /* BT_EN.gp5_4: OUTPUT | MODE 14 */
>;
};
dcan1_pins: pinmux_dcan1_pins {
pinctrl-single,pins = <
0x3d0 0x00000000 /* DCAN1_TX: MODE0 */
0x418 0x00000001 /* WAKEUP0: MODE1 */
>;
};
dcan2_pins: pinmux_dcan2_pins {
pinctrl-single,pins = <
0x288 0x00000002 /* DCAN2_TX: MODE2 */
0x28C 0x00060002 /* DCAN2_RX: MODE2 | INPUTENABLE | PULLUP */
>;
};
radio_pins: pinmux_radio_pins {
pinctrl-single,pins = <
0x02F4 0x40000 /* MCASP2_ACLKX: MODE0 */
0x02F8 0xc0000 /* MCASP2_AFSX: MODE0 */
0x0304 0x40000 /* MCASP2_AXR0: MODE0 */
0x0308 0x40000 /* MCASP2_AXR1: MODE0 */
0x030C 0xc0000 /* MCASP2_AXR2: MODE0 */
0x0310 0xc0000 /* MCASP2_AXR3: MODE0 */
0x0314 0x40000 /* MCASP2_AXR4: MODE0 */
0x0318 0x40000 /* MCASP2_AXR5: MODE0 */
0x031c 0x40000 /* MCASP2_AXR6: MODE0 */
0x0320 0x40000 /* MCASP2_AXR7: MODE0 */
0x0334 0x70004 /* I2C4_SDA: MODE4 */
0x0338 0x70004 /* I2C4_SCL: MODE4 */
0x02A0 0x5000e /* GPIO6_20: MODE14 */
>;
};
vout1_pins: pinmux_vout1_pins {
pinctrl-single,pins = <
0x1C8 0x0 /* vout1_clk OUTPUT | MODE0 */
0x1CC 0x0 /* vout1_de OUTPUT | MODE0 */
0x1D0 0x0 /* vout1_fld OUTPUT | MODE0 */
0x1D4 0x0 /* vout1_hsync OUTPUT | MODE0 */
0x1D8 0x0 /* vout1_vsync OUTPUT | MODE0 */
0x1DC 0x0 /* vout1_d0 OUTPUT | MODE0 */
0x1E0 0x0 /* vout1_d1 OUTPUT | MODE0 */
0x1E4 0x0 /* vout1_d2 OUTPUT | MODE0 */
0x1E8 0x0 /* vout1_d3 OUTPUT | MODE0 */
0x1EC 0x0 /* vout1_d4 OUTPUT | MODE0 */
0x1F0 0x0 /* vout1_d5 OUTPUT | MODE0 */
0x1F4 0x0 /* vout1_d6 OUTPUT | MODE0 */
0x1F8 0x0 /* vout1_d7 OUTPUT | MODE0 */
0x1FC 0x0 /* vout1_d8 OUTPUT | MODE0 */
0x200 0x0 /* vout1_d9 OUTPUT | MODE0 */
0x204 0x0 /* vout1_d10 OUTPUT | MODE0 */
0x208 0x0 /* vout1_d11 OUTPUT | MODE0 */
0x20C 0x0 /* vout1_d12 OUTPUT | MODE0 */
0x210 0x0 /* vout1_d13 OUTPUT | MODE0 */
0x214 0x0 /* vout1_d14 OUTPUT | MODE0 */
0x218 0x0 /* vout1_d15 OUTPUT | MODE0 */
0x21C 0x0 /* vout1_d16 OUTPUT | MODE0 */
0x220 0x0 /* vout1_d17 OUTPUT | MODE0 */
0x224 0x0 /* vout1_d18 OUTPUT | MODE0 */
0x228 0x0 /* vout1_d19 OUTPUT | MODE0 */
0x22C 0x0 /* vout1_d20 OUTPUT | MODE0 */
0x230 0x0 /* vout1_d21 OUTPUT | MODE0 */
0x234 0x0 /* vout1_d22 OUTPUT | MODE0 */
0x238 0x0 /* vout1_d23 OUTPUT | MODE0 */
>;
};
atl_pins: pinmux_atl_pins {
pinctrl-single,pins = <
0x298 0x00000005 /* xref_clk1.atl_clk1 OUTPUT | MODE5 */
0x29c 0x00000005 /* xref_clk2.atl_clk2 OUTPUT | MODE5 */
>;
};
vin1a_pins: pinmux_vin1a_pins {
pinctrl-single,pins = <
0x0DC 0x00040000 /* vin1a_clk0 OUTPUT | MODE0 */
0x0E4 0x00040000 /* vin1a_de0 OUTPUT | MODE0 */
0x0E8 0x00040000 /* vin1a_fld0 OUTPUT | MODE0 */
0x0EC 0x00040000 /* vin1a_hsync0 OUTPUT | MODE0 */
0x0F0 0x00040000 /* vin1a_vsync0 OUTPUT | MODE0 */
0x0F4 0x00040000 /* vin1a_d0 OUTPUT | MODE0 */
0x0F8 0x00040000 /* vin1a_d1 OUTPUT | MODE0 */
0x0FC 0x00040000 /* vin1a_d2 OUTPUT | MODE0 */
0x100 0x00040000 /* vin1a_d3 OUTPUT | MODE0 */
0x104 0x00040000 /* vin1a_d4 OUTPUT | MODE0 */
0x108 0x00040000 /* vin1a_d5 OUTPUT | MODE0 */
0x10C 0x00040000 /* vin1a_d6 OUTPUT | MODE0 */
0x110 0x00040000 /* vin1a_d7 OUTPUT | MODE0 */
0x114 0x00040000 /* vin1a_d8 OUTPUT | MODE0 */
0x118 0x00040000 /* vin1a_d9 OUTPUT | MODE0 */
0x11C 0x00040000 /* vin1a_d10 OUTPUT | MODE0 */
0x120 0x00040000 /* vin1a_d11 OUTPUT | MODE0 */
0x124 0x00040000 /* vin1a_d12 OUTPUT | MODE0 */
0x128 0x00040000 /* vin1a_d13 OUTPUT | MODE0 */
0x12C 0x00040000 /* vin1a_d14 OUTPUT | MODE0 */
0x130 0x00040000 /* vin1a_d15 OUTPUT | MODE0 */
0x134 0x00040000 /* vin1a_d16 OUTPUT | MODE0 */
0x138 0x00040000 /* vin1a_d17 OUTPUT | MODE0 */
0x13C 0x00040000 /* vin1a_d18 OUTPUT | MODE0 */
0x140 0x00040000 /* vin1a_d19 OUTPUT | MODE0 */
0x144 0x00040000 /* vin1a_d20 OUTPUT | MODE0 */
0x148 0x00040000 /* vin1a_d21 OUTPUT | MODE0 */
0x14C 0x00040000 /* vin1a_d22 OUTPUT | MODE0 */
0x150 0x00040000 /* vin1a_d23 OUTPUT | MODE0 */
>;
};
vin2a_pins: pinmux_vin2a_pins {
pinctrl-single,pins = <
0x154 0x00040000 /* vin2a_clk0 OUTPUT | MODE0 */
0x058 0x00040000 /* vin2a_de0 OUTPUT | MODE0 */
0x05C 0x00040000 /* vin2a_fld0 OUTPUT | MODE0 */
0x160 0x00040000 /* vin2a_hsync0 OUTPUT | MODE0 */
0x164 0x00040000 /* vin2a_vsync0 OUTPUT | MODE0 */
0x168 0x00040000 /* vin2a_d0 OUTPUT | MODE0 */
0x16C 0x00040000 /* vin2a_d1 OUTPUT | MODE0 */
0x170 0x00040000 /* vin2a_d2 OUTPUT | MODE0 */
0x174 0x00040000 /* vin2a_d3 OUTPUT | MODE0 */
0x178 0x00040000 /* vin2a_d4 OUTPUT | MODE0 */
0x17C 0x00040000 /* vin2a_d5 OUTPUT | MODE0 */
0x180 0x00040000 /* vin2a_d6 OUTPUT | MODE0 */
0x184 0x00040000 /* vin2a_d7 OUTPUT | MODE0 */
0x188 0x00040000 /* vin2a_d8 OUTPUT | MODE0 */
0x18C 0x00040000 /* vin2a_d9 OUTPUT | MODE0 */
0x190 0x00040000 /* vin2a_d10 OUTPUT | MODE0 */
0x194 0x00040000 /* vin2a_d11 OUTPUT | MODE0 */
0x198 0x00040000 /* vin2a_d12 OUTPUT | MODE0 */
0x19C 0x00040000 /* vin2a_d13 OUTPUT | MODE0 */
0x1A0 0x00040000 /* vin2a_d14 OUTPUT | MODE0 */
0x1A4 0x00040000 /* vin2a_d15 OUTPUT | MODE0 */
0x1A8 0x00040000 /* vin2a_d16 OUTPUT | MODE0 */
0x1AC 0x00040000 /* vin2a_d17 OUTPUT | MODE0 */
0x1B0 0x00040000 /* vin2a_d18 OUTPUT | MODE0 */
0x1B4 0x00040000 /* vin2a_d19 OUTPUT | MODE0 */
0x1B8 0x00040000 /* vin2a_d20 OUTPUT | MODE0 */
0x1BC 0x00040000 /* vin2a_d21 OUTPUT | MODE0 */
0x1C0 0x00040000 /* vin2a_d22 OUTPUT | MODE0 */
0x1C4 0x00040000 /* vin2a_d23 OUTPUT | MODE0 */
>;
};
cpsw_default_pins: pinmux_cpsw_default_pins {
pinctrl-single,pins = <
/* Slave 1 */
0x250 0x0 /* rgmii1_tclk PIN_OUTPUT | MUX_MODE0 */
0x254 0x0 /* rgmii1_tctl PIN_OUTPUT | MUX_MODE0 */
0x258 0x0 /* rgmii1_td3 PIN_OUTPUT | MUX_MODE0 */
0x25c 0x0 /* rgmii1_td2 PIN_OUTPUT | MUX_MODE0 */
0x260 0x0 /* rgmii1_td1 PIN_OUTPUT | MUX_MODE0 */
0x264 0x0 /* rgmii1_td0 PIN_OUTPUT | MUX_MODE0 */
0x268 0x00040000 /* rgmii1_rclk PIN_INPUT | MUX_MODE0 */
0x26c 0x00040000 /* rgmii1_rctl PIN_INPUT | MUX_MODE0 */
0x270 0x00040000 /* rgmii1_rd3 PIN_INPUT | MUX_MODE0 */
0x274 0x00040000 /* rgmii1_rd2 PIN_INPUT | MUX_MODE0 */
0x278 0x00040000 /* rgmii1_rd1 PIN_INPUT | MUX_MODE0 */
0x27c 0x00040000 /* rgmii1_rd0 PIN_INPUT | MUX_MODE0 */
>;
};
davinci_mdio_default_pins: pinmux_davinci_mdio_default_pins {
pinctrl-single,pins = <
0x23C 0x30000 /* mdio_data PIN_OUTPUT_PULLUP | MUX_MODE0 */
0x240 0x70000 /* mdio_clk PIN_INPUT_PULLUP | MUX_MODE0 */
>;
};
mcasp3_pins: pinmux_mcasp3_pins {
pinctrl-single,pins = <
0x324 0x00000180 /* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */
0x328 0x00000180 /* mcasp3_fsx.mcasp3_fsx OUTPUT | MODE0 */
0x32c 0x00000180 /* mcasp3_axr0.mcasp3_axr0 OUTPUT | MODE0 */
0x330 0x00040160 /* mcasp3_axr1.mcasp3_axr1 INPUT | MODE0 */
>;
};
mcasp6_pins: pinmux_mcasp6_pins {
pinctrl-single,pins = <
0x2d4 0x000001a1 /* mcasp1_axr8.mcasp6_axr0 OUTPUT | MODE1 */
0x2d8 0x000401a1 /* mcasp1_axr9.mcasp6_axr1 INPUT | MODE 1 */
0x2dc 0x000001a1 /* mcasp1_axr10.mcasp6_clkx OUTPUT | MODE1 */
0x2e0 0x000001a1 /* mcasp1_axr11.mcasp6_fsx OUTPUT | MODE1 */
>;
};
mcasp7_pins: pinmux_mcasp7_pins {
pinctrl-single,pins = <
0x2e4 0x000401a1 /* mcasp1_axr12.mcasp7_axr0 INPUT | MODE 1 */
0x2e8 0x000001a1 /* mcasp1_axr13.mcasp7_axr1 OUTPUT | MODE 1 */
0x2ec 0x000401a1 /* mcasp1_axr14.mcasp7_clkx INPUT | MODE1 */
0x2f0 0x000401a1 /* mcasp1_axr15.mcasp7_fsx INPUT | MODE1 */
>;
};
mmc2_pins: pinmux_mmc2_pins {
pinctrl-single,pins = <
0x08c 0x000601a1 /* gpmc_a19.mmc2_dat4 INPUT | MODE1 */
0x090 0x000601a1 /* gpmc_a20.mmc2_dat5 INPUT | MODE1 */
0x094 0x000601a1 /* gpmc_a21.mmc2_dat6 INPUT | MODE1 */
0x098 0x000601a1 /* gpmc_a22.mmc2_dat7 INPUT | MODE1 */
0x09c 0x000601a1 /* gpmc_a23.mmc2_clk INPUT | MODE1 */
0x0a0 0x000601a1 /* gpmc_a24.mmc2_dat0 INPUT | MODE1 */
0x0a4 0x000601a1 /* gpmc_a25.mmc2_dat1 INPUT | MODE1 */
0x0a8 0x000601a1 /* gpmc_a26.mmc2_dat2 INPUT | MODE1 */
0x0ac 0x000601a1 /* gpmc_a27.mmc2_dat3 INPUT | MODE1 */
0x0b0 0x000601a1 /* gpmc_cs1.mmc2_cmd INPUT | MODE1 */
>;
};
};
&i2c1 {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c1_pins>;
clock-frequency = <400000>;
pcf_lcd: pcf8575@20 {
compatible = "ti,pcf8575";
reg = <0x20>;
gpio-controller;
#gpio-cells = <2>;
/* HACK: Using n_latch in pcf8575 driver to "drive P10/11" to not hold ETH0/1 in reset */
n_latch = <0xfcfe>;
interrupt-parent = <&gpio6>;
interrupts = <11 2>;
interrupt-controller;
#interrupt-cells = <2>;
};
pcf_lcd3: pcf8575@21 {
compatible = "ti,pcf8575";
reg = <0x21>;
gpio-controller;
#gpio-cells = <2>;
n_latch = <0x1418>;
interrupt-parent = <&gpio6>;
interrupts = <14 2>;
interrupt-controller;
#interrupt-cells = <2>;
};
/* TLC chip for LCD panel power and backlight */
tlc59108: tlc59108@40 {
compatible = "ti,tlc59108";
reg = <0x40>;
gpios = <&pcf_lcd 13 0>; /* P15, CON_LCD_PWR_DN */
};
tlv320aic3106: tlv320aic3106@19 {
compatible = "ti,tlv320aic3x";
reg = <0x19>;
adc-settle-ms = <40>;
IOVDD-supply = <&vaudio_3v3>;
DVDD-supply = <&vaudio_1v8>;
AVDD-supply = <&vaudio_3v3>;
DRVDD-supply = <&vaudio_3v3>;
};
ldc3001:ldc3001@18 {
reg = <0x18>;
interrupt-parent = <&gpio1>;
interrupts = <15 1>;
};
tps65917: tps65917@58 {
compatible = "ti,tps65917";
reg = <0x58>;
interrupts = <0 7 0x0>; /* IRQ_SYS_1N */
interrupt-parent = <&gic>;
interrupt-controller;
#interrupt-cells = <2>;
tps65917_pmic {
compatible = "ti,tps65917-pmic";
regulators {
smps1_reg: smps1 {
/* VDD_MPU */
regulator-name = "smps1";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps2_reg: smps2 {
/* VDD_CORE */
regulator-name = "smps2";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1030000>;
regulator-always-on;
regulator-boot-on;
};
smps3_reg: smps3 {
/* VDD_GPU IVA DSPEVE */
regulator-name = "smps3";
regulator-min-microvolt = <850000>;
regulator-max-microvolt = <1250000>;
regulator-always-on;
regulator-boot-on;
};
smps4_reg: smps4 {
/* VDDS1V8 */
regulator-name = "smps4";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
smps5_reg: smps5 {
/* VDD_DDR */
regulator-name = "smps5";
regulator-min-microvolt = <1350000>;
regulator-max-microvolt = <1350000>;
regulator-always-on;
regulator-boot-on;
};
ldo1_reg: ldo1 {
/* LDO1_OUT --> SDIO */
regulator-name = "ldo1";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-boot-on;
};
ldo3_reg: ldo3 {
/* VDDA_1V8_PHY */
regulator-name = "ldo3";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo5_reg: ldo5 {
/* VDDA_1V8_PLL */
regulator-name = "ldo5";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
regulator-always-on;
regulator-boot-on;
};
ldo4_reg: ldo4 {
/* VDDA_3V_USB: VDDA_USBHS33 */
regulator-name = "ldo4";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
regulator-always-on;
regulator-boot-on;
};
regen1_reg: regen1 {
/* GPIO0-> 3V3 ON */
regulator-name = "regen1";
regulator-always-on;
regulator-boot-on;
};
regen3_reg: regen3 {
/* GPIO5-> DDR ON */
regulator-name = "regen3";
regulator-always-on;
regulator-boot-on;
};
};
};
};
};
&i2c5 {
pinctrl-names = "default";
pinctrl-0 = <&i2c5_pins>;
clock-frequency = <400000>;
pcf_hdmi: pcf8575@26 {
compatible = "ti,pcf8575";
reg = <0x26>;
gpio-controller;
#gpio-cells = <2>;
n_latch = <0xff7b>;
};
tlv320aic3106a: tlv320aic3106@18 {
compatible = "ti,tlv320aic3x";
reg = <0x18>;
IOVDD-supply = <&vaudio_3v3>;
DVDD-supply = <&vaudio_1v8>;
AVDD-supply = <&vaudio_3v3>;
DRVDD-supply = <&vaudio_3v3>;
};
tlv320aic3106b: tlv320aic3106@19 {
compatible = "ti,tlv320aic3x";
reg = <0x19>;
IOVDD-supply = <&vaudio_3v3>;
DVDD-supply = <&vaudio_1v8>;
AVDD-supply = <&vaudio_3v3>;
DRVDD-supply = <&vaudio_3v3>;
};
tlv320aic3106c: tlv320aic3106@1a {
compatible = "ti,tlv320aic3x";
reg = <0x1a>;
IOVDD-supply = <&vaudio_3v3>;
DVDD-supply = <&vaudio_1v8>;
AVDD-supply = <&vaudio_3v3>;
DRVDD-supply = <&vaudio_3v3>;
};
camera_ov10635: camera_ov10635 {
compatible = "ti,camera-ov10635";
gpios = <&pcf_hdmi 2 0>,
<&pcf_hdmi 3 0>,
<&gpio4 13 0>,
<&gpio4 14 0>,
<&gpio4 15 0>,
<&gpio4 16 0>,
<&gpio6 17 0>,
<&pcf_hdmi 6 0>;
};
ov10633@37 {
compatible = "omnivision,ov10633";
reg = <0x37>;
port {
onboardLI: endpoint {
hsync-active = <1>;
vsync-active = <1>;
pclk-sample = <1>;
};
};
};
camera_tvp5158: camera_tvp5158 {
compatible = "ti,tvp5158";
reg = <0x58>;
gpios = <&pcf_hdmi 3 0>,
<&pcf_lcd3 8 0>,
<&pcf_hdmi 2 0>,
<&pcf_hdmi 6 0>;
port {
tvp5158: endpoint {
// No props incase of BT656
};
};
};
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&i2c2_pins>;
clock-frequency = <400000>;
};
&i2c3 {
clock-frequency = <400000>;
};
&i2c4 {
clock-frequency = <400000>;
};
&i2c5 {
clock-frequency = <400000>;
};
&dcan1 {
pinctrl-names = "default";
pinctrl-0 = <&dcan1_pins>;
status = "okay";
};
&dcan2 {
pinctrl-names = "default";
pinctrl-0 = <&dcan2_pins>;
status = "okay";
};
&vip1 {
pinctrl-names = "default";
pinctrl-0 = <&vin1a_pins &vin2a_pins>;
vin2a: port@1A {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
};
};
&vin2a {
endpoint@0 {
slave-mode;
remote-endpoint = <&onboardLI>;
};
endpoint@1 {
slave-mode;
remote-endpoint = <&tvp5158>;
};
};
&gmac {
status="okay";
pinctrl-names = "default";
pinctrl-0 = <&cpsw_default_pins>;
};
&davinci_mdio {
pinctrl-names = "default";
pinctrl-0 = <&davinci_mdio_default_pins>;
};
&cpsw_emac0 {
phy_id = <&davinci_mdio>, <3>;
};
&cpsw_emac1 {
phy_id = <&davinci_mdio>, <2>;
};
&mmc1 {
vmmc-supply = <&ldo1_reg>;
bus-width = <4>;
cd-gpios = <&gpio6 27 0>;
};
&mmc2 {
vmmc-supply = <&vmmc2_fixed>;
bus-width = <8>;
max-frequency = <192000000>;
ti,non-removable;
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins>;
};
&mmc3 {
bus-width = <8>;
ti,non-removable;
status = "disabled";
};
&mmc4 {
vmmc-supply = <&vmmcwl_fixed>;
bus-width = <4>;
cap-power-off-card;
keep-power-in-suspend;
ti,non-removable;
};
&uart1 {
status = "okay";
};
&dpi1 {
lcd {
compatible = "ti,tfc_lp101";
tlc = <&tlc59108>;
data-lines = <24>;
};
};
&ldc3001 {
compatible = "lgphilips,ldc3001";
};
&hdmi {
vdda_hdmi_dac-supply = <&ldo3_reg>;
tpd12s015: tpd12s015 {
compatible = "ti,tpd12s015";
gpios = <&pcf_hdmi 4 0>, /* pcf8575@22 P4, CT_CP_HDP */
<&pcf_hdmi 5 0>, /* pcf8575@22 P5, LS_OE */
<&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */
hdmi_ddc = <&i2c2>;
hdmi-monitor {
compatible = "ti,hdmi_panel";
};
};
};
&dss {
vdda_video-supply = <&ldo3_reg>;
};
&avs_mpu {
avs-supply = <&smps1_reg>;
};
&avs_core {
avs-supply = <&smps2_reg>;
};
&avs_gpu {
avs-supply = <&smps3_reg>;
};
&avs_dspeve {
avs-supply = <&smps3_reg>;
};
&avs_iva {
avs-supply = <&smps3_reg>;
};