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author | Rajendra Nayak | 2013-06-17 08:29:44 -0500 |
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committer | Misael Lopez Cruz | 2013-07-22 15:04:19 -0500 |
commit | e3884267635918122c953590c1516cfb276285ad (patch) | |
tree | bdb9bc57a467dfe831bf86c4c5b08ee5e11680e4 | |
parent | b23dffcaa0c2981fe73c2261c544cf8faddf36bb (diff) | |
download | kernel-audio-e3884267635918122c953590c1516cfb276285ad.tar.gz kernel-audio-e3884267635918122c953590c1516cfb276285ad.tar.xz kernel-audio-e3884267635918122c953590c1516cfb276285ad.zip |
ARM: DRA7: clock: Fix the wrong ABE PLL lock frequency
The ABE PLL (used by ATL) was wrongly locked at twice the frequency.
Fix it and also set the dpll_abe_m2x2_ck rate explicitely so that we
have m2 set to 1.
Change-Id: I5efc593c46ee7b31f06326b361a85f27dd3310ec
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
-rw-r--r-- | arch/arm/mach-omap2/cclock7xx_data.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-omap2/cclock7xx_data.c b/arch/arm/mach-omap2/cclock7xx_data.c index d6b4a0b5a95f..7160e64bc4aa 100644 --- a/arch/arm/mach-omap2/cclock7xx_data.c +++ b/arch/arm/mach-omap2/cclock7xx_data.c | |||
@@ -40,7 +40,7 @@ | |||
40 | #include "prm-regbits-7xx.h" | 40 | #include "prm-regbits-7xx.h" |
41 | #include "control.h" | 41 | #include "control.h" |
42 | 42 | ||
43 | #define DRA7_DPLL_ABE_DEFFREQ 361267200 | 43 | #define DRA7_DPLL_ABE_DEFFREQ 180633600 |
44 | #define DRA7_DPLL_GMAC_DEFFREQ 1000000000 | 44 | #define DRA7_DPLL_GMAC_DEFFREQ 1000000000 |
45 | #define DRA7_DPLL_USB_DEFFREQ 960000000 | 45 | #define DRA7_DPLL_USB_DEFFREQ 960000000 |
46 | 46 | ||
@@ -2126,6 +2126,7 @@ static struct reparent_init_clks reparent_clks[] = { | |||
2126 | 2126 | ||
2127 | static struct rate_init_clks rate_clks[] = { | 2127 | static struct rate_init_clks rate_clks[] = { |
2128 | { .name = "dpll_abe_ck", .rate = DRA7_DPLL_ABE_DEFFREQ }, | 2128 | { .name = "dpll_abe_ck", .rate = DRA7_DPLL_ABE_DEFFREQ }, |
2129 | { .name = "dpll_abe_m2x2_ck", .rate = DRA7_DPLL_ABE_DEFFREQ * 2 }, | ||
2129 | { .name = "dpll_gmac_ck", .rate = DRA7_DPLL_GMAC_DEFFREQ }, | 2130 | { .name = "dpll_gmac_ck", .rate = DRA7_DPLL_GMAC_DEFFREQ }, |
2130 | { .name = "dpll_usb_ck", .rate = DRA7_DPLL_USB_DEFFREQ }, | 2131 | { .name = "dpll_usb_ck", .rate = DRA7_DPLL_USB_DEFFREQ }, |
2131 | }; | 2132 | }; |