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-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c98
1 files changed, 98 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index 22056c0f554e..f9d8a8afe74e 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -379,6 +379,87 @@ static struct omap_hwmod dra7xx_ctrl_module_wkup_hwmod = {
379}; 379};
380 380
381/* 381/*
382 * 'gmac' class
383 * cpsw/gmac sub system
384 */
385static struct omap_hwmod_class_sysconfig dra7xx_gmac_sysc = {
386 .rev_offs = 0x0,
387 .sysc_offs = 0x8,
388 .syss_offs = 0x4,
389 .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE |
390 SYSS_HAS_RESET_STATUS),
391 .idlemodes = (SIDLE_FORCE | SIDLE_NO | MSTANDBY_FORCE |
392 MSTANDBY_NO),
393 .sysc_fields = &omap_hwmod_sysc_type3,
394};
395
396static struct omap_hwmod_class dra7xx_gmac_hwmod_class = {
397 .name = "gmac",
398 .sysc = &dra7xx_gmac_sysc,
399};
400
401static struct omap_hwmod_irq_info dra7xx_gmac_irqs[] = {
402 { .name = "c0_rx_thresh_pend", .irq = 50 + DRA7XX_IRQ_GIC_START, },
403 { .name = "c0_rx_pend", .irq = 51 + DRA7XX_IRQ_GIC_START, },
404 { .name = "c0_tx_pend", .irq = 52 + DRA7XX_IRQ_GIC_START, },
405 { .name = "c0_misc_pend", .irq = 53 + DRA7XX_IRQ_GIC_START, },
406 { .irq = -1 },
407};
408
409static struct omap_hwmod_addr_space dra7xx_gmac_addr_space[] = {
410 /* cpsw ss */
411 {
412 .pa_start = 0x48484000,
413 .pa_end = 0x48484000 + SZ_2K - 1,
414 },
415 /* cpsw wr */
416 {
417 .pa_start = 0x48485200,
418 .pa_end = 0x48485200 + SZ_256 - 1,
419 .flags = ADDR_TYPE_RT,
420 },
421 { }
422};
423
424static struct omap_hwmod dra7xx_gmac_hwmod = {
425 .name = "gmac",
426 .class = &dra7xx_gmac_hwmod_class,
427 .clkdm_name = "gmac_clkdm",
428 .flags = (HWMOD_SWSUP_SIDLE | HWMOD_SWSUP_MSTANDBY),
429 .mpu_irqs = dra7xx_gmac_irqs,
430 .main_clk = "dpll_gmac_ck",
431 .prcm = {
432 .omap4 = {
433 .clkctrl_offs = DRA7XX_CM_GMAC_GMAC_CLKCTRL_OFFSET,
434 .context_offs = DRA7XX_RM_GMAC_GMAC_CONTEXT_OFFSET,
435 .modulemode = MODULEMODE_SWCTRL,
436 },
437 },
438};
439
440/*
441 * 'mdio' class
442 */
443static struct omap_hwmod_class dra7xx_mdio_hwmod_class = {
444 .name = "davinci_mdio",
445};
446
447static struct omap_hwmod_addr_space dra7xx_mdio_addr_space[] = {
448 {
449 .pa_start = 0x48485000,
450 .pa_end = 0x48485000 + SZ_256 - 1,
451 },
452 { }
453};
454
455static struct omap_hwmod dra7xx_mdio_hwmod = {
456 .name = "davinci_mdio",
457 .class = &dra7xx_mdio_hwmod_class,
458 .clkdm_name = "gmac_clkdm",
459 .main_clk = "dpll_gmac_ck",
460};
461
462/*
382 * 'dcan' class 463 * 'dcan' class
383 * 464 *
384 */ 465 */
@@ -3877,6 +3958,21 @@ static struct omap_hwmod_ocp_if dra7xx_l4_wkup__ctrl_module_wkup = {
3877 .user = OCP_USER_MPU | OCP_USER_SDMA, 3958 .user = OCP_USER_MPU | OCP_USER_SDMA,
3878}; 3959};
3879 3960
3961static struct omap_hwmod_ocp_if dra7xx_l4_per2__gmac = {
3962 .master = &dra7xx_l4_per2_hwmod,
3963 .slave = &dra7xx_gmac_hwmod,
3964 .clk = "dpll_gmac_ck",
3965 .addr = dra7xx_gmac_addr_space,
3966 .user = OCP_USER_MPU,
3967};
3968
3969static struct omap_hwmod_ocp_if dra7xx_gmac__mdio = {
3970 .master = &dra7xx_gmac_hwmod,
3971 .slave = &dra7xx_mdio_hwmod,
3972 .addr = dra7xx_mdio_addr_space,
3973 .user = OCP_USER_MPU,
3974};
3975
3880/* l4_wkup -> dcan1 */ 3976/* l4_wkup -> dcan1 */
3881static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = { 3977static struct omap_hwmod_ocp_if dra7xx_l4_wkup__dcan1 = {
3882 .master = &dra7xx_l4_wkup_hwmod, 3978 .master = &dra7xx_l4_wkup_hwmod,
@@ -6206,6 +6302,8 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
6206 &dra7xx_l4_wkup__ctrl_module_wkup, 6302 &dra7xx_l4_wkup__ctrl_module_wkup,
6207 &dra7xx_l4_wkup__dcan1, 6303 &dra7xx_l4_wkup__dcan1,
6208 &dra7xx_l4_per2__dcan2, 6304 &dra7xx_l4_per2__dcan2,
6305 &dra7xx_l4_per2__gmac,
6306 &dra7xx_gmac__mdio,
6209 &dra7xx_l4_cfg__dma_system, 6307 &dra7xx_l4_cfg__dma_system,
6210 &dra7xx_l3_main_1__dss, 6308 &dra7xx_l3_main_1__dss,
6211 &dra7xx_l3_main_1__dispc, 6309 &dra7xx_l3_main_1__dispc,