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* HACK: ARM: DRA7XX: ETH: Use n_latch in pcf8575 to drive P10 for ETH0HEADmasterPraveen Rao2013-08-091-0/+2
| | | | | | | | | | | | | | | | | | | | | | | Use n_latch to hack the pcf8575 driver to "drive P10" to not hold ETH0 in reset. Description: nETH_RST is a pin that controls the phy reset -> this was the core of the issue -> we have pcf8575 GPIO expander on i2c1 whose P10(ETH0) and P11(ETH1) hold or release the ETH from reset. On the very first write by Display Panel driver (which rightly control's it's own GPIO expander pin P15), all other pins are written as 0 -> since this is the first write(by panel), this is precisely when pcf8575 starts to drive the signal -> at this point the default pulls are overridden by pcf8575's pulls. As ETH driver does not drive it's pin, the ETH0_RST is driven low, holding Ethernet in reset. Nishanth Menon helped in isolatng this issue. REVISIT: This is a ethernet driver bug and has to be fixed properly post release. Change-Id: I45ddb1202761f052f8a8a04faf14b841da5af2ec Signed-off-by: Praveen Rao <prao@ti.com>
* arm/dts: dra7xx: Enable CPSW and MDIO for dra7xx EVMPraveen Rao2013-08-091-0/+59
| | | | | | | | | | | | | | | Adding CPSW phy-id, CPSW and MDIO pinmux configuration for active and sleep states and enable them in board evm dts file. Change-Id: I5524a2d4c2713388ba59da75fa6e90b27c100fc1 Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [Resolved merge conflict and rebased on 3.8 kernel. This patch is based on http://git.ti.com/cgit/cgit.cgi/~mugunthanvnm/ti-linux-kernel/mugunth-connectivity-linux-feature-tree.git/commit/?h=dra7-3.11-rc3-cpsw&id=8da845bd7fbab68b4899d5a6477e70a34748f6c6 ] Update the pinmux configuration for CPSW and MDIO by removing the macro definitons to match the 3.8 implementation. Signed-off-by: Praveen Rao <prao@ti.com>
* arm/dts: dra7xx: Add CPSW and MDIO module nodes for dra7xxMugunthan V N2013-08-091-1/+51
| | | | | | | | | | | | | | | | Add CPSW and MDIO related device tree data for DRA7XX and made as status disabled. Phy-id, pinmux for active and sleep state needs to be added in board dts files and enable the CPSW device. Change-Id: Ia8c6f8ec8eff0d66e0d05f4a6e1ce174a725b2fd Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> [Resolved merge conflict and rebased to 3.8 kernel] Updated the CPSW and MDIO related device tree data with correct device address offset and also to remove marco defines which caused compilation error seen as below: Error: arch/arm/boot/dts/dra7.dtsi:701.22-23 syntax error FATAL ERROR: Unable to parse input tree Signed-off-by: Praveen Rao <prao@ti.com>
* arm: dra7xx: Add hwmod data for MDIO and CPSWMugunthan V N2013-08-091-0/+98
| | | | | | | | | | Adding hwmod data for CPSW and MDIO which is present in DRA7xx SoC Change-Id: I9652c4956025335b3cdf3831bbd87ce104a80f65 Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Update the hwmod data for CPSW and MDIO to added addr space and irq info hwmod data. Signed-off-by: Praveen Rao <prao@ti.com>
* ARM: dts: dra7: Enable OPP_OD 1.5GhzPraneeth Bajjuri2013-08-091-0/+3
| | | | | | | | | | | | OPP_OD Can be enabled on trimmed and poly fixed DRA7xx samples. to identify poly-fixed trim samples: [dieID: 0x4AE0C20C], [FT_Rev bits 15:8] >= 5. This enables 1.5 Ghz for dra7xxx mpu. Change-Id: If92bff1889de54cf51bedde3ebe8f1c9b17a7657 Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* defconfig: omap2plus: input: Enable atmel_mxt_ts touch driverPraneeth Bajjuri2013-08-091-0/+1
| | | | | | | Enable Atmel MXT244 touch screen driver for dra7-evm Change-Id: I8332c0cd677fdfd0c83e5f9c7ebf6275a9db49c2 Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* ARM: dts: dra7-evm: Add DT entry for Atmel MXT244 touch driverSundar Raman2013-08-091-0/+65
| | | | | | | | | | | | This patch adds DT entry for atmel MXT244 touch driver (atmel_mxt_ts). The device is on i2c1 and with address 0x4a. Platform configuration data and interrupts data is added inside dra7-evm.dts file. Pinctrl for Wakeup2 irq pin, which is used for touchscreen interrupt, has also been updated Change-Id: Icfb2f9e9655febaa40e6f6b3b7334462eb8e056a Signed-off-by: Sundar Raman <a0393242@ti.com> Acked-by: Nishanth Menon <nm@ti.com>
* ARM: dts: dra7: Set cpufreq transition latency valueRanganath Krishnan2013-08-061-0/+6
| | | | | | | | | | | | | | Without clock-latency initialization, default value of (2^32 -1) is taken. Because of the too long transition latency, ondemand governor fails and the cpufreq governor fallback to performance governor. With this change, ondemand governor can be enabled by default for DRA7. clock-latency value referenced from omap5 (TBD: to be instrumented and use the actual value at later point of time) Change-Id: I2fa2e53088ba7e7f8f8509a8005b81ee593b55a7 Signed-off-by: Ranganath Krishnan <ranganath@ti.com>
* ARM: dts: dra7-evm: Primary card as always-onMisael Lopez Cruz2013-08-051-0/+1
| | | | | | | | Power resources are not a concern in dra7-evm context so keeping primary card as always-on to reduce audio artifacts. Change-Id: I1ba906d8716922e63a8622acefbc2cea498875b6 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7-evm: Add tlv320aic3x capture settle timeMisael Lopez Cruz2013-08-051-0/+1
| | | | | | | | Add a capture settle time to reduce the pop noise in capture path of DRA7EVM, the pop noise lasts around 30-40ms. Change-Id: Idde7aec70e95354f25544aad3429050630259cc0 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7: Add McASP interruptsMisael Lopez Cruz2013-08-021-4/+4
| | | | | | | | Add interrupts information to McASP3 and McASP6 nodes. These IRQ numbers also need configured in the IRQ crossbar. Change-Id: Ic4f1409e9f54a4705ef45f727dfed5b2757ed96b Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ASoC: DRA7: dra7-evm: Remove crossbar hacksMisael Lopez Cruz2013-08-021-2/+0
| | | | | | | | Partially remove DMA crossbar hack done by "ASoC: DRA7: dra7-evm: HACK: Set McASP DMA reqs in sDMA crossbar". The sDMA reqs in DRA7xx hwmod are kept. Change-Id: I99ffe54e83a09b3003df5b07c5621565a1d9aed4 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: OMAP: omap2plus_defconfig: disable USB debug flagsVishal Mahaveer2013-07-221-4/+0
| | | | | | | Disable USB debug flags from omap2plus_defconfig Change-Id: Icfa01952faae6992d5bfc97ce8ae27f79f977e3c Signed-off-by: Vishal Mahaveer <vishalm@ti.com>
* ARM: omap2plus_defconfig: Enable dra7-evm sound supportMisael Lopez Cruz2013-07-221-4/+15
| | | | | | | Enable ALSA and dra7-evm sound support as built-in features. Change-Id: I3d00f20e7aeeee3a6d298183969de21e32d264b8 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7-evm: Add HDMI sound nodeMisael Lopez Cruz2013-07-221-0/+7
| | | | | | | | Add HDMI audio node. Change-Id: I220e56b5a45716a7f7d6bd0b32df102f16746d16 Signed-off-by: Dandawate Saket <dsaket@ti.com> Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: DRA7: hwmod: Fix HDMI irq numberMisael Lopez Cruz2013-07-221-1/+1
| | | | | | | | HDMI_IRQ is connected to IRQ_CROSSBAR_96 in DRA7, previous IRQ number was for OMAP5. Change-Id: Iedff41b2e2dc253be7f6aa8a18c0c0d23a7f989d Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: DRA7: clocks: Fix HDMI sys_clk mux registerMisael Lopez Cruz2013-07-221-1/+1
| | | | | | | | HDMI sys_clk mux uses CM_CLKSEL_HDMI_PLL_SYS register for source selection. Change-Id: I3c762b2ff4e845978b69482ec3422dcbc736e49c Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ASoC: DRA7: dra7-evm: HACK: Set McASP DMA reqs in sDMA crossbarMisael Lopez Cruz2013-07-221-0/+16
| | | | | | | | | McASP3 and McASP6 don't have default DMA reqs assigned in sDMA crossbar. In the meantime, McASP3 TX/RX DMA reqs are reassigned to sDMA_78 and 79, and McASP6 TX/RX to sDMA_62 and 63. Change-Id: I079e181cfeccd12a121ea3f864bd8905609d09ad Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7-evm: Add sound card nodeMisael Lopez Cruz2013-07-221-0/+47
| | | | | | | | | | Add node for McASP-based sound card which consists of the media DAI link that connects McASP3 and tlv320aic3106. This DAI link in I2S mode with a bit clock of 5.6448 MHz that allows 44.1kHz, 16-bits/sample. Change-Id: I46aaa94a68c6b3c89069b9030edf96d57d2476ef Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7: Add ATL nodeMisael Lopez Cruz2013-07-221-0/+12
| | | | | | | | | | ATL1 and ATL2 are the only instances enabled. ATL1 is used to supply the audio clock for the 16-slots TDM DAI link, so it requires an output freq of 11.2896 MHz. ATL2 is used for the I2S DAI link and is configured to 5.6448 MHz. Change-Id: I4cf5ed86e75aa517e1ab3dbb3de8e9227013311b Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7: Add McASP nodesMisael Lopez Cruz2013-07-221-0/+28
| | | | | | | | | | | | | | McASP3 is configured in I2S mode with AXR0 as TX and AXR1 as RX. McASP6 is configured in TDM mode (uses same op-mode property value than I2S) with 8-slots, AXR0 is used for TX and AXR1 for RX. Interrupt property in both nodes is using McASP1's in the meantime since McASP3 and McASP6 don't have default interrupt lines and have to be assigned through IRQ crossbar. Change-Id: I766dcbea9190083c6fe0e01501104226d480a22f Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: dts: dra7-evm: Add audio pinctrlMisael Lopez Cruz2013-07-221-0/+28
| | | | | | | | | Add pinctrl entries for McASP3, McASP6 and ATL. McASP pins are configured so that McASPs are masters in their corresponding audio links. Change-Id: I507ad5941cf679a4afab98fcca7cbeba5fe5cad8 Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: DRA7: clocks: Append _ck to atl_clkin* and ref_clkin*Misael Lopez Cruz2013-07-221-9/+9
| | | | | | | | | | Suffix 'ck' is missing for 'atl_clkin*' and 'ref_clkin*' clocks in mcasp and timer parent clock names list. Fix also a missing "_" in 'atl_clkin3_ck'. Change-Id: I0d1ced5c61b08c63577872a38b16390f506c9cba Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* ARM: DRA7: clock: Fix the wrong ABE PLL lock frequencyRajendra Nayak2013-07-221-1/+2
| | | | | | | | | The ABE PLL (used by ATL) was wrongly locked at twice the frequency. Fix it and also set the dpll_abe_m2x2_ck rate explicitely so that we have m2 set to 1. Change-Id: I5efc593c46ee7b31f06326b361a85f27dd3310ec Signed-off-by: Rajendra Nayak <rnayak@ti.com>
* ARM: DRA7: hwmod: Disable smart-idle for McASPMisael Lopez Cruz2013-07-221-0/+8
| | | | | | | | As per TRM, wakeup schema is not supported by McASP, so it's recommended to use no-idle after McASP is enabled, and smart-idle after it's disabled. Change-Id: Ia20eff9238b996dbcac4b534b4645ec93fd8bafb Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
* dra7x: dts: pinctrl: Adding drv1/2_vbus pinctrl config to dra7x DTRavi Babu2013-07-191-0/+8
| | | | | | | | | | | | | | Add drv1_vbus pincontrol configuration to dra7-evm dts. select muxmode 0, and enable drv1_vbus slewctrl and pulldown Add drvr2_vbus pincontrol configuration to dra7-evm dts. select muxmode 0, and enable drv1_vbus slewctrl and pulldown Change-Id: I49135549c92e7860b832a4fcdae15853f1475695 Signed-off-by: Ravi Babu <ravibabu@ti.com> Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> Signed-off-by: Somnath Mukherjee <somnath@ti.com> Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
* usb: dra7x: Enable init rate for dpll usbNikhil Devshatwar2013-07-191-0/+2
| | | | | | | | | Add init rate fout=960Mhz to configure USB dpll USB dpll is not locked correctly through the pm runtime Change-Id: I51feacb546052120eb62be17f4119a7bb46d1c90 Signed-off-by: Nikhil Devshatwar <nikhil.nd@ti.com> Signed-off-by: Somnath Mukherjee <somnath@ti.com>
* dra7xx: usb: dwc: device tree entrees for 2 usb_otg_ssRuchika Kharwar2013-07-191-0/+92
| | | | | | | This introduces 2 usb otg subsystems to the dra7xx device tree. Change-Id: I32df149d262fb527802faf528d7aa506fb883cef Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
* arm: dts: dra7xx: Add voltage-tolerance to avs_mpu and avs_gpuHemant Hariyani2013-07-181-0/+2
| | | | | | | | | Without voltage tolerance, regulator code tries to set exact voltage and this results in a falilure if this value differs even slightly from what pmic expects. Adding a voltage-tolerance of 1% handles the case where these voltage values differ slightly. Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* clk: omap5: Add CLK_SET_RATE_PARENT flag to gpu clocksHemant Hariyani2013-07-181-4/+6
| | | | | | | | | | | clk_set_rate finds the topmost clock that needs to be changed in order to set the desired clock to a particular frequency. This is done only if CLK_SET_RATE_PARENT flag is set for a clock. gpu_core_gclk_mux and gpu_hyd_gclk_mux need to have this flag enabled in order for clk_set_rate to propagate to to their parent. Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* clk: dra7xx: Add CLK_SET_RATE_PARENT flag to gpu clocksHemant Hariyani2013-07-181-7/+9
| | | | | | | | | | | clk_set_rate finds the topmost clock that needs to be changed in order to set the desired clock to a particular frequency. This is done only if CLK_SET_RATE_PARENT flag is set for a clock. gpu_core_gclk_mux and gpu_hyd_gclk_mux need to have this flag enabled in order for clk_set_rate to propagate to to their parent. Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* ARM: OMAP5: board-generic: Modify the machine namePraneeth Bajjuri2013-07-181-1/+1
| | | | | | | | | | | | | | | Changing the machine name to "OMAP5 panda board". This is needed to populate the correct device name to sdk. Revisit: Will change the name to official omap5 platform name "OMAP5432 EVM board" later. For now, lets keep it in a way so that userspace understands and populates accordingly. Change-Id: I857d53e732220fe7bd2324ce3620ef511a39bebd Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* omap5: device tree: usb: Specify optional clock names in dtRuchika Kharwar2013-07-171-0/+5
| | | | | | | | Specify the optional clock names in the device tree. This is required for scalablity. Change-Id: Id80d0c0c92d1bb676f1fc713a20f668e3b0ee161 Signed-off-by: Ruchika Kharwar <ruchika@ti.com>
* arm: dts: omap5: Add _ck to dpll_mpuHemant Hariyani2013-07-171-2/+2
| | | | | | | | | | | | Clock frame work makes an incorrect assumption that all clock nodes end in _ck. DT entries should have the whole name of the clock for all clocks to be supported by omap clock framework. Not all clocks have _ck suffix. e.g: OMAP5 clocks: gpu_core_gclk_mux, mmc1_fclk_mux Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com> [cherry-pick and format for 3.8 sdk kernel] Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* arm: dts: dra7xx: Add _ck to dpll_mpuHemant Hariyani2013-07-171-2/+2
| | | | | | | | | | | | Clock frame work makes an incorrect assumption that all clock nodes end in _ck. DT entries should have the whole name of the clock for all clocks to be supported by omap clock framework. Not all clocks have _ck suffix. e.g: DRA7xx clocks: gpu_core_gclk_mux, hdmi_dpll_clk_mux, eve_clk Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com> [cherry-pick and format for 3.8 sdk kernel] Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* ARM: DTS: DRA7: Enable OPP HighPraneeth Bajjuri2013-07-161-2/+2
| | | | | | | | Enable OPP_HIGH since the DRA7 samples have this feature supported. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* ARM: dts: omap5-sevm: remove un-supported platformNishanth Menon2013-07-162-523/+0
| | | | | | | | | Remove OMAP5-SEVM support which no longer is supported by TI. + build is broken with wrong Palmas LDO dependencies as well. Just get rid of the platform we dont plan to maintain. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* ARM: OMAP: omap2plus_defconfig: Enable Kernel PreemptionPraneeth Bajjuri2013-07-141-0/+1
| | | | | | | | | | This patch is to enable kernel preemption on minimal omap config. This gives the ability for OS to preempt a current scheduled task in favor of a higher priority one. Change-Id: I5d39d9494172cbebf77386f9390ca813bab3533f Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* arm: dra: Add gpu interface clockHemant Hariyani2013-07-121-0/+15
| | | | | | | Add gpu iclk. Change-Id: Id9fcf210f67998682b4e21949699b8513aafecbf Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* arm: dra7xx: Add gpu hwmodHemant Hariyani2013-07-121-0/+81
| | | | | | | GPU hwmod data for DRA7xx Change-Id: I17f4c491e9a6a69052e9640e6bb2e74d5a753579 Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* arm/dts: dra7: Add gpu supplyHemant Hariyani2013-07-121-0/+7
| | | | | | Add smps6_reg as gpu supply Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* arm: dts: dra7xx: Add gpu dataHemant Hariyani2013-07-121-0/+42
| | | | | | | GPU DT entry for DRA7XX. Change-Id: I94c9a33f942b590244692001eb2ec8f9c98187c3 Signed-off-by: Hemant Hariyani <hemanthariyani@ti.com>
* OMAPDSS: DISPC: errata i740 fix: force L3_1 CD to NOSLEEP when dispc module ↵Devaraj Rangasamy2013-07-122-2/+643
| | | | | | | | | | | | | | | | is active It has been identified that L3_1 CD is idling and not responding to the traffic initiated by DSS. The Workaround suggested by Hardware team is to keep the L3_1 CD in NO_SLEEP mode, when DSS is active. Once DSS module is switched to idle mode, put L3_1 CD to HW_AUTO. OMAP4,5 ERRATUM i740: Mstandby and disconnect protocol issue Signed-off-by: Arthur Philpott <arthur.philpott@ti.com> Change-Id: Ia0499ad3ff0cabbc3ae25300407f1d7c6b9fa921 Signed-off-by: Arthur Philpott <arthur.philpott@ti.com> Signed-off-by: Dandawate Saket <dsaket@ti.com>
* omap2plus_defconfig: regulator: ti-avs-class0: enable AVS class 0Praneeth Bajjuri2013-07-111-0/+1
| | | | | | This patch is to enable regulator TI AVS Class 0 Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
* ARM: DRA7: board-generic: Modify the machine namePraneeth Bajjuri2013-07-111-1/+1
| | | | | | | | | Changing the machine name to "Jacinto6 evm board". This is needed to populate the correct device name to sdk. Signed-off-by: Praneeth Bajjuri <praneeth@ti.com> Signed-off-by: Dandawate Saket <dsaket@ti.com>
* Merge branch 'omap5_audio_video-3.8.y' of ↵Dan Murphy2013-06-122-1/+2
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.ti.com/~a0393947/ti-linux-kernel/audio-video-linux-feature-tree into ti-linux-3.8.y TI-Feature: omap5_audio_video_base TI-Tree: git://git.ti.com/~a0393947/ti-linux-kernel/audio-video-linux-feature-tree.git TI-Branch: omap5_audio_video-3.8.y * 'omap5_audio_video-3.8.y' of git://git.ti.com/~a0393947/ti-linux-kernel/audio-video-linux-feature-tree: ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as module ASoC: OMAP4+: AESS: aess_mem: Activate AESS for memory/register access ARM: dts: OMAP5: AESS: Fix AESS L3 Interconnect address ASoC: OMAP: ABE: Pick working ABE support from LDC audio branch Conflicts: arch/arm/configs/omap2plus_defconfig Signed-off-by: Dan Murphy <dmurphy@ti.com>
| * ARM: OMAP4+: omap2plus_defconfig: Enable audio via TWL6040 as modulePeter Ujfalusi2013-06-111-0/+4
| | | | | | | | | | | | | | Boards supported upstream all use TWL6040 as audio codec, enable the common ASoC machine driver by default for them. Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
| * ARM: dts: OMAP5: AESS: Fix AESS L3 Interconnect addressJyri Sarha2013-06-101-1/+1
| | | | | | | | | | | | | | | | OMAP543x_ES2.0_Public_TRM from May 2013 has this same bug too, but the right address is 490f1000. Also the bit-wise match to MPU private access looks better this way. Signed-off-by: Jyri Sarha <jsarha@ti.com>
* | TI-Integration: ARM: OMAP2+: Fix merege by restoring omap_mcasp_init() callJyri Sarha2013-06-071-0/+1
| | | | | | | | | | | | | | Restore omap_mcasp_init() call that was lost in 1b891dcc-merge. McASP device needs to be present for ABE TWL6040 probe to complete. Signed-off-by: Jyri Sarha <jsarha@ti.com>
* | Merge branch 'sdmmc-dra-linux-3.8.y' of ↵Dan Murphy2013-06-041-0/+20
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.ti.com/~balajitk/ti-linux-kernel/omap-hsmmc into ti-linux-3.8.y TI-Feature: J6-sd-mmc TI-Tree: git://git.ti.com/~balajitk/ti-linux-kernel/omap-hsmmc into ti-linux-3.8.y TI-Branch: sdmmc-dra-linux-3.8.y * 'sdmmc-dra-linux-3.8.y' of git://git.ti.com/~balajitk/ti-linux-kernel/omap-hsmmc: ARM: DRA7: dts: Add the sdma dt node and corresponding dma request lines for mmc Signed-off-by: Dan Murphy <dmurphy@ti.com>
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