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/*
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

/*
 * Following are the carveout addresses and the sizes for ION. SMC is not reserved for now
 * C0000000 - SDRAM+1G
 * BFD00000 - SMC (3MB)
 * BA300000 - ION (90MB)
 * B4300000 - TILER SECURE (81 MB)
 * B3400000 - TILER NONSECURE (15 MB)
*/

/memreserve/ 0xba300000 0x5a00000;
/memreserve/ 0xb5200000 0x5100000;
/memreserve/ 0xb4300000 0xf00000;

/*
 * Memory is reserved for ipu1 for rearview camera
 */
/memreserve/ 0x8E000000 0x1000000;
/memreserve/ 0xA0000000 0x1800000;

/include/ "dra74x.dtsi"

/ {
	model = "TI DRA742";
	compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";

	cpus {
		cpu@0 {
			compatible = "arm,cortex-a15";
			cpu0-supply = <&abb_mpu>;
			operating-points = <
				/* kHz    uV */
				/* The OPP_HIGH Only for DVFS enabled Samples */
				/* OPP_OD need to be enabled only for Refreshed poly fixed Samples */
				/* dieID reg: 0x4AE0C20C FT_Rev bits[15:8] should be 5 or more to enable OPP_OD */
				1000000	1090000
				1176000	1210000
				1500000 1280000
				>;
				clocks = <&dpll_mpu_ck>;
				clock-names = "cpu";
				/*
				 * Transition latency reference from omap5.
				 * TBD: to be instrumented and use the actual
				 * value at later point of time
				 */
				clock-latency = <300000>;
			timer {
				compatible = "arm,armv7-timer";
				/*
				 * PPI secure/nonsecure IRQ,
				 * active low level-sensitive
				 */
				interrupts = <1 13 0x308>,
					     <1 14 0x308>;
				clock-frequency = <6144000>;
			};
		};
		cpu@1 {
			compatible = "arm,cortex-a15";
			timer {
				compatible = "arm,armv7-timer";
				/*
				 * PPI secure/nonsecure IRQ,
				 * active low level-sensitive
				 */
				interrupts = <1 13 0x308>,
					     <1 14 0x308>;
				clock-frequency = <6144000>;
			};
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x60000000>; /* 512 + 1024 MB */
	};

	vmmc2_fixed: fixedregulator-mmc2 {
		compatible = "regulator-fixed";
		regulator-name = "vmmc2_fixed";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
	};

	ion_config {
		compatible = "ti,ion-omap";
		ti,omap_ion_heap_secure_input_base = <0xba300000>;
		ti,omap_ion_heap_tiler_base = <0xb5200000>;
		ti,omap_ion_heap_nonsecure_tiler_base = <0xb4300000>;
		/*90 MB*/
		ti,omap_ion_heap_secure_input_size = <0x5A00000>;
		/*81MB*/
		ti,omap_ion_heap_tiler_size = <0x5100000>;
		/*15 MB*/
		ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>;
	};

	vmmcwl_fixed: fixedregulator-mmcwl {
		compatible = "regulator-fixed";
		regulator-name = "vmmcwl_fixed";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		gpio = <&gpio5 8 0>;	/* gpio5_8 */
		startup-delay-us = <70000>;
		enable-active-high;
	};

	wlcore {
		compatible = "wlcore";
		gpio = <135>;
	};

	earlycam_config {
		compatible = "ti,earlycam_mpu";
		gpios = <&pcf_lcd 0 1>; /* P0, CON_LCD_PWR_DN */
	};

	ocp {
		gpu: gpu@0x56000000 {
		gpu-supply = <&abb_gpu>;
		};
	};

	vaudio_1v8: fixedregulator-vaudio-dig {
		compatible = "regulator-fixed";
		regulator-name = "vdac_fixed";
		regulator-min-microvolt = <1800000>;
		regulator-max-microvolt = <1800000>;
		regulator-boot-on;
	};

	vaudio_3v3: fixedregulator-vaudio-anlg {
		compatible = "regulator-fixed";
		regulator-name = "vdac_fixed";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-boot-on;
	};

	sound {
		compatible = "ti,dra7-evm-sound";
		ti,model = "dra7evm";
		ti,always-on;

		gpios = <&pcf_hdmi 1 0>;

		/* Audio routing */
		ti,audio-routing =
			"LINE1L", "Line In",
			"LINE1R", "Line In",
			"MIC3L", "Mic Bias 2V",
			"MIC3R", "Mic Bias 2V",
			"Mic Bias 2V", "Main Mic",
			"Headphone", "HPLOUT",
			"Headphone", "HPROUT",
			"Line Out", "LLOUT",
			"Line Out", "RLOUT",
			"J3A LINE1L", "JAMR3 Stereo Aux In",
			"J3A LINE1R", "JAMR3 Stereo Aux In",
			"J3B LINE1L", "JAMR3 Mono Mic 1",
			"J3B LINE1R", "JAMR3 Mono Mic 2",
			"JAMR3 Line Out 1", "J3A LLOUT",
			"JAMR3 Line Out 1", "J3A RLOUT",
			"JAMR3 Line Out 2", "J3B LLOUT",
			"JAMR3 Line Out 2", "J3B RLOUT",
			"JAMR3 Line Out 3", "J3C LLOUT",
			"JAMR3 Line Out 3", "J3C RLOUT";

		/* Media DAI link */
		ti,media-cpu = <&mcasp3>;
		ti,media-codec = <&tlv320aic3106>;
		ti,media-mclk-freq = <11289600>;
		ti,media-slots = <2>;

		/* Multichannel DAI link */
		ti,multichannel-cpu = <&mcasp6>;
		ti,multichannel-codec-a = <&tlv320aic3106a>;
		ti,multichannel-codec-b = <&tlv320aic3106b>;
		ti,multichannel-codec-c = <&tlv320aic3106c>;
		ti,multichannel-slots = <8>;
		ti,multichannel-mclk-freq = <11289600>;
		ti,multichannel-shared;

		/* Bluetooth */
		ti,bt-cpu = <&mcasp7>;
		ti,bt-bclk-freq = <512000>;

		/* Loopback */
		ti,loopback-cpu = <&mcasp5>;
		ti,loopback-mclk-freq = <11289600>;
		ti,loopback-slots = <2>;
	};

	sound_hdmi {
		compatible = "ti,omap-hdmi-tpd12s015-audio";
		ti,model = "OMAP5HDMI";
		ti,hdmi_audio = <&hdmi>;
		ti,level_shifter = <&tpd12s015>;
	};

	radio {
		compatible = "ti,dra7xx_radio";
		gpios = <&gpio6 20 0>;

		radio_helper1 {
			compatible = "ti,dra7xx_radio_subdev";
			ti,hwmods = "mcasp2";
			status = "okay";
		};
	};

	kim {
		compatible = "kim";
		nshutdown_gpio = <132>;
		dev_name = "/dev/ttyO2";
		flow_cntrl = <1>;
		baud_rate = <3686400>;
		gpios = <&pcf_lcd3 14 0>; /* pcf8575@21 P16 */
	};

	btwilink {
		compatible = "btwilink";
	};

	display_skipinit {
		skip_init =<1>;
	};

	extcon1: gpio_usbvid_extcon1 {
		compatible = "ti,gpio-usb-id";
		gpios = <&pcf_lcd3 1 0>;
		interrupt_mode = <0>;
		dr_mode = "peripheral";
	};

	extcon2: gpio_usbvid_extcon2 {
		compatible = "ti,gpio-usb-id";
		gpios = <&pcf_lcd3 2 0>;
		interrupt_mode = <0>;
		dr_mode = "host";
	};
};

&dra7_pmx_core {
        pinctrl-names = "default";
        pinctrl-0 = <
		&atl_pins
		&mcasp3_pins
		&mcasp6_pins
		&mcasp7_pins
		&mcasp8_pins
		&vout1_pins
		&vout3_pins
		&usb_pins
		&irq_pins
		&bt_uart3_pins
		&wl_pins
		&wlirq_pins
		&radio_pins
	>;

	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			0x400 0x60000	/* i2c1_sda */
			0x404 0x60000	/* i2c1_scl */
		>;
	};

	atl_pins: pinmux_atl_pins {
		pinctrl-single,pins = <
			0x298 0x00000005	/* xref_clk1.atl_clk1 OUTPUT | MODE5 */
			0x29c 0x00000005	/* xref_clk2.atl_clk2 OUTPUT | MODE5 */
		>;
	};

	mcasp3_pins: pinmux_mcasp3_pins {
		pinctrl-single,pins = <
			0x324 0x00000180	/* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */
			0x328 0x00000180	/* mcasp3_fsx.mcasp3_fsx OUTPUT | MODE0 */
			0x32c 0x00000180	/* mcasp3_axr0.mcasp3_axr0 OUTPUT | MODE0 */
			0x330 0x00040160	/* mcasp3_axr1.mcasp3_axr1 INPUT | MODE0 */
		>;
	};

	mcasp6_pins: pinmux_mcasp6_pins {
		pinctrl-single,pins = <
			0x2d4 0x000001a1	/* mcasp1_axr8.mcasp6_axr0 OUTPUT | MODE1 */
			0x2d8 0x000401a1	/* mcasp1_axr9.mcasp6_axr1 INPUT | MODE 1 */
			0x2dc 0x000001a1	/* mcasp1_axr10.mcasp6_clkx OUTPUT | MODE1 */
			0x2e0 0x000001a1	/* mcasp1_axr11.mcasp6_fsx OUTPUT | MODE1 */
		>;
	};

	mcasp7_pins: pinmux_mcasp7_pins {
		pinctrl-single,pins = <
			0x2e4 0x000401a1	/* mcasp1_axr12.mcasp7_axr0 INPUT | MODE 1 */
			0x2e8 0x000001a1	/* mcasp1_axr13.mcasp7_axr1 OUTPUT | MODE 1 */
			0x2ec 0x000401a1	/* mcasp1_axr14.mcasp7_clkx INPUT | MODE1 */
			0x2f0 0x000401a1	/* mcasp1_axr15.mcasp7_fsx INPUT | MODE1 */
		>;
	};

	mcasp8_pins: pinmux_mcasp8_pins {
		pinctrl-single,pins = <
			0x2fc 0x00040001	/* mcasp2_aclkr.mcasp8_axr2 OUTPUT | MODE1 */
		>;
	};

	irq_pins: pinmux_irq_pins {
                pinctrl-single,pins = <
			0x420	0x1	/* Wakeup2 INPUT | MODE1 */
                >;
        };

	usb_pins: pinmux_usb_pins {
                pinctrl-single,pins = <
			0x280	0xc000e	/* DRV1_VBUS SLEW | PULLDEN | MODE14 */
			0x284	0xc000e	/* DRV2_VBUS SLEW | PULLDEN | MODE14 */
                >;
        };

	i2c2_pins: pinmux_i2c2_pins {
                pinctrl-single,pins = <
			0x408	0x60000	/* i2c2_sda INPUT | MODE0 */
			0x40C	0x60000	/* i2c2_scl INPUT | MODE0 */
                >;
        };

	vout1_pins: pinmux_vout1_pins {
		pinctrl-single,pins = <
			0x1C8	0x0	/* vout1_clk OUTPUT | MODE0 */
			0x1CC	0x0	/* vout1_de OUTPUT | MODE0 */
			0x1D0	0x0	/* vout1_fld OUTPUT | MODE0 */
			0x1D4	0x0	/* vout1_hsync OUTPUT | MODE0 */
			0x1D8	0x0	/* vout1_vsync OUTPUT | MODE0 */
			0x1DC	0x0	/* vout1_d0 OUTPUT | MODE0 */
			0x1E0	0x0	/* vout1_d1 OUTPUT | MODE0 */
			0x1E4	0x0	/* vout1_d2 OUTPUT | MODE0 */
			0x1E8	0x0	/* vout1_d3 OUTPUT | MODE0 */
			0x1EC	0x0	/* vout1_d4 OUTPUT | MODE0 */
			0x1F0	0x0	/* vout1_d5 OUTPUT | MODE0 */
			0x1F4	0x0	/* vout1_d6 OUTPUT | MODE0 */
			0x1F8	0x0	/* vout1_d7 OUTPUT | MODE0 */
			0x1FC	0x0	/* vout1_d8 OUTPUT | MODE0 */
			0x200	0x0	/* vout1_d9 OUTPUT | MODE0 */
			0x204	0x0	/* vout1_d10 OUTPUT | MODE0 */
			0x208	0x0	/* vout1_d11 OUTPUT | MODE0 */
			0x20C	0x0	/* vout1_d12 OUTPUT | MODE0 */
			0x210	0x0	/* vout1_d13 OUTPUT | MODE0 */
			0x214	0x0	/* vout1_d14 OUTPUT | MODE0 */
			0x218	0x0	/* vout1_d15 OUTPUT | MODE0 */
			0x21C	0x0	/* vout1_d16 OUTPUT | MODE0 */
			0x220	0x0	/* vout1_d17 OUTPUT | MODE0 */
			0x224	0x0	/* vout1_d18 OUTPUT | MODE0 */
			0x228	0x0	/* vout1_d19 OUTPUT | MODE0 */
			0x22C	0x0	/* vout1_d20 OUTPUT | MODE0 */
			0x230	0x0	/* vout1_d21 OUTPUT | MODE0 */
			0x234	0x0	/* vout1_d22 OUTPUT | MODE0 */
			0x238	0x0	/* vout1_d23 OUTPUT | MODE0 */
		>;
	};

	display_layout {
		compatible = "ti, omap4-dsscomp";
		ti,num_displays = <3>;
		ti,default_display = "lcd";
	};

	vout3_pins: pinmux_vout3_pins {
		pinctrl-single,pins = <
			0x000	0x3	/*GPMC_AD0  = VOUT3_D0*/
			0x004	0x3	/*GPMC_AD1  = VOUT3_D1*/
			0x008	0x3	/*GPMC_AD2  = VOUT3_D2*/
			0x00c	0x3	/*GPMC_AD3  = VOUT3_D3*/
			0x010	0x3	/*GPMC_AD4  = VOUT3_D4*/
			0x014	0x3	/*GPMC_AD5  = VOUT3_D5*/
			0x018	0x3	/*GPMC_AD6  = VOUT3_D6*/
			0x01c	0x3	/*GPMC_AD7  = VOUT3_D7*/
			0x020	0x3	/*GPMC_AD8  = VOUT3_D8*/
			0x024	0x3	/*GPMC_AD9  = VOUT3_D9*/
			0x028	0x3	/*GPMC_AD10 = VOUT3_D10*/
			0x02c	0x3	/*GPMC_AD11 = VOUT3_D11*/
			0x030	0x3	/*GPMC_AD12 = VOUT3_D12*/
			0x034	0x3	/*GPMC_AD13 = VOUT3_D13*/
			0x038	0x3	/*GPMC_AD14 = VOUT3_D14*/
			0x03c	0x3	/*GPMC_AD15 = VOUT3_D15*/
			0x040	0x3	/*GPMC_A0   = VOUT3_D16*/
			0x044	0x3	/*GPMC_A1   = VOUT3_D17*/
			0x048	0x3	/*GPMC_A2   = VOUT3_D18*/
			0x04c	0x3	/*GPMC_A3   = VOUT3_D19*/
			0x050	0x3	/*GPMC_A4   = VOUT3_D20*/
			0x054	0x3	/*GPMC_A5   = VOUT3_D21*/
			0x058	0x3	/*GPMC_A6   = VOUT3_D22*/
			0x05c	0x3	/*GPMC_A7   = VOUT3_D23*/
			0x060	0x3	/*GPMC_A8   = VOUT3_HSYNC*/
			0x064	0x3	/*GPMC_A9   = VOUT3_VSYNC*/
			0x068	0x3	/*GPMC_A10  = VOUT3_DE*/
			0x06c	0x3	/*GPMC_A11  = VOUT3_FLD*/
			0x0bc	0x3	/*GPMC_CS3  = VOUT3_CLK*/
		>;
	};

	vin1a_pins: pinmux_vin1a_pins {
		pinctrl-single,pins = <
			0x0DC	0x00040000 /* vin1a_clk0 OUTPUT | MODE0 */
			0x0E4	0x00040000 /* vin1a_de0 OUTPUT | MODE0 */
			0x0E8	0x00040000 /* vin1a_fld0 OUTPUT | MODE0 */
			0x0EC	0x00040000 /* vin1a_hsync0	OUTPUT | MODE0 */
			0x0F0	0x00040000 /* vin1a_vsync0 OUTPUT | MODE0 */
			0x0F4	0x00040000 /* vin1a_d0	OUTPUT | MODE0 */
			0x0F8	0x00040000 /* vin1a_d1	OUTPUT | MODE0 */
			0x0FC	0x00040000 /* vin1a_d2	OUTPUT | MODE0 */
			0x100	0x00040000 /* vin1a_d3 	OUTPUT | MODE0 */
			0x104	0x00040000 /* vin1a_d4 	OUTPUT | MODE0 */
			0x108	0x00040000 /* vin1a_d5	OUTPUT | MODE0 */
			0x10C	0x00040000 /* vin1a_d6	OUTPUT | MODE0 */
			0x110	0x00040000 /* vin1a_d7	OUTPUT | MODE0 */
			0x114	0x00040000 /* vin1a_d8	OUTPUT | MODE0 */
			0x118	0x00040000 /* vin1a_d9	OUTPUT | MODE0 */
			0x11C	0x00040000 /* vin1a_d10	OUTPUT | MODE0 */
			0x120	0x00040000 /* vin1a_d11	OUTPUT | MODE0 */
			0x124	0x00040000 /* vin1a_d12	OUTPUT | MODE0 */
			0x128	0x00040000 /* vin1a_d13	OUTPUT | MODE0 */
			0x12C	0x00040000 /* vin1a_d14	OUTPUT | MODE0 */
			0x130	0x00040000 /* vin1a_d15	OUTPUT | MODE0 */
		>;
	};

	vin1a_d16_d23_pins: pinmux_vin1a_d16_d23_pins {
		pinctrl-single,pins = <
			0x134   0x00040000 /* vin1a_d16 OUTPUT | MODE0 */
			0x138   0x00040000 /* vin1a_d17 OUTPUT | MODE0 */
			0x13C   0x00040000 /* vin1a_d18 OUTPUT | MODE0 */
			0x140   0x00040000 /* vin1a_d19 OUTPUT | MODE0 */
			0x144   0x00040000 /* vin1a_d20 OUTPUT | MODE0 */
			0x148   0x00040000 /* vin1a_d21 OUTPUT | MODE0 */
			0x14C   0x00040000 /* vin1a_d22 OUTPUT | MODE0 */
			0x150   0x00040000 /* vin1a_d23 OUTPUT | MODE0 */

		>;
	};

	vin2a_pins: pinmux_vin2a_pins {
		pinctrl-single,pins = <
			0x154	0x00040000 /* vin2a_clk0 OUTPUT | MODE0 */
			0x160	0x00040000 /* vin2a_hsync0 OUTPUT | MODE0 */
			0x164	0x00040000 /* vin2a_vsync0 OUTPUT | MODE0 */
			0x168	0x00040000 /* vin2a_d0	OUTPUT | MODE0 */
			0x16c	0x00040000 /* vin2a_d1	OUTPUT | MODE0 */
			0x170	0x00040000 /* vin2a_d2	OUTPUT | MODE0 */
			0x174	0x00040000 /* vin2a_d3	OUTPUT | MODE0 */
			0x178	0x00040000 /* vin2a_d4	OUTPUT | MODE0 */
			0x17c	0x00040000 /* vin2a_d5	OUTPUT | MODE0 */
			0x180	0x00040000 /* vin2a_d6	OUTPUT | MODE0 */
			0x184	0x00040000 /* vin2a_d7	OUTPUT | MODE0 */
		>;
	};

        vin3a_pins: pinmux_vin3a_pins {
		pinctrl-single,pins = <
			0x0E0	0x00040006 /* vin3a_clk0 OUTPUT | MODE0 */
			0x1C0	0x00040005 /* vin3a_hsync0 OUTPUT | MODE0 */
			0x1C4	0x00040005 /* vin3a_vsync0 OUTPUT | MODE0 */
			0x134	0x00040006 /* vin3a_d0	OUTPUT | MODE0 */
			0x138	0x00040006 /* vin3a_d1	OUTPUT | MODE0 */
			0x13C	0x00040006 /* vin3a_d2	OUTPUT | MODE0 */
			0x140	0x00040006 /* vin3a_d3 	OUTPUT | MODE0 */
			0x144	0x00040006 /* vin3a_d4 	OUTPUT | MODE0 */
			0x148	0x00040006 /* vin3a_d5	OUTPUT | MODE0 */
			0x14C	0x00040006 /* vin3a_d6	OUTPUT | MODE0 */
			0x150	0x00040006 /* vin3a_d7	OUTPUT | MODE0 */
                >;
        };

	vin5a_pins: pinmux_vin5a_pins {
		pinctrl-single,pins = <
			0x374	0x00040009 /* vin5a_clk0 OUTPUT | MODE0 */
			0x39c	0x00040009 /* vin5a_hsync0 OUTPUT | MODE0 */
			0x3a0	0x00040009 /* vin5a_vsync0 OUTPUT | MODE0 */
			0x398	0x00040009 /* vin5a_d0	OUTPUT | MODE0 */
			0x394	0x00040009 /* vin5a_d1	OUTPUT | MODE0 */
			0x390	0x00040009 /* vin5a_d2	OUTPUT | MODE0 */
			0x38c	0x00040009 /* vin5a_d3 	OUTPUT | MODE0 */
			0x388	0x00040009 /* vin5a_d4 	OUTPUT | MODE0 */
			0x384	0x00040009 /* vin5a_d5	OUTPUT | MODE0 */
			0x380	0x00040009 /* vin5a_d6	OUTPUT | MODE0 */
			0x37c	0x00040009 /* vin5a_d7	OUTPUT | MODE0 */
                >;
        };

	vin6a_pins: pinmux_vin6a_pins {
		pinctrl-single,pins = <
			0x298	0x00040007 /* vin6a_clk0 OUTPUT | MODE0 */
			0x2B8	0x00040007 /* vin6a_hsync0 OUTPUT | MODE0 */
			0x2B4	0x00040007 /* vin6a_vsync0 OUTPUT | MODE0 */
			0x330	0x00040007 /* vin6a_d0	OUTPUT | MODE0 */
			0x32C	0x00040007 /* vin6a_d1	OUTPUT | MODE0 */
			0x328	0x00040007 /* vin6a_d2	OUTPUT | MODE0 */
			0x324	0x00040007 /* vin6a_d3	OUTPUT | MODE0 */
			0x310	0x00040007 /* vin6a_d4	OUTPUT | MODE0 */
			0x30C	0x00040007 /* vin6a_d5	OUTPUT | MODE0 */
			0x2F8	0x00040007 /* vin6a_d6	OUTPUT | MODE0 */
			0x2F4	0x00040007 /* vin6a_d7	OUTPUT | MODE0 */
		>;
	};

	cpsw_default_pins: pinmux_cpsw_default_pins {
		pinctrl-single,pins = <
			/* Slave 1 */
			0x250	0x0 /* rgmii1_tclk PIN_OUTPUT | MUX_MODE0 */
			0x254	0x0 /* rgmii1_tctl PIN_OUTPUT | MUX_MODE0 */
			0x258	0x0 /* rgmii1_td3 PIN_OUTPUT | MUX_MODE0 */
			0x25c	0x0 /* rgmii1_td2 PIN_OUTPUT | MUX_MODE0 */
			0x260	0x0 /* rgmii1_td1 PIN_OUTPUT | MUX_MODE0 */
			0x264	0x0 /* rgmii1_td0 PIN_OUTPUT | MUX_MODE0 */
			0x268	0x00040000 /* rgmii1_rclk PIN_INPUT | MUX_MODE0 */
			0x26c	0x00040000 /* rgmii1_rctl PIN_INPUT | MUX_MODE0 */
			0x270	0x00040000 /* rgmii1_rd3 PIN_INPUT | MUX_MODE0 */
			0x274	0x00040000 /* rgmii1_rd2 PIN_INPUT | MUX_MODE0 */
			0x278	0x00040000 /* rgmii1_rd1 PIN_INPUT | MUX_MODE0 */
			0x27c	0x00040000 /* rgmii1_rd0 PIN_INPUT | MUX_MODE0 */

			/* Slave 2 */
			0x198	0x3 /* rgmii2_tclk PIN_OUTPUT | MUX_MODE3 */
			0x19c	0x3 /* rgmii2_tctl PIN_OUTPUT | MUX_MODE3 */
			0x1a0	0x3 /* rgmii2_td3 PIN_OUTPUT | MUX_MODE3 */
			0x1a4	0x3 /* rgmii2_td2 PIN_OUTPUT | MUX_MODE3 */
			0x1a8	0x3 /* rgmii2_td1 PIN_OUTPUT | MUX_MODE3 */
			0x1ac	0x3 /* rgmii2_td0 PIN_OUTPUT | MUX_MODE3 */
			0x1b0	0x00040003 /* rgmii2_rclk PIN_INPUT | MUX_MODE3 */
			0x1b4	0x00040003 /* rgmii2_rctl PIN_INPUT | MUX_MODE3 */
			0x1b8	0x00040003 /* rgmii2_rd3 PIN_INPUT | MUX_MODE3 */
			0x1bc	0x00040003 /* rgmii2_rd2 PIN_INPUT | MUX_MODE3 */
			0x1c0	0x00040003 /* rgmii2_rd1 PIN_INPUT | MUX_MODE3 */
			0x1c4	0x00040003 /* rgmii2_rd0 PIN_INPUT | MUX_MODE3 */
				>;
		};

	davinci_mdio_default_pins: pinmux_davinci_mdio_default_pins {
		pinctrl-single,pins = <
			/* MDIO */
			0x23c	0x30000 /* mdio_data PIN_OUTPUT_PULLUP | MUX_MODE0 */
			0x240	0x70000 /* mdio_clk PIN_INPUT_PULLUP | MUX_MODE0 */
				>;
		};

	bt_uart3_pins: pinmux_bt_uart3_pins {
		pinctrl-single,pins = <
			0x3c0 0x60001	/* spi2_sclk.uart3_rx:  INPUT | PULLUP | MODE 1 */
			0x3c4 0x10001	/* spi2_d1.uart3_tx:    OUTPUT |  MODE 1 */
			0x3c8 0x60001	/* spi2_d0.uart3_cts:   INPUT | PULLUP | MODE 1 */
			0x3cc 0x10001	/* spi2_cs0.uart3_rts:  OUTPUT | MODE 1 */
			0x2bc 0x0000E	/* BT_EN.gp5_4:         OUTPUT | PULLDEN | MODE 14 */
		>;
	};

	wl_pins: pinmux_wl_pins {
		pinctrl-single,pins = <
			0x3e8 0x60003	/* MMC4_CLK: INPUTENABLE | PULLUP | MODE3 */
			0x3ec 0x60003	/* MMC4_CMD: INPUTENABLE | PULLUP | MODE3 */
			0x3f0 0x60003	/* MMC4_DAT0: INPUTENABLE | PULLUP | MODE3 */
			0x3f4 0x60003	/* MMC4_DAT1: INPUTENABLE | PULLUP | MODE3 */
			0x3f8 0x60003	/* MMC4_DAT2: INPUTENABLE | PULLUP | MODE3 */
			0x3fc 0x60003	/* MMC4_DAT3: INPUTENABLE | PULLUP | MODE3 */
			0x2cc 0x2000E	/* WLAN_EN: OUTPUT | MODE14 */
		>;
	};

	wlirq_pins: pinmux_wlirq_pins {
		pinctrl-single,pins = <
			0x2c8 0x106000E	/* WLAN_IRQ: INPUT | WAKEUP_ENABLE | MODE 14 */
		>;
	};

	dcan1_pins: pinmux_dcan1_pins {
		pinctrl-single,pins = <
			0x3d0	0x00000000	/* DCAN1_TX: MODE0 */
			0x418	0x00000001	/* WAKEUP0: MODE1 */
		>;
	};

	dcan2_pins: pinmux_dcan2_pins {
		pinctrl-single,pins = <
			0x288	0x00000002	/* DCAN2_TX: MODE2 */
			0x28C	0x00060002	/* DCAN2_RX: MODE2 | INPUTENABLE | PULLUP */
		>;
	};
	radio_pins: pinmux_radio_pins {
		pinctrl-single,pins = <
			0x02F4	 0x40000	/* MCASP2_ACLKX: MODE0 */
			0x02F8	 0xc0000	/* MCASP2_AFSX: MODE0 */
			0x0304	 0x40000	/* MCASP2_AXR0: MODE0 */
			0x0308	 0x40000	/* MCASP2_AXR1: MODE0 */
			0x030C	 0xc0000	/* MCASP2_AXR2: MODE0 */
			0x0310	 0xc0000	/* MCASP2_AXR3: MODE0 */
			0x0314	 0x40000	/* MCASP2_AXR4: MODE0 */
			0x0318	 0x40000	/* MCASP2_AXR5: MODE0 */
			0x031c	 0x40000	/* MCASP2_AXR6: MODE0 */
			0x0320	 0x40000	/* MCASP2_AXR7: MODE0 */
			0x0334	 0x70004	/* I2C4_SDA: MODE4 */
			0x0338	 0x70004	/* I2C4_SCL: MODE4 */
			0x02A0	 0x5000e	/* GPIO6_20: MODE14 */
		>;
	};
	mmc1_pins: pinmux_mmc1_pins {
		pinctrl-single,pins = <
			0x026C	 0x0004000E	/* GPIO6_27: MODE14 | INPUTENABLE */
		>;
	};

};

&gmac {
	status="okay";
	pinctrl-names = "default";
	pinctrl-0 = <&cpsw_default_pins>;
	dual_emac = <1>;
};

&davinci_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&davinci_mdio_default_pins>;
};

&cpsw_emac0 {
	phy_id = <&davinci_mdio>, <2>;
};

&cpsw_emac1 {
	phy_id = <&davinci_mdio>, <3>;
};

&i2c1 {
	clock-frequency = <400000>;
        pinctrl-0 = <&i2c1_pins>;
	status = "okay";

	tps659038: tps659038@58 {
		reg = <0x58>;
	};

	pcf_lcd: pcf8575@20 {
		compatible = "ti,pcf8575";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
		/* HACK: Using n_latch in pcf8575 driver to "drive P10/11" to not hold ETH0/1 in reset */
		n_latch = <0xfcfe>;
		interrupt-parent = <&gpio6>;
		interrupts = <11 2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	pcf_lcd3: pcf8575@21 {
		compatible = "ti,pcf8575";
		reg = <0x21>;
		gpio-controller;
		#gpio-cells = <2>;
		n_latch = <0x1408>;
		interrupt-parent = <&gpio6>;
		interrupts = <14 2>;
		interrupt-controller;
		#interrupt-cells = <2>;
	};

	/* TLC chip for LCD panel power and backlight */
	tlc59108: tlc59108@40 {
		compatible = "ti,tlc59108";
		reg = <0x40>;
		gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */
	};

	tlv320aic3106: tlv320aic3106@18 {
		compatible = "ti,tlv320aic3x";
		reg = <0x18>;
		adc-settle-ms = <40>;
		IOVDD-supply = <&vaudio_3v3>;
		DVDD-supply = <&vaudio_1v8>;
		AVDD-supply = <&vaudio_3v3>;
		DRVDD-supply = <&vaudio_3v3>;
	};

	mXT244:mXT244@4a {
		reg = <0x4a>;
	};
};

/include/ "tps659038.dtsi"

&i2c2 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <400000>;

	pcf_hdmi: pcf8575@26 {
		compatible = "ti,pcf8575";
		reg = <0x26>;
		gpio-controller;
		#gpio-cells = <2>;
		n_latch = <0xfffb>;
	};

	tlv320aic3106a: tlv320aic3106@18 {
		compatible = "ti,tlv320aic3x";
		reg = <0x18>;
		IOVDD-supply = <&vaudio_3v3>;
		DVDD-supply = <&vaudio_1v8>;
		AVDD-supply = <&vaudio_3v3>;
		DRVDD-supply = <&vaudio_3v3>;
	};

	tlv320aic3106b: tlv320aic3106@19 {
		compatible = "ti,tlv320aic3x";
		reg = <0x19>;
		IOVDD-supply = <&vaudio_3v3>;
		DVDD-supply = <&vaudio_1v8>;
		AVDD-supply = <&vaudio_3v3>;
		DRVDD-supply = <&vaudio_3v3>;
	};

	tlv320aic3106c: tlv320aic3106@1a {
		compatible = "ti,tlv320aic3x";
		reg = <0x1a>;
		IOVDD-supply = <&vaudio_3v3>;
		DVDD-supply = <&vaudio_1v8>;
		AVDD-supply = <&vaudio_3v3>;
		DRVDD-supply = <&vaudio_3v3>;
	};

	camera_ov10633: camera_ov10633 {
		compatible = "ti,camera-ov10633";
		gpios = <&pcf_hdmi 2 0>,
			<&pcf_hdmi 3 0>,
			<&gpio4 13 0>,
			<&gpio4 14 0>,
			<&gpio4 15 0>,
			<&gpio4 16 0>,
			<&gpio6 17 0>;
		ovnode = <&i2c2>;
	};

	camera_tvp5158: camera_tvp5158 {
		compatible = "ti,tvp5158";
		reg = <0x58>;
		gpios = <&pcf_hdmi 3 0>,
		       <&pcf_lcd3 8 0>;
		port {
			tvp5158: endpoint {
			// No props incase of BT656
			};
		};
       };

	camera_ov10635: camera_ov10635 {
		compatible = "ti,camera-ov10635";
		gpios = <&pcf_hdmi 2 0>,
			<&pcf_hdmi 3 0>,
			<&gpio4 13 0>,
			<&gpio4 14 0>,
			<&gpio4 15 0>,
			<&gpio4 16 0>,
			<&gpio6 17 0>;
		ovnode = <&i2c2>;
	};

	fpdlink_camera {
		compatible = "ti,fpdlink";
		reg = <0x20>;
		gpios =	<&pcf_hdmi 3 0>,
			<&pcf_lcd3 8 0>;
		port {
			cam_fpdlink: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <0>;
				bus-width = <24>;
			};
		};
       };

	ov10633@37 {
		compatible = "omnivision,ov10633";
		reg = <0x37>;

		port {
			onboardLI: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

        ov10635@30 {
		compatible = "omnivision,ov10635";
		reg = <0x30>;

		port {
			vis_ovcam: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

        ov10635@38 {
		compatible = "omnivision,ov10635";
		reg = <0x38>;
		deserializer = <&vis_des1>;
		serializer = <&vis_ser1>;

		port {
			cam1: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	ov10635@39 {
		compatible = "omnivision,ov10635";
		reg = <0x39>;
		deserializer = <&vis_des2>;
		serializer = <&vis_ser2>;
		status = "disabled";

		port {
			cam2: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	ov10635@3a {
		compatible = "omnivision,ov10635";
		reg = <0x3a>;
		deserializer = <&vis_des3>;
		serializer = <&vis_ser3>;

		port {
			cam3: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	ov10635@3b {
		compatible = "omnivision,ov10635";
		reg = <0x3b>;
		deserializer = <&vis_des4>;
		serializer = <&vis_ser4>;

		port {
			cam4: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	ov10635@3c {
		compatible = "omnivision,ov10635";
		reg = <0x3c>;
		deserializer = <&vis_des5>;
		serializer = <&vis_ser5>;

		port {
			cam5: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	ov10635@3d {
		compatible = "omnivision,ov10635";
		reg = <0x3d>;
		deserializer = <&vis_des6>;
		serializer = <&vis_ser6>;

		port {
			cam6: endpoint {
				hsync-active = <1>;
				vsync-active = <1>;
				pclk-sample = <1>;
			};
		};
	};

	hdmirec: hdmirec@31 {
		compatible = "no,one";
		reg=<0x31>;
	};

	expander@27 {
		compatible = "ti,i2cexp";
		reg=<0x27>;
		hdmirec = <&hdmirec>;
	};

	expander@21 {
		compatible = "ti,i2cexp";
		reg=<0x21>;
		hdmirec = <&hdmirec>;
	};

	expander@25 {
		compatible = "ti,i2cexp";
		reg=<0x25>;
		hdmirec = <&hdmirec>;
	};

	vis_des1: ds90ub914aq@60 {
		compatible = "ti,ds90ub914aq";
		reg = <0x60>;
	};

	vis_ser1: ds90ub913aq@74 {
		compatible = "ti,ds90ub913aq";
		reg = <0x74>;
	};

	vis_des2: ds90ub914aq@64 {
		compatible = "ti,ds90ub914aq";
		reg = <0x64>;
	};

	vis_ser2: ds90ub913aq@75 {
		compatible = "ti,ds90ub913aq";
		reg = <0x75>;
	};

	vis_des3: ds90ub914aq@68 {
		compatible = "ti,ds90ub914aq";
		reg = <0x68>;
	};

	vis_ser3: ds90ub913aq@76 {
		compatible = "ti,ds90ub913aq";
		reg = <0x76>;
	};

	vis_des4: ds90ub914aq@6c {
		compatible = "ti,ds90ub914aq";
		reg = <0x6c>;
	};

	vis_ser4: ds90ub913aq@77 {
		compatible = "ti,ds90ub913aq";
		reg = <0x77>;
	};

	vis_des5: ds90ub914aq@61 {
		compatible = "ti,ds90ub914aq";
		reg = <0x61>;
	};

	vis_ser5: ds90ub913aq@78 {
		compatible = "ti,ds90ub913aq";
		reg = <0x78>;
	};

	vis_des6: ds90ub914aq@69 {
		compatible = "ti,ds90ub914aq";
		reg = <0x69>;
	};

	vis_ser6: ds90ub913aq@79 {
		compatible = "ti,ds90ub913aq";
		reg = <0x79>;
	};

	lvds_fpd: ds90uh925q@1b {
		compatible = "ti,ds90uh925q";
		reg = <0x1b>;
	};

	lvds_fpd1: ds90uh928q@2c {
		compatible = "ti,ds90uh928q";
		reg = <0x2c>;
	};
};

&i2c3 {
	clock-frequency = <400000>;
};

&i2c4 {
	clock-frequency = <400000>;
};

&i2c5 {
	clock-frequency = <400000>;
};

&dcan1 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan1_pins>;
	status = "okay";
};

&dcan2 {
	pinctrl-names = "default";
	pinctrl-0 = <&dcan2_pins>;
	status = "okay";
};

&usb1 {
	dr_mode = "peripheral";
};

&usb2 {
	dr_mode = "host";
};

&omap_dwc31 {
	extcon = <&extcon1>;
};

&omap_dwc32 {
	extcon = <&extcon2>;
};

&mmc1 {
	vmmc-supply = <&ldo1_reg>;
	bus-width = <4>;
	cd-gpios = <&gpio6 27 0>;
};

&mmc2 {
	vmmc-supply = <&vmmc2_fixed>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	bus-width = <8>;
	ti,non-removable;
	status = "disabled";
};

&mmc4 {
	vmmc-supply = <&vmmcwl_fixed>;
	bus-width = <4>;
	cap-power-off-card;
	keep-power-in-suspend;
	ti,non-removable;
};

&avs_mpu {
	avs-supply = <&smps123_reg>;
};

&avs_core {
	avs-supply = <&smps7_reg>;
};

&avs_gpu {
	avs-supply = <&smps6_reg>;
};

&avs_dspeve {
	avs-supply = <&smps45_reg>;
};

&avs_iva {
	avs-supply = <&smps8_reg>;
};

&vip1 {
	pinctrl-names = "default";
	/*
		Pinmux conflict between 1a:16-23 & 2a:0-8
		Either use full 32bit of vin1a or use 16bit vin1a and 8bitvin2a
		TO enable RGB camera, uncomment this
		pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>;
	*/
	pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>;

	vin1a: port@0A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
	};

	vin2a: port@1A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <1>;
	};
};

&vip2 {
	pinctrl-names = "default";
	pinctrl-0 = <&vin3a_pins>;

	vin3a: port@0A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
	};

	vin4a: port@1A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <1>;
	};
};

&vip3 {
	pinctrl-names = "default";
	//pinctrl-0 = <&vin5a_pins &vin6a_pins>;
	pinctrl-0 = <&vin5a_pins>;

	vin5a: port@0A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <0>;
	};

	vin6a: port@1A {
		#address-cells = <1>;
		#size-cells = <0>;
		reg = <1>;
	};
};

&vin1a {
	endpoint@4 {
		slave-mode;
		remote-endpoint = <&cam_fpdlink>;
	};
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&onboardLI>;
	};
	endpoint@1 {
		slave-mode;
		remote-endpoint = <&vis_ovcam>;
	};
	endpoint@2 {
		slave-mode;
		remote-endpoint = <&cam1>;
	};
	endpoint@3 {
                slave-mode;
                remote-endpoint = <&tvp5158>;
        };
};

&vin2a {
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&cam2>;
	};
};

&vin3a {
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&cam3>;
	};
};

&vin4a {
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&cam5>;
	};
};

&vin5a {
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&cam4>;
	};
};

&vin6a {
	endpoint@0 {
		slave-mode;
		remote-endpoint = <&cam6>;
	};
};

&dpi1 {
	lcd {
		compatible = "ti,tfc_s9700";
		tlc = <&tlc59108>;
		data-lines = <24>;
	};
};

&hdmi {
	vdda_hdmi_dac-supply = <&ldo3_reg>;
	tpd12s015: tpd12s015 {
		compatible = "ti,tpd12s015";

		gpios = <&pcf_hdmi 4 0>,	/* pcf8575@22 P4, CT_CP_HDP */
			<&pcf_hdmi 5 0>,	/* pcf8575@22 P5, LS_OE */
			<&gpio7 12 0>;		/* gpio7_12/sp1_cs2, HPD */

		hdmi_ddc = <&i2c2>;

		hdmi-monitor {
			compatible = "ti,hdmi_panel";
		};
	};
};

&mXT244 {
	compatible = "atmel,mXT244";
	interrupts = <0 119 0x4>;

	atmel,config = <
	/* MXT244_GEN_COMMAND(6) */
	0x00 0x00 0x00 0x00 0x00 0x00
	/* MXT244_GEN_POWER(7) */
	0x20 0xff 0x32
	/* MXT244_GEN_ACQUIRE(8) */
	0x0a 0x00 0x05 0x00 0x00 0x00 0x09 0x23
	/* MXT244_TOUCH_MULTI(9) */
	0x00 0x00 0x00 0x13 0x0b 0x00 0x00 0x00 0x02 0x00
	0x00 0x01 0x01 0x0e 0x0a 0x0a 0x0a 0x0a 0x00 0x00
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00
	/* MXT244_TOUCH_KEYARRAY(15) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00
	/* MXT244_COMMSCONFIG_T18(2) */
	0x00 0x00
	/* MXT244_SPT_GPIOPWM(19) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00 0x00 0x00 0x00 0x00 0x00
	/* MXT244_PROCI_GRIPFACE(20) */
	0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x50 0x28 0x04
	0x0f 0x0a
	/* MXT244_PROCG_NOISE(22) */
	0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x23 0x00
	0x00 0x05 0x0f 0x19 0x23 0x2d 0x03
	/* MXT244_TOUCH_PROXIMITY(23) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00 0x00 0x00 0x00 0x00
	/* MXT244_PROCI_ONETOUCH(24) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	/* MXT244_SPT_SELFTEST(25) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00
	0x00 0x00 0x00 0x00
	/* MXT244_PROCI_TWOTOUCH(27) */
	0x00 0x00 0x00 0x00 0x00 0x00 0x00
	/* MXT244_SPT_CTECONFIG(28) */
	0x00 0x00 0x02 0x08 0x10 0x00 >;

	atmel,x_line = <18>;
	atmel,y_line = <12>;
	atmel,x_size = <800>;
	atmel,y_size = <480>;
	atmel,blen = <0x01>;
	atmel,threshold = <30>;
	atmel,voltage = <2800000>;
	atmel,orient = <0x4>;
};
&qspi {
	spi-max-frequency = <48000000>;
        m25p80@0 {
                compatible = "s25fl256s1";
                spi-max-frequency = <48000000>;
                reg = <0>;
		spi-cpol;
		spi-cpha;
	};
};

&dss {
	vdda_video-supply = <&ldoln_reg>;
};