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authorArve Hjønnevåg2012-11-30 19:05:40 -0600
committerArve Hjønnevåg2013-02-22 17:27:50 -0600
commit684e7d5a80255c3d414f35ffb0230f646fc64f8a (patch)
tree79b0d7303ae31abe213c517454696e9b7607aa2b
parent56063b2f83a2f33ca89f0629f138c951fbca5752 (diff)
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ARM: decompressor: Flush tlb before swiching domain 0 to client mode
If the bootloader used a page table that is incompatible with domain 0 in client mode, and boots with the mmu on, then swithing domain 0 to client mode causes a fault if we don't flush the tlb after updating the page table pointer. Signed-off-by: Arve Hjønnevåg <arve@android.com>
-rw-r--r--arch/arm/boot/compressed/head.S1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head.S b/arch/arm/boot/compressed/head.S
index a2361900db1..4324416e26d 100644
--- a/arch/arm/boot/compressed/head.S
+++ b/arch/arm/boot/compressed/head.S
@@ -716,6 +716,7 @@ __armv7_mmu_cache_on:
716 bic r6, r6, #1 << 31 @ 32-bit translation system 716 bic r6, r6, #1 << 31 @ 32-bit translation system
717 bic r6, r6, #3 << 0 @ use only ttbr0 717 bic r6, r6, #3 << 0 @ use only ttbr0
718 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer 718 mcrne p15, 0, r3, c2, c0, 0 @ load page table pointer
719 mcrne p15, 0, r0, c8, c7, 0 @ flush I,D TLBs
719 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control 720 mcrne p15, 0, r1, c3, c0, 0 @ load domain access control
720 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control 721 mcrne p15, 0, r6, c2, c0, 2 @ load ttb control
721#endif 722#endif