diff options
Diffstat (limited to 'drivers/net/wireless/bcmdhd/include/bcmsdstd.h')
-rw-r--r-- | drivers/net/wireless/bcmdhd/include/bcmsdstd.h | 248 |
1 files changed, 248 insertions, 0 deletions
diff --git a/drivers/net/wireless/bcmdhd/include/bcmsdstd.h b/drivers/net/wireless/bcmdhd/include/bcmsdstd.h new file mode 100644 index 00000000000..c7382540b84 --- /dev/null +++ b/drivers/net/wireless/bcmdhd/include/bcmsdstd.h | |||
@@ -0,0 +1,248 @@ | |||
1 | /* | ||
2 | * 'Standard' SDIO HOST CONTROLLER driver | ||
3 | * | ||
4 | * Copyright (C) 1999-2011, Broadcom Corporation | ||
5 | * | ||
6 | * Unless you and Broadcom execute a separate written software license | ||
7 | * agreement governing use of this software, this software is licensed to you | ||
8 | * under the terms of the GNU General Public License version 2 (the "GPL"), | ||
9 | * available at http://www.broadcom.com/licenses/GPLv2.php, with the | ||
10 | * following added to such license: | ||
11 | * | ||
12 | * As a special exception, the copyright holders of this software give you | ||
13 | * permission to link this software with independent modules, and to copy and | ||
14 | * distribute the resulting executable under terms of your choice, provided that | ||
15 | * you also meet, for each linked independent module, the terms and conditions of | ||
16 | * the license of that module. An independent module is a module which is not | ||
17 | * derived from this software. The special exception does not apply to any | ||
18 | * modifications of the software. | ||
19 | * | ||
20 | * Notwithstanding the above, under no circumstances may you combine this | ||
21 | * software in any way with any other Broadcom software provided under a license | ||
22 | * other than the GPL, without Broadcom's express prior written consent. | ||
23 | * | ||
24 | * $Id: bcmsdstd.h 324819 2012-03-30 12:15:19Z $ | ||
25 | */ | ||
26 | #ifndef _BCM_SD_STD_H | ||
27 | #define _BCM_SD_STD_H | ||
28 | |||
29 | /* global msglevel for debug messages - bitvals come from sdiovar.h */ | ||
30 | #define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0) | ||
31 | #define sd_trace(x) | ||
32 | #define sd_info(x) | ||
33 | #define sd_debug(x) | ||
34 | #define sd_data(x) | ||
35 | #define sd_ctrl(x) | ||
36 | #define sd_dma(x) | ||
37 | |||
38 | #define sd_sync_dma(sd, read, nbytes) | ||
39 | #define sd_init_dma(sd) | ||
40 | #define sd_ack_intr(sd) | ||
41 | #define sd_wakeup(sd); | ||
42 | /* Allocate/init/free per-OS private data */ | ||
43 | extern int sdstd_osinit(sdioh_info_t *sd); | ||
44 | extern void sdstd_osfree(sdioh_info_t *sd); | ||
45 | |||
46 | #define sd_log(x) | ||
47 | |||
48 | #define SDIOH_ASSERT(exp) \ | ||
49 | do { if (!(exp)) \ | ||
50 | printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \ | ||
51 | } while (0) | ||
52 | |||
53 | #define BLOCK_SIZE_4318 64 | ||
54 | #define BLOCK_SIZE_4328 512 | ||
55 | |||
56 | /* internal return code */ | ||
57 | #define SUCCESS 0 | ||
58 | #define ERROR 1 | ||
59 | |||
60 | /* private bus modes */ | ||
61 | #define SDIOH_MODE_SPI 0 | ||
62 | #define SDIOH_MODE_SD1 1 | ||
63 | #define SDIOH_MODE_SD4 2 | ||
64 | |||
65 | #define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */ | ||
66 | #define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */ | ||
67 | |||
68 | #define SDIOH_TYPE_ARASAN_HDK 1 | ||
69 | #define SDIOH_TYPE_BCM27XX 2 | ||
70 | #define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */ | ||
71 | #define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */ | ||
72 | #define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */ | ||
73 | |||
74 | /* For linux, allow yielding for dongle */ | ||
75 | #define BCMSDYIELD | ||
76 | |||
77 | /* Expected card status value for CMD7 */ | ||
78 | #define SDIOH_CMD7_EXP_STATUS 0x00001E00 | ||
79 | |||
80 | #define RETRIES_LARGE 100000 | ||
81 | #define sdstd_os_yield(sd) do {} while (0) | ||
82 | #define RETRIES_SMALL 100 | ||
83 | |||
84 | |||
85 | #define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */ | ||
86 | #define USE_MULTIBLOCK 0x4 | ||
87 | |||
88 | #define USE_FIFO 0x8 /* Fifo vs non-fifo */ | ||
89 | |||
90 | #define CLIENT_INTR 0x100 /* Get rid of this! */ | ||
91 | |||
92 | #define HC_INTR_RETUNING 0x1000 | ||
93 | |||
94 | |||
95 | struct sdioh_info { | ||
96 | uint cfg_bar; /* pci cfg address for bar */ | ||
97 | uint32 caps; /* cached value of capabilities reg */ | ||
98 | uint32 curr_caps; /* max current capabilities reg */ | ||
99 | |||
100 | osl_t *osh; /* osh handler */ | ||
101 | volatile char *mem_space; /* pci device memory va */ | ||
102 | uint lockcount; /* nest count of sdstd_lock() calls */ | ||
103 | bool client_intr_enabled; /* interrupt connnected flag */ | ||
104 | bool intr_handler_valid; /* client driver interrupt handler valid */ | ||
105 | sdioh_cb_fn_t intr_handler; /* registered interrupt handler */ | ||
106 | void *intr_handler_arg; /* argument to call interrupt handler */ | ||
107 | bool initialized; /* card initialized */ | ||
108 | uint target_dev; /* Target device ID */ | ||
109 | uint16 intmask; /* Current active interrupts */ | ||
110 | void *sdos_info; /* Pointer to per-OS private data */ | ||
111 | |||
112 | uint32 controller_type; /* Host controller type */ | ||
113 | uint8 version; /* Host Controller Spec Compliance Version */ | ||
114 | uint irq; /* Client irq */ | ||
115 | int intrcount; /* Client interrupts */ | ||
116 | int local_intrcount; /* Controller interrupts */ | ||
117 | bool host_init_done; /* Controller initted */ | ||
118 | bool card_init_done; /* Client SDIO interface initted */ | ||
119 | bool polled_mode; /* polling for command completion */ | ||
120 | |||
121 | bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */ | ||
122 | /* Must be on for sd_multiblock to be effective */ | ||
123 | bool use_client_ints; /* If this is false, make sure to restore */ | ||
124 | /* polling hack in wl_linux.c:wl_timer() */ | ||
125 | int adapter_slot; /* Maybe dealing with multiple slots/controllers */ | ||
126 | int sd_mode; /* SD1/SD4/SPI */ | ||
127 | int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */ | ||
128 | uint32 data_xfer_count; /* Current transfer */ | ||
129 | uint16 card_rca; /* Current Address */ | ||
130 | int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */ | ||
131 | uint8 num_funcs; /* Supported funcs on client */ | ||
132 | uint32 com_cis_ptr; | ||
133 | uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS]; | ||
134 | void *dma_buf; /* DMA Buffer virtual address */ | ||
135 | ulong dma_phys; /* DMA Buffer physical address */ | ||
136 | void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */ | ||
137 | ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */ | ||
138 | |||
139 | /* adjustments needed to make the dma align properly */ | ||
140 | void *dma_start_buf; | ||
141 | ulong dma_start_phys; | ||
142 | uint alloced_dma_size; | ||
143 | void *adma2_dscr_start_buf; | ||
144 | ulong adma2_dscr_start_phys; | ||
145 | uint alloced_adma2_dscr_size; | ||
146 | |||
147 | int r_cnt; /* rx count */ | ||
148 | int t_cnt; /* tx_count */ | ||
149 | bool got_hcint; /* local interrupt flag */ | ||
150 | uint16 last_intrstatus; /* to cache intrstatus */ | ||
151 | int host_UHSISupported; /* whether UHSI is supported for HC. */ | ||
152 | int card_UHSI_voltage_Supported; /* whether UHSI is supported for | ||
153 | * Card in terms of Voltage [1.8 or 3.3]. | ||
154 | */ | ||
155 | int global_UHSI_Supp; /* type of UHSI support in both host and card. | ||
156 | * HOST_SDR_UNSUPP: capabilities not supported/matched | ||
157 | * HOST_SDR_12_25: SDR12 and SDR25 supported | ||
158 | * HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd | ||
159 | */ | ||
160 | int sd3_dat_state; /* data transfer state used for retuning check */ | ||
161 | int sd3_tun_state; /* tuning state used for retuning check */ | ||
162 | bool sd3_tuning_reqd; /* tuning requirement parameter */ | ||
163 | uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */ | ||
164 | }; | ||
165 | |||
166 | #define DMA_MODE_NONE 0 | ||
167 | #define DMA_MODE_SDMA 1 | ||
168 | #define DMA_MODE_ADMA1 2 | ||
169 | #define DMA_MODE_ADMA2 3 | ||
170 | #define DMA_MODE_ADMA2_64 4 | ||
171 | #define DMA_MODE_AUTO -1 | ||
172 | |||
173 | #define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE)) | ||
174 | |||
175 | /* States for Tuning and corr data */ | ||
176 | #define TUNING_IDLE 0 | ||
177 | #define TUNING_START 1 | ||
178 | #define TUNING_START_AFTER_DAT 2 | ||
179 | #define TUNING_ONGOING 3 | ||
180 | |||
181 | #define DATA_TRANSFER_IDLE 0 | ||
182 | #define DATA_TRANSFER_ONGOING 1 | ||
183 | #define CHECK_TUNING_PRE_DATA 1 | ||
184 | #define CHECK_TUNING_POST_DATA 2 | ||
185 | |||
186 | |||
187 | /************************************************************ | ||
188 | * Internal interfaces: per-port references into bcmsdstd.c | ||
189 | */ | ||
190 | |||
191 | /* Global message bits */ | ||
192 | extern uint sd_msglevel; | ||
193 | |||
194 | /* OS-independent interrupt handler */ | ||
195 | extern bool check_client_intr(sdioh_info_t *sd); | ||
196 | |||
197 | /* Core interrupt enable/disable of device interrupts */ | ||
198 | extern void sdstd_devintr_on(sdioh_info_t *sd); | ||
199 | extern void sdstd_devintr_off(sdioh_info_t *sd); | ||
200 | |||
201 | /* Enable/disable interrupts for local controller events */ | ||
202 | extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err); | ||
203 | extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err); | ||
204 | |||
205 | /* Wait for specified interrupt and error bits to be set */ | ||
206 | extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err); | ||
207 | |||
208 | |||
209 | /************************************************************** | ||
210 | * Internal interfaces: bcmsdstd.c references to per-port code | ||
211 | */ | ||
212 | |||
213 | /* Register mapping routines */ | ||
214 | extern uint32 *sdstd_reg_map(osl_t *osh, int32 addr, int size); | ||
215 | extern void sdstd_reg_unmap(osl_t *osh, int32 addr, int size); | ||
216 | |||
217 | /* Interrupt (de)registration routines */ | ||
218 | extern int sdstd_register_irq(sdioh_info_t *sd, uint irq); | ||
219 | extern void sdstd_free_irq(uint irq, sdioh_info_t *sd); | ||
220 | |||
221 | /* OS-specific interrupt wrappers (atomic interrupt enable/disable) */ | ||
222 | extern void sdstd_lock(sdioh_info_t *sd); | ||
223 | extern void sdstd_unlock(sdioh_info_t *sd); | ||
224 | extern void sdstd_waitlockfree(sdioh_info_t *sd); | ||
225 | |||
226 | /* OS-specific wait-for-interrupt-or-status */ | ||
227 | extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits); | ||
228 | |||
229 | /* used by bcmsdstd_linux [implemented in sdstd] */ | ||
230 | extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd); | ||
231 | extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd); | ||
232 | extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd); | ||
233 | extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param); | ||
234 | extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd); | ||
235 | extern int sdstd_3_get_tune_state(sdioh_info_t *sd); | ||
236 | extern int sdstd_3_get_data_state(sdioh_info_t *sd); | ||
237 | extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state); | ||
238 | extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state); | ||
239 | extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd); | ||
240 | extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd); | ||
241 | extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode); | ||
242 | |||
243 | /* used by sdstd [implemented in bcmsdstd_linux/ndis] */ | ||
244 | extern void sdstd_3_start_tuning(sdioh_info_t *sd); | ||
245 | extern void sdstd_3_osinit_tuning(sdioh_info_t *sd); | ||
246 | extern void sdstd_3_osclean_tuning(sdioh_info_t *sd); | ||
247 | |||
248 | #endif /* _BCM_SD_STD_H */ | ||