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authorVishal Mahaveer2017-10-03 16:16:56 -0500
committerVishal Mahaveer2017-11-08 14:59:08 -0600
commitcda117cad2bcc0b350af8bfb5280754be4bb3322 (patch)
treeda67c5347a54f446c3703eebf918683bc637233c
parent7b21a205a67338ad467283b632da228537b33a85 (diff)
downloadkernel-omap-6AM.1.3-lcard-revb.tar.gz
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kernel-omap-6AM.1.3-lcard-revb.zip
dra71x: lcard: mcasp update for rev-B board6AM.1.3-lcard-revb
In previous version of LCARD, codec's MCLK and SCLK was connected together. In Rev-B board, MCLK has separate input. For now unsing the ATL3 clock explicitly. Change-Id: I0d8323685f934f8f75833320f006b09c5ab2b77b Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Misael Lopez Cruz <misael.lopez@ti.com>
-rw-r--r--arch/arm/boot/dts/dra71-lcard.dts11
1 files changed, 9 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/dra71-lcard.dts b/arch/arm/boot/dts/dra71-lcard.dts
index 13e111e0faee..a9627abc5975 100644
--- a/arch/arm/boot/dts/dra71-lcard.dts
+++ b/arch/arm/boot/dts/dra71-lcard.dts
@@ -211,6 +211,7 @@
211 }; 211 };
212 212
213 simple-audio-card,codec { 213 simple-audio-card,codec {
214 clocks = <&atl_clkin3_ck>;
214 sound-dai = <&tas6424>; 215 sound-dai = <&tas6424>;
215 dai-tdm-slot-num = <8>; 216 dai-tdm-slot-num = <8>;
216 dai-tdm-slot-width = <16>; 217 dai-tdm-slot-width = <16>;
@@ -664,10 +665,11 @@
664 <&atl_gfclk_mux>, 665 <&atl_gfclk_mux>,
665 <&dpll_abe_ck>, 666 <&dpll_abe_ck>,
666 <&dpll_abe_m2x2_ck>, 667 <&dpll_abe_m2x2_ck>,
667 <&atl_clkin1_ck>; 668 <&atl_clkin1_ck>,
669 <&atl_clkin3_ck>;
668 assigned-clock-parents = <&sys_clkin1>, <&dpll_abe_m2_ck>; 670 assigned-clock-parents = <&sys_clkin1>, <&dpll_abe_m2_ck>;
669 assigned-clock-rates = <0>, <0>, <196608000>, <393216000>, 671 assigned-clock-rates = <0>, <0>, <196608000>, <393216000>,
670 <12288000>; 672 <12288000>, <12288000>;
671 673
672 status = "okay"; 674 status = "okay";
673 675
@@ -675,6 +677,11 @@
675 bws = <DRA7_ATL_WS_MCASP2_FSX>; 677 bws = <DRA7_ATL_WS_MCASP2_FSX>;
676 aws = <DRA7_ATL_WS_MCASP3_FSX>; 678 aws = <DRA7_ATL_WS_MCASP3_FSX>;
677 }; 679 };
680
681 atl3 {
682 bws = <DRA7_ATL_WS_MCASP4_FSX>;
683 aws = <DRA7_ATL_WS_MCASP4_FSX>;
684 };
678}; 685};
679 686
680&mcasp2 { 687&mcasp2 {