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authorPraneeth Bajjuri2017-08-28 01:01:02 -0500
committerPraneeth Bajjuri2017-08-28 01:01:02 -0500
commit9906a0f58aa1e80d22b3fc1f73cf334681028617 (patch)
treef5c56c2ec0cc3915324c75a8856efd64da3fb178
parent4a30570aa68d5caf087c67adea0e49186d69e1f0 (diff)
parent26f792a49b7afd179fda261dbd854e2657f952c1 (diff)
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Merge branch 'p-ti-lsk-linux-4.4.y' into p-ti-lsk-linux-4.4.y-next
* p-ti-lsk-linux-4.4.y: (35 commits) ARM: dts: dra7: Remove deprecated PCI compatible string ARM: dts: dra76-evm: Enable x2 PCIe lanes ARM: dts: DRA72x: Use PCIe compatible specific to dra72 ARM: dts: DRA74x: Use PCIe compatible specific to dra74 ARM: dts: dra7: Add properties to enable PCIe x2 lane mode PCI: dwc: pci-dra7xx: Enable x2 mode support PCI: dwc: dra7xx: Add support for SoC specific compatible strings dt-bindings: PCI: dra7xx: Add properties to enable x2 lane in dra7 dt-bindings: PCI: dra7xx: Add SoC specific compatible strings ARM: dts: dra7-evm: Move pcie RC node to common file ARM: dts: dra76-evm: add higher speed MMC/SD modes Linux 4.4.84 usb: qmi_wwan: add D-Link DWM-222 device ID usb: optimize acpi companion search for usb port devices perf/x86: Fix LBR related crashes on Intel Atom pids: make task_tgid_nr_ns() safe Sanitize 'move_pages()' permission checks irqchip/atmel-aic: Fix unbalanced refcount in aic_common_rtc_irq_fixup() irqchip/atmel-aic: Fix unbalanced of_node_put() in aic_common_irq_fixup() x86/asm/64: Clear AC on NMI entries ... Change-Id: If3cd3c2bf1937346aecf0e3d6ec650e324744b1b Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
-rw-r--r--Documentation/devicetree/bindings/pci/ti-pci.txt12
-rw-r--r--Makefile2
-rw-r--r--arch/arm/boot/dts/dra7-evm-common.dtsi4
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi7
-rw-r--r--arch/arm/boot/dts/dra72x.dtsi12
-rw-r--r--arch/arm/boot/dts/dra74x.dtsi12
-rw-r--r--arch/arm/boot/dts/dra76-evm.dts61
-rw-r--r--arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi435
-rw-r--r--arch/arm/mach-omap2/id.c5
-rw-r--r--arch/arm/mach-omap2/soc.h1
-rw-r--r--arch/arm64/include/asm/elf.h4
-rw-r--r--arch/x86/crypto/sha1_avx2_x86_64_asm.S67
-rw-r--r--arch/x86/crypto/sha1_ssse3_glue.c2
-rw-r--r--arch/x86/entry/entry_64.S2
-rw-r--r--arch/x86/include/asm/elf.h4
-rw-r--r--arch/x86/kernel/cpu/perf_event_intel_lbr.c8
-rw-r--r--drivers/input/mouse/elan_i2c_core.c4
-rw-r--r--drivers/irqchip/irq-atmel-aic-common.c5
-rw-r--r--drivers/net/usb/qmi_wwan.c1
-rw-r--r--drivers/parisc/dino.c2
-rw-r--r--drivers/pci/controller/pci-dra7xx.c80
-rw-r--r--drivers/usb/core/usb-acpi.c26
-rw-r--r--drivers/xen/biomerge.c3
-rw-r--r--include/linux/pid.h4
-rw-r--r--include/linux/sched.h50
-rw-r--r--kernel/audit_watch.c12
-rw-r--r--kernel/pid.c11
-rw-r--r--mm/mempolicy.c5
-rw-r--r--mm/migrate.c11
-rw-r--r--net/netfilter/nf_conntrack_extend.c13
-rw-r--r--sound/core/seq/seq_clientmgr.c13
-rw-r--r--sound/core/seq/seq_queue.c14
-rw-r--r--sound/core/seq/seq_queue.h2
-rw-r--r--sound/usb/mixer.c2
-rw-r--r--sound/usb/mixer.h1
-rw-r--r--sound/usb/mixer_quirks.c6
-rw-r--r--sound/usb/quirks.c1
38 files changed, 739 insertions, 169 deletions
diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt b/Documentation/devicetree/bindings/pci/ti-pci.txt
index 85746eca3632..57bf112a09be 100644
--- a/Documentation/devicetree/bindings/pci/ti-pci.txt
+++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
@@ -1,14 +1,22 @@
1TI PCI Controllers 1TI PCI Controllers
2 2
3PCIe Designware Controller 3PCIe Designware Controller
4 - compatible: Should be "ti,dra7-pcie" for RC 4 - compatible: Should be "ti,dra7-pcie" for RC (deprecated)
5 Should be "ti,dra7-pcie-ep" for EP 5 Should be "ti,dra7-pcie-ep" for EP (deprecated)
6 Should be "ti,dra746-pcie-rc" for dra74x/dra76 in RC mode
7 Should be "ti,dra746-pcie-ep" for dra74x/dra76 in EP mode
8 Should be "ti,dra726-pcie-rc" for dra72x in RC mode
9 Should be "ti,dra726-pcie-ep" for dra72x in EP mode
6 - phys : list of PHY specifiers (used by generic PHY framework) 10 - phys : list of PHY specifiers (used by generic PHY framework)
7 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the 11 - phy-names : must be "pcie-phy0", "pcie-phy1", "pcie-phyN".. based on the
8 number of PHYs as specified in *phys* property. 12 number of PHYs as specified in *phys* property.
9 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>", 13 - ti,hwmods : Name of the hwmod associated to the pcie, "pcie<X>",
10 where <X> is the instance number of the pcie from the HW spec. 14 where <X> is the instance number of the pcie from the HW spec.
11 - num-lanes as specified in ../designware-pcie.txt 15 - num-lanes as specified in ../designware-pcie.txt
16 - syscon-lane-conf : phandle/offset pair. Phandle to the system control module and the
17 register offset to specify 1 lane or 2 lane.
18 - syscon-lane-sel : phandle/offset pair. Phandle to the system control module and the
19 register offset to specify lane selection.
12 20
13HOST MODE 21HOST MODE
14========= 22=========
diff --git a/Makefile b/Makefile
index 7f67b35caf99..9d77ac063ec0 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
1VERSION = 4 1VERSION = 4
2PATCHLEVEL = 4 2PATCHLEVEL = 4
3SUBLEVEL = 83 3SUBLEVEL = 84
4EXTRAVERSION = 4EXTRAVERSION =
5NAME = Blurry Fish Butt 5NAME = Blurry Fish Butt
6 6
diff --git a/arch/arm/boot/dts/dra7-evm-common.dtsi b/arch/arm/boot/dts/dra7-evm-common.dtsi
index 4d506d86eee9..2bbc04791628 100644
--- a/arch/arm/boot/dts/dra7-evm-common.dtsi
+++ b/arch/arm/boot/dts/dra7-evm-common.dtsi
@@ -387,3 +387,7 @@
387 }; 387 };
388 }; 388 };
389}; 389};
390
391&pcie1_rc {
392 status = "okay";
393};
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 9171c04dd954..aee34b6d45c1 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -938,10 +938,6 @@ i2c_p3_exp: &i2c2 {
938 vdd-supply = <&smps7_reg>; 938 vdd-supply = <&smps7_reg>;
939}; 939};
940 940
941&pcie1_rc {
942 status = "okay";
943};
944
945&omap_dwc3_2 { 941&omap_dwc3_2 {
946 extcon = <&extcon_usb2>; 942 extcon = <&extcon_usb2>;
947}; 943};
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a05300c64bf3..f9b778bb6a13 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -300,7 +300,6 @@
300 * node and enable pcie1_ep mode. 300 * node and enable pcie1_ep mode.
301 */ 301 */
302 pcie1_rc: pcie_rc@51000000 { 302 pcie1_rc: pcie_rc@51000000 {
303 compatible = "ti,dra7-pcie";
304 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>; 303 reg = <0x51000000 0x2000>, <0x51002000 0x14c>, <0x1000 0x2000>;
305 reg-names = "rc_dbics", "ti_conf", "config"; 304 reg-names = "rc_dbics", "ti_conf", "config";
306 interrupts = <0 232 0x4>, <0 233 0x4>; 305 interrupts = <0 232 0x4>, <0 233 0x4>;
@@ -315,6 +314,8 @@
315 ti,hwmods = "pcie1"; 314 ti,hwmods = "pcie1";
316 phys = <&pcie1_phy>; 315 phys = <&pcie1_phy>;
317 phy-names = "pcie-phy0"; 316 phy-names = "pcie-phy0";
317 syscon-lane-conf = <&scm_conf 0x558>;
318 syscon-lane-sel = <&scm_conf_pcie 0x18>;
318 interrupt-map-mask = <0 0 0 7>; 319 interrupt-map-mask = <0 0 0 7>;
319 interrupt-map = <0 0 0 1 &pcie1_intc 1>, 320 interrupt-map = <0 0 0 1 &pcie1_intc 1>,
320 <0 0 0 2 &pcie1_intc 2>, 321 <0 0 0 2 &pcie1_intc 2>,
@@ -329,7 +330,6 @@
329 }; 330 };
330 331
331 pcie1_ep: pcie_ep@51000000 { 332 pcie1_ep: pcie_ep@51000000 {
332 compatible = "ti,dra7-pcie-ep";
333 reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>; 333 reg = <0x51000000 0x28>, <0x51002000 0x14c>, <0x51001000 0x28>, <0x1000 0x10000000>;
334 reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space"; 334 reg-names = "ep_dbics", "ti_conf", "ep_dbics2", "addr_space";
335 interrupts = <0 232 0x4>; 335 interrupts = <0 232 0x4>;
@@ -351,8 +351,7 @@
351 ranges = <0x51800000 0x51800000 0x3000 351 ranges = <0x51800000 0x51800000 0x3000
352 0x0 0x30000000 0x10000000>; 352 0x0 0x30000000 0x10000000>;
353 status = "disabled"; 353 status = "disabled";
354 pcie@51800000 { 354 pcie2_rc: pcie@51800000 {
355 compatible = "ti,dra7-pcie";
356 reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>; 355 reg = <0x51800000 0x2000>, <0x51802000 0x14c>, <0x1000 0x2000>;
357 reg-names = "rc_dbics", "ti_conf", "config"; 356 reg-names = "rc_dbics", "ti_conf", "config";
358 interrupts = <0 355 0x4>, <0 356 0x4>; 357 interrupts = <0 355 0x4>, <0 356 0x4>;
diff --git a/arch/arm/boot/dts/dra72x.dtsi b/arch/arm/boot/dts/dra72x.dtsi
index 68341c30beb1..29705754460c 100644
--- a/arch/arm/boot/dts/dra72x.dtsi
+++ b/arch/arm/boot/dts/dra72x.dtsi
@@ -140,3 +140,15 @@
140 status = "disabled"; 140 status = "disabled";
141 }; 141 };
142}; 142};
143
144&pcie1_rc {
145 compatible = "ti,dra726-pcie-rc";
146};
147
148&pcie1_ep {
149 compatible = "ti,dra726-pcie-ep";
150};
151
152&pcie2_rc {
153 compatible = "ti,dra726-pcie-rc";
154};
diff --git a/arch/arm/boot/dts/dra74x.dtsi b/arch/arm/boot/dts/dra74x.dtsi
index b96f6c7f77d0..a95a1d17ad2d 100644
--- a/arch/arm/boot/dts/dra74x.dtsi
+++ b/arch/arm/boot/dts/dra74x.dtsi
@@ -259,3 +259,15 @@
259 status = "disabled"; 259 status = "disabled";
260 }; 260 };
261}; 261};
262
263&pcie1_rc {
264 compatible = "ti,dra746-pcie-rc";
265};
266
267&pcie1_ep {
268 compatible = "ti,dra746-pcie-ep";
269};
270
271&pcie2_rc {
272 compatible = "ti,dra746-pcie-rc";
273};
diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts
index 946a9a69038b..213f4b53f965 100644
--- a/arch/arm/boot/dts/dra76-evm.dts
+++ b/arch/arm/boot/dts/dra76-evm.dts
@@ -9,6 +9,7 @@
9 9
10#include "dra76x.dtsi" 10#include "dra76x.dtsi"
11#include "dra7-evm-common.dtsi" 11#include "dra7-evm-common.dtsi"
12#include "dra76x-mmc-iodelay.dtsi"
12#include <dt-bindings/net/ti-dp83867.h> 13#include <dt-bindings/net/ti-dp83867.h>
13 14
14/ { 15/ {
@@ -138,46 +139,6 @@
138 }; 139 };
139}; 140};
140 141
141&dra7_pmx_core {
142 mmc1_pins_default: mmc1_pins_default {
143 pinctrl-single,pins = <
144 DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
145 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
146 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
147 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
148 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
149 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
150 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
151 >;
152 };
153
154 mmc2_pins_default: mmc2_pins_default {
155 pinctrl-single,pins = <
156 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
157 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
158 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
159 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
160 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
161 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
162 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
163 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
164 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
165 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
166 >;
167 };
168
169 mmc4_pins_default: mmc4_pins_default {
170 pinctrl-single,pins = <
171 DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
172 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
173 DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
174 DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
175 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
176 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
177 >;
178 };
179};
180
181&i2c1 { 142&i2c1 {
182 status = "okay"; 143 status = "okay";
183 clock-frequency = <400000>; 144 clock-frequency = <400000>;
@@ -395,16 +356,22 @@
395 * is always hardwired. 356 * is always hardwired.
396 */ 357 */
397 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; 358 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
398 pinctrl-names = "default"; 359 max-frequency = <192000000>;
360 pinctrl-names = "default", "hs";
399 pinctrl-0 = <&mmc1_pins_default>; 361 pinctrl-0 = <&mmc1_pins_default>;
362 pinctrl-1 = <&mmc1_pins_hs>;
400}; 363};
401 364
402&mmc2 { 365&mmc2 {
403 status = "okay"; 366 status = "okay";
404 vmmc-supply = <&vio_1v8>; 367 vmmc-supply = <&vio_1v8>;
405 bus-width = <8>; 368 bus-width = <8>;
406 pinctrl-names = "default"; 369 max-frequency = <192000000>;
370 pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
407 pinctrl-0 = <&mmc2_pins_default>; 371 pinctrl-0 = <&mmc2_pins_default>;
372 pinctrl-1 = <&mmc2_pins_hs>;
373 pinctrl-2 = <&mmc2_pins_ddr>;
374 pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
408}; 375};
409 376
410&oppdm_mpu { 377&oppdm_mpu {
@@ -519,3 +486,13 @@
519 spi-max-frequency = <96000000>; 486 spi-max-frequency = <96000000>;
520 }; 487 };
521}; 488};
489
490&pcie2_phy {
491 status = "okay";
492};
493
494&pcie1_rc {
495 num-lanes = <2>;
496 phys = <&pcie1_phy>, <&pcie2_phy>;
497 phy-names = "pcie-phy0", "pcie-phy1";
498};
diff --git a/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi b/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
new file mode 100644
index 000000000000..c95a8a1091ab
--- /dev/null
+++ b/arch/arm/boot/dts/dra76x-mmc-iodelay.dtsi
@@ -0,0 +1,435 @@
1/*
2 * MMC IOdelay values for TI's DRA76x and AM576x SoCs.
3 *
4 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16/*
17 * Rules for modifying this file:
18 * a) Update of this file should typically correspond to a datamanual revision.
19 * Datamanual revision that was used should be updated in comment below.
20 * If there is no update to datamanual, do not update the values. If you
21 * need to use values different from that recommended by the datamanual
22 * for your design, then you should consider adding values to the device-
23 * -tree file for your board directly.
24 * b) We keep the mode names as close to the datamanual as possible. So
25 * if the manual calls a mode, DDR50, or DDR or DDR 1.8v or DDR 3.3v,
26 * we follow that in code too.
27 * c) If the values change between multiple revisions of silicon, we add
28 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
29 * 'rev20' for PG 2.0 and so on.
30 * d) The node name and node label should be the exact same string. This is
31 * to curb naming creativity and achieve consistency.
32 *
33 * Datamanual Revisions:
34 *
35 * DRA76x Silicon Revision 1.0: SPRS993A, Revised July 2017
36 *
37 */
38
39&dra7_pmx_core {
40 mmc1_pins_default: mmc1_pins_default {
41 pinctrl-single,pins = <
42 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
43 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
44 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
45 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
46 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
47 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
48 >;
49 };
50
51 mmc1_pins_sdr12: mmc1_pins_sdr12 {
52 pinctrl-single,pins = <
53 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
54 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
55 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
56 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
57 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
58 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
59 >;
60 };
61
62 mmc1_pins_hs: mmc1_pins_hs {
63 pinctrl-single,pins = <
64 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
65 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
66 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
67 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
68 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
69 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
70 >;
71 };
72
73 mmc1_pins_sdr25: mmc1_pins_sdr25 {
74 pinctrl-single,pins = <
75 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
76 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
77 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
78 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
79 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
80 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
81 >;
82 };
83
84 mmc1_pins_sdr50: mmc1_pins_sdr50 {
85 pinctrl-single,pins = <
86 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */
87 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */
88 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */
89 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat1.dat1 */
90 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat2.dat2 */
91 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat3.dat3 */
92 >;
93 };
94
95 mmc1_pins_ddr50: mmc1_pins_ddr50 {
96 pinctrl-single,pins = <
97 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
98 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
99 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
100 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */
101 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */
102 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */
103 >;
104 };
105
106 mmc1_pins_sdr104: mmc1_pins_sdr104 {
107 pinctrl-single,pins = <
108 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
109 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
110 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
111 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */
112 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */
113 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */
114 >;
115 };
116
117 mmc2_pins_default: mmc2_pins_default {
118 pinctrl-single,pins = <
119 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
120 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
121 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
122 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
123 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
124 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
125 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
126 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
127 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
128 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
129 >;
130 };
131
132 mmc2_pins_hs: mmc2_pins_hs {
133 pinctrl-single,pins = <
134 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
135 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
136 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
137 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
138 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
139 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
140 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
141 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
142 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
143 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
144 >;
145 };
146
147 mmc2_pins_ddr: mmc2_pins_ddr {
148 pinctrl-single,pins = <
149 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
150 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
151 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
152 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
153 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
154 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
155 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
156 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
157 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
158 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
159 >;
160 };
161
162 mmc2_pins_hs200: mmc2_pins_hs200 {
163 pinctrl-single,pins = <
164 DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
165 DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
166 DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
167 DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
168 DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
169 DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
170 DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
171 DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
172 DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
173 DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
174 >;
175 };
176
177 mmc3_pins_default: mmc3_pins_default {
178 pinctrl-single,pins = <
179 DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
180 DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
181 DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
182 DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
183 DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
184 DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
185 >;
186 };
187
188 mmc3_pins_hs: mmc3_pins_hs {
189 pinctrl-single,pins = <
190 DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
191 DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
192 DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
193 DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
194 DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
195 DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
196 >;
197 };
198
199 mmc3_pins_sdr12: mmc3_pins_sdr12 {
200 pinctrl-single,pins = <
201 DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
202 DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
203 DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
204 DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
205 DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
206 DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
207 >;
208 };
209
210 mmc3_pins_sdr25: mmc3_pins_sdr25 {
211 pinctrl-single,pins = <
212 DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
213 DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
214 DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
215 DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
216 DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
217 DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
218 >;
219 };
220
221 mmc3_pins_sdr50: mmc3_pins_sdr50 {
222 pinctrl-single,pins = <
223 DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
224 DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
225 DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
226 DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
227 DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
228 DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
229 >;
230 };
231
232 mmc4_pins_default: mmc4_pins_default {
233 pinctrl-single,pins = <
234 DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
235 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
236 DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
237 DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
238 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
239 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
240 >;
241 };
242
243 mmc4_pins_sdr12: mmc4_pins_sdr12 {
244 pinctrl-single,pins = <
245 DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
246 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
247 DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
248 DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
249 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
250 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
251 >;
252 };
253
254 mmc4_pins_hs: mmc4_pins_hs {
255 pinctrl-single,pins = <
256 DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
257 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
258 DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
259 DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
260 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
261 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
262 >;
263 };
264
265 mmc4_pins_sdr25: mmc4_pins_sdr25 {
266 pinctrl-single,pins = <
267 DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
268 DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
269 DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
270 DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
271 DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
272 DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
273 >;
274 };
275};
276
277&dra7_iodelay_core {
278
279 /* Corresponds to MMC1_DDR_MANUAL1 in datamanual */
280 mmc1_iodelay_ddr_conf: mmc1_iodelay_ddr_conf {
281 pinctrl-single,pins = <
282 0x618 (A_DELAY(489) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */
283 0x624 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */
284 0x630 (A_DELAY(374) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */
285 0x63c (A_DELAY(31) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */
286 0x648 (A_DELAY(56) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */
287 0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */
288 0x620 (A_DELAY(1355) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
289 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
290 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
291 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
292 0x638 (A_DELAY(0) | G_DELAY(4)) /* CFG_MMC1_DAT0_OUT */
293 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
294 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
295 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
296 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
297 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
298 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
299 >;
300 };
301
302 /* Corresponds to MMC1_SDR104_MANUAL1 in datamanual */
303 mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf {
304 pinctrl-single,pins = <
305 0x620 (A_DELAY(892) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
306 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
307 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
308 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
309 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
310 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
311 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
312 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
313 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
314 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
315 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
316 >;
317 };
318
319 /* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
320 mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf {
321 pinctrl-single,pins = <
322 0x190 (A_DELAY(384) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
323 0x194 (A_DELAY(0) | G_DELAY(174)) /* CFG_GPMC_A19_OUT */
324 0x1a8 (A_DELAY(410) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
325 0x1ac (A_DELAY(85) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
326 0x1b4 (A_DELAY(468) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
327 0x1b8 (A_DELAY(139) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
328 0x1c0 (A_DELAY(676) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
329 0x1c4 (A_DELAY(69) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
330 0x1d0 (A_DELAY(1062) | G_DELAY(154)) /* CFG_GPMC_A23_OUT */
331 0x1d8 (A_DELAY(640) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
332 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
333 0x1e4 (A_DELAY(356) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
334 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
335 0x1f0 (A_DELAY(579) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
336 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
337 0x1fc (A_DELAY(435) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
338 0x200 (A_DELAY(36) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
339 0x364 (A_DELAY(759) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
340 0x368 (A_DELAY(72) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
341 >;
342 };
343
344 /* Corresponds to MMC3_MANUAL1 in datamanual */
345 mmc3_iodelay_manual1_conf: mmc3_iodelay_manual1_conf {
346 pinctrl-single,pins = <
347 0x678 (A_DELAY(0) | G_DELAY(386)) /* CFG_MMC3_CLK_IN */
348 0x680 (A_DELAY(605) | G_DELAY(0)) /* CFG_MMC3_CLK_OUT */
349 0x684 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_IN */
350 0x688 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OEN */
351 0x68c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OUT */
352 0x690 (A_DELAY(171) | G_DELAY(0)) /* CFG_MMC3_DAT0_IN */
353 0x694 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OEN */
354 0x698 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OUT */
355 0x69c (A_DELAY(221) | G_DELAY(0)) /* CFG_MMC3_DAT1_IN */
356 0x6a0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OEN */
357 0x6a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OUT */
358 0x6a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_IN */
359 0x6ac (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OEN */
360 0x6b0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OUT */
361 0x6b4 (A_DELAY(474) | G_DELAY(0)) /* CFG_MMC3_DAT3_IN */
362 0x6b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OEN */
363 0x6bc (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OUT */
364 >;
365 };
366
367 /* Corresponds to MMC3_MANUAL2 in datamanual */
368 mmc3_iodelay_sdr50_conf: mmc3_iodelay_sdr50_conf {
369 pinctrl-single,pins = <
370 0x678 (A_DELAY(852) | G_DELAY(0)) /* CFG_MMC3_CLK_IN */
371 0x680 (A_DELAY(94) | G_DELAY(0)) /* CFG_MMC3_CLK_OUT */
372 0x684 (A_DELAY(122) | G_DELAY(0)) /* CFG_MMC3_CMD_IN */
373 0x688 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OEN */
374 0x68c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_CMD_OUT */
375 0x690 (A_DELAY(91) | G_DELAY(0)) /* CFG_MMC3_DAT0_IN */
376 0x694 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OEN */
377 0x698 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT0_OUT */
378 0x69c (A_DELAY(57) | G_DELAY(0)) /* CFG_MMC3_DAT1_IN */
379 0x6a0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OEN */
380 0x6a4 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT1_OUT */
381 0x6a8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_IN */
382 0x6ac (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OEN */
383 0x6b0 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT2_OUT */
384 0x6b4 (A_DELAY(375) | G_DELAY(0)) /* CFG_MMC3_DAT3_IN */
385 0x6b8 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OEN */
386 0x6bc (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC3_DAT3_OUT */
387 >;
388 };
389
390 /* Corresponds to MMC4_MANUAL1 in datamanual */
391 mmc4_iodelay_manual1_conf: mmc4_iodelay_manual1_conf {
392 pinctrl-single,pins = <
393 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
394 0x848 (A_DELAY(1147) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
395 0x84c (A_DELAY(1834) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
396 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
397 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
398 0x870 (A_DELAY(2165) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
399 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
400 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
401 0x87c (A_DELAY(1929) | G_DELAY(64)) /* CFG_UART2_RTSN_IN */
402 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
403 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
404 0x888 (A_DELAY(1935) | G_DELAY(128)) /* CFG_UART2_RXD_IN */
405 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
406 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
407 0x894 (A_DELAY(2172) | G_DELAY(44)) /* CFG_UART2_TXD_IN */
408 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
409 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
410 >;
411 };
412
413 /* Corresponds to MMC4_DS_MANUAL1 in datamanual */
414 mmc4_iodelay_default_conf: mmc4_iodelay_default_conf {
415 pinctrl-single,pins = <
416 0x840 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_IN */
417 0x848 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_CTSN_OUT */
418 0x84c (A_DELAY(307) | G_DELAY(0)) /* CFG_UART1_RTSN_IN */
419 0x850 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OEN */
420 0x854 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART1_RTSN_OUT */
421 0x870 (A_DELAY(785) | G_DELAY(0)) /* CFG_UART2_CTSN_IN */
422 0x874 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OEN */
423 0x878 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_CTSN_OUT */
424 0x87c (A_DELAY(613) | G_DELAY(0)) /* CFG_UART2_RTSN_IN */
425 0x880 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OEN */
426 0x884 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RTSN_OUT */
427 0x888 (A_DELAY(683) | G_DELAY(0)) /* CFG_UART2_RXD_IN */
428 0x88c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OEN */
429 0x890 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_RXD_OUT */
430 0x894 (A_DELAY(835) | G_DELAY(0)) /* CFG_UART2_TXD_IN */
431 0x898 (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OEN */
432 0x89c (A_DELAY(0) | G_DELAY(0)) /* CFG_UART2_TXD_OUT */
433 >;
434 };
435};
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c
index a42faa42fd5e..5a357f5a1b6c 100644
--- a/arch/arm/mach-omap2/id.c
+++ b/arch/arm/mach-omap2/id.c
@@ -677,9 +677,12 @@ void __init dra7xxx_check_revision(void)
677 omap_revision = DRA722_REV_ES1_0; 677 omap_revision = DRA722_REV_ES1_0;
678 break; 678 break;
679 case 1: 679 case 1:
680 default:
681 omap_revision = DRA722_REV_ES2_0; 680 omap_revision = DRA722_REV_ES2_0;
682 break; 681 break;
682 case 2:
683 default:
684 omap_revision = DRA722_REV_ES2_1;
685 break;
683 } 686 }
684 break; 687 break;
685 688
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h
index 85e3b598d036..1ae1b6fe0370 100644
--- a/arch/arm/mach-omap2/soc.h
+++ b/arch/arm/mach-omap2/soc.h
@@ -494,6 +494,7 @@ IS_OMAP_TYPE(3430, 0x3430)
494#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8)) 494#define DRA752_REV_ES2_0 (DRA7XX_CLASS | (0x52 << 16) | (0x20 << 8))
495#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8)) 495#define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8))
496#define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8)) 496#define DRA722_REV_ES2_0 (DRA7XX_CLASS | (0x22 << 16) | (0x20 << 8))
497#define DRA722_REV_ES2_1 (DRA7XX_CLASS | (0x22 << 16) | (0x21 << 8))
497 498
498void omap2xxx_check_revision(void); 499void omap2xxx_check_revision(void);
499void omap3xxx_check_revision(void); 500void omap3xxx_check_revision(void);
diff --git a/arch/arm64/include/asm/elf.h b/arch/arm64/include/asm/elf.h
index 8fbc5c7faf70..cd3dfa346649 100644
--- a/arch/arm64/include/asm/elf.h
+++ b/arch/arm64/include/asm/elf.h
@@ -114,10 +114,10 @@
114 114
115/* 115/*
116 * This is the base location for PIE (ET_DYN with INTERP) loads. On 116 * This is the base location for PIE (ET_DYN with INTERP) loads. On
117 * 64-bit, this is raised to 4GB to leave the entire 32-bit address 117 * 64-bit, this is above 4GB to leave the entire 32-bit address
118 * space open for things that want to use the area for 32-bit pointers. 118 * space open for things that want to use the area for 32-bit pointers.
119 */ 119 */
120#define ELF_ET_DYN_BASE 0x100000000UL 120#define ELF_ET_DYN_BASE (2 * TASK_SIZE_64 / 3)
121 121
122#ifndef __ASSEMBLY__ 122#ifndef __ASSEMBLY__
123 123
diff --git a/arch/x86/crypto/sha1_avx2_x86_64_asm.S b/arch/x86/crypto/sha1_avx2_x86_64_asm.S
index 1cd792db15ef..1eab79c9ac48 100644
--- a/arch/x86/crypto/sha1_avx2_x86_64_asm.S
+++ b/arch/x86/crypto/sha1_avx2_x86_64_asm.S
@@ -117,11 +117,10 @@
117 .set T1, REG_T1 117 .set T1, REG_T1
118.endm 118.endm
119 119
120#define K_BASE %r8
121#define HASH_PTR %r9 120#define HASH_PTR %r9
121#define BLOCKS_CTR %r8
122#define BUFFER_PTR %r10 122#define BUFFER_PTR %r10
123#define BUFFER_PTR2 %r13 123#define BUFFER_PTR2 %r13
124#define BUFFER_END %r11
125 124
126#define PRECALC_BUF %r14 125#define PRECALC_BUF %r14
127#define WK_BUF %r15 126#define WK_BUF %r15
@@ -205,14 +204,14 @@
205 * blended AVX2 and ALU instruction scheduling 204 * blended AVX2 and ALU instruction scheduling
206 * 1 vector iteration per 8 rounds 205 * 1 vector iteration per 8 rounds
207 */ 206 */
208 vmovdqu ((i * 2) + PRECALC_OFFSET)(BUFFER_PTR), W_TMP 207 vmovdqu (i * 2)(BUFFER_PTR), W_TMP
209 .elseif ((i & 7) == 1) 208 .elseif ((i & 7) == 1)
210 vinsertf128 $1, (((i-1) * 2)+PRECALC_OFFSET)(BUFFER_PTR2),\ 209 vinsertf128 $1, ((i-1) * 2)(BUFFER_PTR2),\
211 WY_TMP, WY_TMP 210 WY_TMP, WY_TMP
212 .elseif ((i & 7) == 2) 211 .elseif ((i & 7) == 2)
213 vpshufb YMM_SHUFB_BSWAP, WY_TMP, WY 212 vpshufb YMM_SHUFB_BSWAP, WY_TMP, WY
214 .elseif ((i & 7) == 4) 213 .elseif ((i & 7) == 4)
215 vpaddd K_XMM(K_BASE), WY, WY_TMP 214 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
216 .elseif ((i & 7) == 7) 215 .elseif ((i & 7) == 7)
217 vmovdqu WY_TMP, PRECALC_WK(i&~7) 216 vmovdqu WY_TMP, PRECALC_WK(i&~7)
218 217
@@ -255,7 +254,7 @@
255 vpxor WY, WY_TMP, WY_TMP 254 vpxor WY, WY_TMP, WY_TMP
256 .elseif ((i & 7) == 7) 255 .elseif ((i & 7) == 7)
257 vpxor WY_TMP2, WY_TMP, WY 256 vpxor WY_TMP2, WY_TMP, WY
258 vpaddd K_XMM(K_BASE), WY, WY_TMP 257 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
259 vmovdqu WY_TMP, PRECALC_WK(i&~7) 258 vmovdqu WY_TMP, PRECALC_WK(i&~7)
260 259
261 PRECALC_ROTATE_WY 260 PRECALC_ROTATE_WY
@@ -291,7 +290,7 @@
291 vpsrld $30, WY, WY 290 vpsrld $30, WY, WY
292 vpor WY, WY_TMP, WY 291 vpor WY, WY_TMP, WY
293 .elseif ((i & 7) == 7) 292 .elseif ((i & 7) == 7)
294 vpaddd K_XMM(K_BASE), WY, WY_TMP 293 vpaddd K_XMM + K_XMM_AR(%rip), WY, WY_TMP
295 vmovdqu WY_TMP, PRECALC_WK(i&~7) 294 vmovdqu WY_TMP, PRECALC_WK(i&~7)
296 295
297 PRECALC_ROTATE_WY 296 PRECALC_ROTATE_WY
@@ -446,6 +445,16 @@
446 445
447.endm 446.endm
448 447
448/* Add constant only if (%2 > %3) condition met (uses RTA as temp)
449 * %1 + %2 >= %3 ? %4 : 0
450 */
451.macro ADD_IF_GE a, b, c, d
452 mov \a, RTA
453 add $\d, RTA
454 cmp $\c, \b
455 cmovge RTA, \a
456.endm
457
449/* 458/*
450 * macro implements 80 rounds of SHA-1, for multiple blocks with s/w pipelining 459 * macro implements 80 rounds of SHA-1, for multiple blocks with s/w pipelining
451 */ 460 */
@@ -463,13 +472,16 @@
463 lea (2*4*80+32)(%rsp), WK_BUF 472 lea (2*4*80+32)(%rsp), WK_BUF
464 473
465 # Precalc WK for first 2 blocks 474 # Precalc WK for first 2 blocks
466 PRECALC_OFFSET = 0 475 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 2, 64
467 .set i, 0 476 .set i, 0
468 .rept 160 477 .rept 160
469 PRECALC i 478 PRECALC i
470 .set i, i + 1 479 .set i, i + 1
471 .endr 480 .endr
472 PRECALC_OFFSET = 128 481
482 /* Go to next block if needed */
483 ADD_IF_GE BUFFER_PTR, BLOCKS_CTR, 3, 128
484 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 4, 128
473 xchg WK_BUF, PRECALC_BUF 485 xchg WK_BUF, PRECALC_BUF
474 486
475 .align 32 487 .align 32
@@ -479,8 +491,8 @@ _loop:
479 * we use K_BASE value as a signal of a last block, 491 * we use K_BASE value as a signal of a last block,
480 * it is set below by: cmovae BUFFER_PTR, K_BASE 492 * it is set below by: cmovae BUFFER_PTR, K_BASE
481 */ 493 */
482 cmp K_BASE, BUFFER_PTR 494 test BLOCKS_CTR, BLOCKS_CTR
483 jne _begin 495 jnz _begin
484 .align 32 496 .align 32
485 jmp _end 497 jmp _end
486 .align 32 498 .align 32
@@ -512,10 +524,10 @@ _loop0:
512 .set j, j+2 524 .set j, j+2
513 .endr 525 .endr
514 526
515 add $(2*64), BUFFER_PTR /* move to next odd-64-byte block */ 527 /* Update Counter */
516 cmp BUFFER_END, BUFFER_PTR /* is current block the last one? */ 528 sub $1, BLOCKS_CTR
517 cmovae K_BASE, BUFFER_PTR /* signal the last iteration smartly */ 529 /* Move to the next block only if needed*/
518 530 ADD_IF_GE BUFFER_PTR, BLOCKS_CTR, 4, 128
519 /* 531 /*
520 * rounds 532 * rounds
521 * 60,62,64,66,68 533 * 60,62,64,66,68
@@ -532,8 +544,8 @@ _loop0:
532 UPDATE_HASH 12(HASH_PTR), D 544 UPDATE_HASH 12(HASH_PTR), D
533 UPDATE_HASH 16(HASH_PTR), E 545 UPDATE_HASH 16(HASH_PTR), E
534 546
535 cmp K_BASE, BUFFER_PTR /* is current block the last one? */ 547 test BLOCKS_CTR, BLOCKS_CTR
536 je _loop 548 jz _loop
537 549
538 mov TB, B 550 mov TB, B
539 551
@@ -575,10 +587,10 @@ _loop2:
575 .set j, j+2 587 .set j, j+2
576 .endr 588 .endr
577 589
578 add $(2*64), BUFFER_PTR2 /* move to next even-64-byte block */ 590 /* update counter */
579 591 sub $1, BLOCKS_CTR
580 cmp BUFFER_END, BUFFER_PTR2 /* is current block the last one */ 592 /* Move to the next block only if needed*/
581 cmovae K_BASE, BUFFER_PTR /* signal the last iteration smartly */ 593 ADD_IF_GE BUFFER_PTR2, BLOCKS_CTR, 4, 128
582 594
583 jmp _loop3 595 jmp _loop3
584_loop3: 596_loop3:
@@ -641,19 +653,12 @@ _loop3:
641 653
642 avx2_zeroupper 654 avx2_zeroupper
643 655
644 lea K_XMM_AR(%rip), K_BASE 656 /* Setup initial values */
645
646 mov CTX, HASH_PTR 657 mov CTX, HASH_PTR
647 mov BUF, BUFFER_PTR 658 mov BUF, BUFFER_PTR
648 lea 64(BUF), BUFFER_PTR2
649
650 shl $6, CNT /* mul by 64 */
651 add BUF, CNT
652 add $64, CNT
653 mov CNT, BUFFER_END
654 659
655 cmp BUFFER_END, BUFFER_PTR2 660 mov BUF, BUFFER_PTR2
656 cmovae K_BASE, BUFFER_PTR2 661 mov CNT, BLOCKS_CTR
657 662
658 xmm_mov BSWAP_SHUFB_CTL(%rip), YMM_SHUFB_BSWAP 663 xmm_mov BSWAP_SHUFB_CTL(%rip), YMM_SHUFB_BSWAP
659 664
diff --git a/arch/x86/crypto/sha1_ssse3_glue.c b/arch/x86/crypto/sha1_ssse3_glue.c
index 7de207a11014..dd14616b7739 100644
--- a/arch/x86/crypto/sha1_ssse3_glue.c
+++ b/arch/x86/crypto/sha1_ssse3_glue.c
@@ -201,7 +201,7 @@ asmlinkage void sha1_transform_avx2(u32 *digest, const char *data,
201 201
202static bool avx2_usable(void) 202static bool avx2_usable(void)
203{ 203{
204 if (false && avx_usable() && boot_cpu_has(X86_FEATURE_AVX2) 204 if (avx_usable() && boot_cpu_has(X86_FEATURE_AVX2)
205 && boot_cpu_has(X86_FEATURE_BMI1) 205 && boot_cpu_has(X86_FEATURE_BMI1)
206 && boot_cpu_has(X86_FEATURE_BMI2)) 206 && boot_cpu_has(X86_FEATURE_BMI2))
207 return true; 207 return true;
diff --git a/arch/x86/entry/entry_64.S b/arch/x86/entry/entry_64.S
index a55697d19824..cc0f2f5da19b 100644
--- a/arch/x86/entry/entry_64.S
+++ b/arch/x86/entry/entry_64.S
@@ -1190,6 +1190,8 @@ ENTRY(nmi)
1190 * other IST entries. 1190 * other IST entries.
1191 */ 1191 */
1192 1192
1193 ASM_CLAC
1194
1193 /* Use %rdx as our temp variable throughout */ 1195 /* Use %rdx as our temp variable throughout */
1194 pushq %rdx 1196 pushq %rdx
1195 1197
diff --git a/arch/x86/include/asm/elf.h b/arch/x86/include/asm/elf.h
index 07cf288b692e..bcd3d6199464 100644
--- a/arch/x86/include/asm/elf.h
+++ b/arch/x86/include/asm/elf.h
@@ -247,11 +247,11 @@ extern int force_personality32;
247 247
248/* 248/*
249 * This is the base location for PIE (ET_DYN with INTERP) loads. On 249 * This is the base location for PIE (ET_DYN with INTERP) loads. On
250 * 64-bit, this is raised to 4GB to leave the entire 32-bit address 250 * 64-bit, this is above 4GB to leave the entire 32-bit address
251 * space open for things that want to use the area for 32-bit pointers. 251 * space open for things that want to use the area for 32-bit pointers.
252 */ 252 */
253#define ELF_ET_DYN_BASE (mmap_is_ia32() ? 0x000400000UL : \ 253#define ELF_ET_DYN_BASE (mmap_is_ia32() ? 0x000400000UL : \
254 0x100000000UL) 254 (TASK_SIZE / 3 * 2))
255 255
256/* This yields a mask that user programs can use to figure out what 256/* This yields a mask that user programs can use to figure out what
257 instruction set this CPU supports. This could be done in user space, 257 instruction set this CPU supports. This could be done in user space,
diff --git a/arch/x86/kernel/cpu/perf_event_intel_lbr.c b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
index 8900400230c6..2cdae69d7e0b 100644
--- a/arch/x86/kernel/cpu/perf_event_intel_lbr.c
+++ b/arch/x86/kernel/cpu/perf_event_intel_lbr.c
@@ -153,7 +153,7 @@ static void __intel_pmu_lbr_enable(bool pmi)
153 */ 153 */
154 if (cpuc->lbr_sel) 154 if (cpuc->lbr_sel)
155 lbr_select = cpuc->lbr_sel->config; 155 lbr_select = cpuc->lbr_sel->config;
156 if (!pmi) 156 if (!pmi && cpuc->lbr_sel)
157 wrmsrl(MSR_LBR_SELECT, lbr_select); 157 wrmsrl(MSR_LBR_SELECT, lbr_select);
158 158
159 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl); 159 rdmsrl(MSR_IA32_DEBUGCTLMSR, debugctl);
@@ -432,8 +432,10 @@ static void intel_pmu_lbr_read_64(struct cpu_hw_events *cpuc)
432 int out = 0; 432 int out = 0;
433 int num = x86_pmu.lbr_nr; 433 int num = x86_pmu.lbr_nr;
434 434
435 if (cpuc->lbr_sel->config & LBR_CALL_STACK) 435 if (cpuc->lbr_sel) {
436 num = tos; 436 if (cpuc->lbr_sel->config & LBR_CALL_STACK)
437 num = tos;
438 }
437 439
438 for (i = 0; i < num; i++) { 440 for (i = 0; i < num; i++) {
439 unsigned long lbr_idx = (tos - i) & mask; 441 unsigned long lbr_idx = (tos - i) & mask;
diff --git a/drivers/input/mouse/elan_i2c_core.c b/drivers/input/mouse/elan_i2c_core.c
index da5458dfb1e3..98d4e515587a 100644
--- a/drivers/input/mouse/elan_i2c_core.c
+++ b/drivers/input/mouse/elan_i2c_core.c
@@ -1235,6 +1235,10 @@ static const struct acpi_device_id elan_acpi_id[] = {
1235 { "ELAN0100", 0 }, 1235 { "ELAN0100", 0 },
1236 { "ELAN0600", 0 }, 1236 { "ELAN0600", 0 },
1237 { "ELAN0605", 0 }, 1237 { "ELAN0605", 0 },
1238 { "ELAN0608", 0 },
1239 { "ELAN0605", 0 },
1240 { "ELAN0609", 0 },
1241 { "ELAN060B", 0 },
1238 { "ELAN1000", 0 }, 1242 { "ELAN1000", 0 },
1239 { } 1243 { }
1240}; 1244};
diff --git a/drivers/irqchip/irq-atmel-aic-common.c b/drivers/irqchip/irq-atmel-aic-common.c
index 37199b9b2cfa..831a195cb806 100644
--- a/drivers/irqchip/irq-atmel-aic-common.c
+++ b/drivers/irqchip/irq-atmel-aic-common.c
@@ -148,9 +148,9 @@ void __init aic_common_rtc_irq_fixup(struct device_node *root)
148 struct device_node *np; 148 struct device_node *np;
149 void __iomem *regs; 149 void __iomem *regs;
150 150
151 np = of_find_compatible_node(root, NULL, "atmel,at91rm9200-rtc"); 151 np = of_find_compatible_node(NULL, NULL, "atmel,at91rm9200-rtc");
152 if (!np) 152 if (!np)
153 np = of_find_compatible_node(root, NULL, 153 np = of_find_compatible_node(NULL, NULL,
154 "atmel,at91sam9x5-rtc"); 154 "atmel,at91sam9x5-rtc");
155 155
156 if (!np) 156 if (!np)
@@ -202,7 +202,6 @@ void __init aic_common_irq_fixup(const struct of_device_id *matches)
202 return; 202 return;
203 203
204 match = of_match_node(matches, root); 204 match = of_match_node(matches, root);
205 of_node_put(root);
206 205
207 if (match) { 206 if (match) {
208 void (*fixup)(struct device_node *) = match->data; 207 void (*fixup)(struct device_node *) = match->data;
diff --git a/drivers/net/usb/qmi_wwan.c b/drivers/net/usb/qmi_wwan.c
index 582d8f0c6266..958af3b1af7f 100644
--- a/drivers/net/usb/qmi_wwan.c
+++ b/drivers/net/usb/qmi_wwan.c
@@ -707,6 +707,7 @@ static const struct usb_device_id products[] = {
707 {QMI_FIXED_INTF(0x19d2, 0x1428, 2)}, /* Telewell TW-LTE 4G v2 */ 707 {QMI_FIXED_INTF(0x19d2, 0x1428, 2)}, /* Telewell TW-LTE 4G v2 */
708 {QMI_FIXED_INTF(0x19d2, 0x2002, 4)}, /* ZTE (Vodafone) K3765-Z */ 708 {QMI_FIXED_INTF(0x19d2, 0x2002, 4)}, /* ZTE (Vodafone) K3765-Z */
709 {QMI_FIXED_INTF(0x2001, 0x7e19, 4)}, /* D-Link DWM-221 B1 */ 709 {QMI_FIXED_INTF(0x2001, 0x7e19, 4)}, /* D-Link DWM-221 B1 */
710 {QMI_FIXED_INTF(0x2001, 0x7e35, 4)}, /* D-Link DWM-222 */
710 {QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)}, /* Sierra Wireless MC7700 */ 711 {QMI_FIXED_INTF(0x0f3d, 0x68a2, 8)}, /* Sierra Wireless MC7700 */
711 {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */ 712 {QMI_FIXED_INTF(0x114f, 0x68a2, 8)}, /* Sierra Wireless MC7750 */
712 {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */ 713 {QMI_FIXED_INTF(0x1199, 0x68a2, 8)}, /* Sierra Wireless MC7710 in QMI mode */
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c
index 7b0ca1551d7b..005ea632ba53 100644
--- a/drivers/parisc/dino.c
+++ b/drivers/parisc/dino.c
@@ -954,7 +954,7 @@ static int __init dino_probe(struct parisc_device *dev)
954 954
955 dino_dev->hba.dev = dev; 955 dino_dev->hba.dev = dev;
956 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096); 956 dino_dev->hba.base_addr = ioremap_nocache(hpa, 4096);
957 dino_dev->hba.lmmio_space_offset = 0; /* CPU addrs == bus addrs */ 957 dino_dev->hba.lmmio_space_offset = PCI_F_EXTEND;
958 spin_lock_init(&dino_dev->dinosaur_pen); 958 spin_lock_init(&dino_dev->dinosaur_pen);
959 dino_dev->hba.iommu = ccio_get_iommu(dev); 959 dino_dev->hba.iommu = ccio_get_iommu(dev);
960 960
diff --git a/drivers/pci/controller/pci-dra7xx.c b/drivers/pci/controller/pci-dra7xx.c
index d60d4cf20516..330866f9b924 100644
--- a/drivers/pci/controller/pci-dra7xx.c
+++ b/drivers/pci/controller/pci-dra7xx.c
@@ -19,6 +19,7 @@
19#include <linux/module.h> 19#include <linux/module.h>
20#include <linux/of_gpio.h> 20#include <linux/of_gpio.h>
21#include <linux/of_device.h> 21#include <linux/of_device.h>
22#include <linux/of_platform.h>
22#include <linux/pci.h> 23#include <linux/pci.h>
23#include <linux/phy/phy.h> 24#include <linux/phy/phy.h>
24#include <linux/platform_device.h> 25#include <linux/platform_device.h>
@@ -81,6 +82,9 @@
81#define MSI_REQ_GRANT BIT(0) 82#define MSI_REQ_GRANT BIT(0)
82#define MSI_VECTOR_SHIFT 7 83#define MSI_VECTOR_SHIFT 7
83 84
85#define PCIE_1LANE_2LANE_SELECTION BIT(13)
86#define PCIE_B1C0_MODE_SEL BIT(2)
87
84struct dra7xx_pcie { 88struct dra7xx_pcie {
85 void __iomem *base; 89 void __iomem *base;
86 struct phy **phy; 90 struct phy **phy;
@@ -94,6 +98,10 @@ struct dra7xx_pcie {
94 98
95struct dra7xx_pcie_of_data { 99struct dra7xx_pcie_of_data {
96 enum dw_pcie_device_mode mode; 100 enum dw_pcie_device_mode mode;
101 u32 b1co_mode_sel_mask;
102};
103
104struct dra7xx_pcie_data {
97}; 105};
98 106
99#define to_dra7xx_pcie(x) dev_get_drvdata((x)->dev) 107#define to_dra7xx_pcie(x) dev_get_drvdata((x)->dev)
@@ -506,6 +514,16 @@ static const struct dra7xx_pcie_of_data dra7xx_pcie_ep_of_data = {
506 .mode = DW_PCIE_EP_TYPE, 514 .mode = DW_PCIE_EP_TYPE,
507}; 515};
508 516
517static const struct dra7xx_pcie_of_data dra746_pcie_rc_of_data = {
518 .b1co_mode_sel_mask = BIT(2),
519 .mode = DW_PCIE_RC_TYPE,
520};
521
522static const struct dra7xx_pcie_of_data dra746_pcie_ep_of_data = {
523 .b1co_mode_sel_mask = BIT(2),
524 .mode = DW_PCIE_EP_TYPE,
525};
526
509static const struct of_device_id of_dra7xx_pcie_match[] = { 527static const struct of_device_id of_dra7xx_pcie_match[] = {
510 { 528 {
511 .compatible = "ti,dra7-pcie", 529 .compatible = "ti,dra7-pcie",
@@ -515,6 +533,22 @@ static const struct of_device_id of_dra7xx_pcie_match[] = {
515 .compatible = "ti,dra7-pcie-ep", 533 .compatible = "ti,dra7-pcie-ep",
516 .data = &dra7xx_pcie_ep_of_data, 534 .data = &dra7xx_pcie_ep_of_data,
517 }, 535 },
536 {
537 .compatible = "ti,dra746-pcie-rc",
538 .data = &dra746_pcie_rc_of_data,
539 },
540 {
541 .compatible = "ti,dra746-pcie-ep",
542 .data = &dra746_pcie_ep_of_data,
543 },
544 {
545 .compatible = "ti,dra726-pcie-rc",
546 .data = &dra7xx_pcie_rc_of_data,
547 },
548 {
549 .compatible = "ti,dra726-pcie-ep",
550 .data = &dra7xx_pcie_ep_of_data,
551 },
518 {}, 552 {},
519}; 553};
520MODULE_DEVICE_TABLE(of, of_dra7xx_pcie_match); 554MODULE_DEVICE_TABLE(of, of_dra7xx_pcie_match);
@@ -562,6 +596,44 @@ static int dra7xx_pcie_ep_legacy_mode(struct dra7xx_pcie *dra7xx)
562 return ret; 596 return ret;
563} 597}
564 598
599static int dra7xx_pcie_configure_two_lane(struct device *dev,
600 u32 b1co_mode_sel_mask)
601{
602 struct device_node *np = dev->of_node;
603 struct regmap *pcie_syscon;
604 unsigned int pcie_reg;
605
606 pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-conf");
607 if (IS_ERR(pcie_syscon)) {
608 dev_err(dev, "unable to get syscon-lane-conf\n");
609 return -EINVAL;
610 }
611
612 if (of_property_read_u32_index(np, "syscon-lane-conf", 1, &pcie_reg)) {
613 dev_err(dev, "couldn't get lane configuration reg offset\n");
614 return -EINVAL;
615 }
616
617 regmap_update_bits(pcie_syscon, pcie_reg, PCIE_1LANE_2LANE_SELECTION,
618 PCIE_1LANE_2LANE_SELECTION);
619
620 pcie_syscon = syscon_regmap_lookup_by_phandle(np, "syscon-lane-sel");
621 if (IS_ERR(pcie_syscon)) {
622 dev_err(dev, "unable to get syscon-lane-sel\n");
623 return -EINVAL;
624 }
625
626 if (of_property_read_u32_index(np, "syscon-lane-sel", 1, &pcie_reg)) {
627 dev_err(dev, "couldn't get lane selection reg offset\n");
628 return -EINVAL;
629 }
630
631 regmap_update_bits(pcie_syscon, pcie_reg, b1co_mode_sel_mask,
632 PCIE_B1C0_MODE_SEL);
633
634 return 0;
635}
636
565static int __init dra7xx_pcie_probe(struct platform_device *pdev) 637static int __init dra7xx_pcie_probe(struct platform_device *pdev)
566{ 638{
567 u32 reg; 639 u32 reg;
@@ -581,6 +653,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)
581 const struct of_device_id *match; 653 const struct of_device_id *match;
582 const struct dra7xx_pcie_of_data *data; 654 const struct dra7xx_pcie_of_data *data;
583 enum dw_pcie_device_mode mode; 655 enum dw_pcie_device_mode mode;
656 u32 b1co_mode_sel_mask;
584 657
585 match = of_match_device(of_match_ptr(of_dra7xx_pcie_match), dev); 658 match = of_match_device(of_match_ptr(of_dra7xx_pcie_match), dev);
586 if (!match) 659 if (!match)
@@ -588,6 +661,7 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)
588 661
589 data = (struct dra7xx_pcie_of_data *)match->data; 662 data = (struct dra7xx_pcie_of_data *)match->data;
590 mode = (enum dw_pcie_device_mode)data->mode; 663 mode = (enum dw_pcie_device_mode)data->mode;
664 b1co_mode_sel_mask = data->b1co_mode_sel_mask;
591 665
592 dra7xx = devm_kzalloc(dev, sizeof(*dra7xx), GFP_KERNEL); 666 dra7xx = devm_kzalloc(dev, sizeof(*dra7xx), GFP_KERNEL);
593 if (!dra7xx) 667 if (!dra7xx)
@@ -651,6 +725,12 @@ static int __init dra7xx_pcie_probe(struct platform_device *pdev)
651 dra7xx->dev = dev; 725 dra7xx->dev = dev;
652 dra7xx->phy_count = phy_count; 726 dra7xx->phy_count = phy_count;
653 727
728 if (phy_count == 2) {
729 ret = dra7xx_pcie_configure_two_lane(dev, b1co_mode_sel_mask);
730 if (ret < 0)
731 goto err_phy;
732 }
733
654 pm_runtime_enable(dev); 734 pm_runtime_enable(dev);
655 ret = pm_runtime_get_sync(dev); 735 ret = pm_runtime_get_sync(dev);
656 if (ret < 0) { 736 if (ret < 0) {
diff --git a/drivers/usb/core/usb-acpi.c b/drivers/usb/core/usb-acpi.c
index 2776cfe64c09..ef9cf4a21afe 100644
--- a/drivers/usb/core/usb-acpi.c
+++ b/drivers/usb/core/usb-acpi.c
@@ -127,6 +127,22 @@ out:
127 */ 127 */
128#define USB_ACPI_LOCATION_VALID (1 << 31) 128#define USB_ACPI_LOCATION_VALID (1 << 31)
129 129
130static struct acpi_device *usb_acpi_find_port(struct acpi_device *parent,
131 int raw)
132{
133 struct acpi_device *adev;
134
135 if (!parent)
136 return NULL;
137
138 list_for_each_entry(adev, &parent->children, node) {
139 if (acpi_device_adr(adev) == raw)
140 return adev;
141 }
142
143 return acpi_find_child_device(parent, raw, false);
144}
145
130static struct acpi_device *usb_acpi_find_companion(struct device *dev) 146static struct acpi_device *usb_acpi_find_companion(struct device *dev)
131{ 147{
132 struct usb_device *udev; 148 struct usb_device *udev;
@@ -174,8 +190,10 @@ static struct acpi_device *usb_acpi_find_companion(struct device *dev)
174 int raw; 190 int raw;
175 191
176 raw = usb_hcd_find_raw_port_number(hcd, port1); 192 raw = usb_hcd_find_raw_port_number(hcd, port1);
177 adev = acpi_find_child_device(ACPI_COMPANION(&udev->dev), 193
178 raw, false); 194 adev = usb_acpi_find_port(ACPI_COMPANION(&udev->dev),
195 raw);
196
179 if (!adev) 197 if (!adev)
180 return NULL; 198 return NULL;
181 } else { 199 } else {
@@ -186,7 +204,9 @@ static struct acpi_device *usb_acpi_find_companion(struct device *dev)
186 return NULL; 204 return NULL;
187 205
188 acpi_bus_get_device(parent_handle, &adev); 206 acpi_bus_get_device(parent_handle, &adev);
189 adev = acpi_find_child_device(adev, port1, false); 207
208 adev = usb_acpi_find_port(adev, port1);
209
190 if (!adev) 210 if (!adev)
191 return NULL; 211 return NULL;
192 } 212 }
diff --git a/drivers/xen/biomerge.c b/drivers/xen/biomerge.c
index 4da69dbf7dca..1bdd02a6d6ac 100644
--- a/drivers/xen/biomerge.c
+++ b/drivers/xen/biomerge.c
@@ -10,8 +10,7 @@ bool xen_biovec_phys_mergeable(const struct bio_vec *vec1,
10 unsigned long bfn1 = pfn_to_bfn(page_to_pfn(vec1->bv_page)); 10 unsigned long bfn1 = pfn_to_bfn(page_to_pfn(vec1->bv_page));
11 unsigned long bfn2 = pfn_to_bfn(page_to_pfn(vec2->bv_page)); 11 unsigned long bfn2 = pfn_to_bfn(page_to_pfn(vec2->bv_page));
12 12
13 return __BIOVEC_PHYS_MERGEABLE(vec1, vec2) && 13 return bfn1 + PFN_DOWN(vec1->bv_offset + vec1->bv_len) == bfn2;
14 ((bfn1 == bfn2) || ((bfn1+1) == bfn2));
15#else 14#else
16 /* 15 /*
17 * XXX: Add support for merging bio_vec when using different page 16 * XXX: Add support for merging bio_vec when using different page
diff --git a/include/linux/pid.h b/include/linux/pid.h
index 23705a53abba..97b745ddece5 100644
--- a/include/linux/pid.h
+++ b/include/linux/pid.h
@@ -8,7 +8,9 @@ enum pid_type
8 PIDTYPE_PID, 8 PIDTYPE_PID,
9 PIDTYPE_PGID, 9 PIDTYPE_PGID,
10 PIDTYPE_SID, 10 PIDTYPE_SID,
11 PIDTYPE_MAX 11 PIDTYPE_MAX,
12 /* only valid to __task_pid_nr_ns() */
13 __PIDTYPE_TGID
12}; 14};
13 15
14/* 16/*
diff --git a/include/linux/sched.h b/include/linux/sched.h
index eff7c1fad26f..e887c8d6f395 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -1949,31 +1949,8 @@ static inline pid_t task_tgid_nr(struct task_struct *tsk)
1949 return tsk->tgid; 1949 return tsk->tgid;
1950} 1950}
1951 1951
1952pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns);
1953
1954static inline pid_t task_tgid_vnr(struct task_struct *tsk)
1955{
1956 return pid_vnr(task_tgid(tsk));
1957}
1958
1959 1952
1960static inline int pid_alive(const struct task_struct *p); 1953static inline int pid_alive(const struct task_struct *p);
1961static inline pid_t task_ppid_nr_ns(const struct task_struct *tsk, struct pid_namespace *ns)
1962{
1963 pid_t pid = 0;
1964
1965 rcu_read_lock();
1966 if (pid_alive(tsk))
1967 pid = task_tgid_nr_ns(rcu_dereference(tsk->real_parent), ns);
1968 rcu_read_unlock();
1969
1970 return pid;
1971}
1972
1973static inline pid_t task_ppid_nr(const struct task_struct *tsk)
1974{
1975 return task_ppid_nr_ns(tsk, &init_pid_ns);
1976}
1977 1954
1978static inline pid_t task_pgrp_nr_ns(struct task_struct *tsk, 1955static inline pid_t task_pgrp_nr_ns(struct task_struct *tsk,
1979 struct pid_namespace *ns) 1956 struct pid_namespace *ns)
@@ -1998,6 +1975,33 @@ static inline pid_t task_session_vnr(struct task_struct *tsk)
1998 return __task_pid_nr_ns(tsk, PIDTYPE_SID, NULL); 1975 return __task_pid_nr_ns(tsk, PIDTYPE_SID, NULL);
1999} 1976}
2000 1977
1978static inline pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns)
1979{
1980 return __task_pid_nr_ns(tsk, __PIDTYPE_TGID, ns);
1981}
1982
1983static inline pid_t task_tgid_vnr(struct task_struct *tsk)
1984{
1985 return __task_pid_nr_ns(tsk, __PIDTYPE_TGID, NULL);
1986}
1987
1988static inline pid_t task_ppid_nr_ns(const struct task_struct *tsk, struct pid_namespace *ns)
1989{
1990 pid_t pid = 0;
1991
1992 rcu_read_lock();
1993 if (pid_alive(tsk))
1994 pid = task_tgid_nr_ns(rcu_dereference(tsk->real_parent), ns);
1995 rcu_read_unlock();
1996
1997 return pid;
1998}
1999
2000static inline pid_t task_ppid_nr(const struct task_struct *tsk)
2001{
2002 return task_ppid_nr_ns(tsk, &init_pid_ns);
2003}
2004
2001/* obsolete, do not use */ 2005/* obsolete, do not use */
2002static inline pid_t task_pgrp_nr(struct task_struct *tsk) 2006static inline pid_t task_pgrp_nr(struct task_struct *tsk)
2003{ 2007{
diff --git a/kernel/audit_watch.c b/kernel/audit_watch.c
index 939945a5649c..a162661c9d60 100644
--- a/kernel/audit_watch.c
+++ b/kernel/audit_watch.c
@@ -457,13 +457,15 @@ void audit_remove_watch_rule(struct audit_krule *krule)
457 list_del(&krule->rlist); 457 list_del(&krule->rlist);
458 458
459 if (list_empty(&watch->rules)) { 459 if (list_empty(&watch->rules)) {
460 /*
461 * audit_remove_watch() drops our reference to 'parent' which
462 * can get freed. Grab our own reference to be safe.
463 */
464 audit_get_parent(parent);
460 audit_remove_watch(watch); 465 audit_remove_watch(watch);
461 466 if (list_empty(&parent->watches))
462 if (list_empty(&parent->watches)) {
463 audit_get_parent(parent);
464 fsnotify_destroy_mark(&parent->mark, audit_watch_group); 467 fsnotify_destroy_mark(&parent->mark, audit_watch_group);
465 audit_put_parent(parent); 468 audit_put_parent(parent);
466 }
467 } 469 }
468} 470}
469 471
diff --git a/kernel/pid.c b/kernel/pid.c
index 78b3d9f80d44..b17263be9082 100644
--- a/kernel/pid.c
+++ b/kernel/pid.c
@@ -526,8 +526,11 @@ pid_t __task_pid_nr_ns(struct task_struct *task, enum pid_type type,
526 if (!ns) 526 if (!ns)
527 ns = task_active_pid_ns(current); 527 ns = task_active_pid_ns(current);
528 if (likely(pid_alive(task))) { 528 if (likely(pid_alive(task))) {
529 if (type != PIDTYPE_PID) 529 if (type != PIDTYPE_PID) {
530 if (type == __PIDTYPE_TGID)
531 type = PIDTYPE_PID;
530 task = task->group_leader; 532 task = task->group_leader;
533 }
531 nr = pid_nr_ns(rcu_dereference(task->pids[type].pid), ns); 534 nr = pid_nr_ns(rcu_dereference(task->pids[type].pid), ns);
532 } 535 }
533 rcu_read_unlock(); 536 rcu_read_unlock();
@@ -536,12 +539,6 @@ pid_t __task_pid_nr_ns(struct task_struct *task, enum pid_type type,
536} 539}
537EXPORT_SYMBOL(__task_pid_nr_ns); 540EXPORT_SYMBOL(__task_pid_nr_ns);
538 541
539pid_t task_tgid_nr_ns(struct task_struct *tsk, struct pid_namespace *ns)
540{
541 return pid_nr_ns(task_tgid(tsk), ns);
542}
543EXPORT_SYMBOL(task_tgid_nr_ns);
544
545struct pid_namespace *task_active_pid_ns(struct task_struct *tsk) 542struct pid_namespace *task_active_pid_ns(struct task_struct *tsk)
546{ 543{
547 return ns_of_pid(task_pid(tsk)); 544 return ns_of_pid(task_pid(tsk));
diff --git a/mm/mempolicy.c b/mm/mempolicy.c
index e09b1a0e2cfe..c947014d128a 100644
--- a/mm/mempolicy.c
+++ b/mm/mempolicy.c
@@ -894,11 +894,6 @@ static long do_get_mempolicy(int *policy, nodemask_t *nmask,
894 *policy |= (pol->flags & MPOL_MODE_FLAGS); 894 *policy |= (pol->flags & MPOL_MODE_FLAGS);
895 } 895 }
896 896
897 if (vma) {
898 up_read(&current->mm->mmap_sem);
899 vma = NULL;
900 }
901
902 err = 0; 897 err = 0;
903 if (nmask) { 898 if (nmask) {
904 if (mpol_store_user_nodemask(pol)) { 899 if (mpol_store_user_nodemask(pol)) {
diff --git a/mm/migrate.c b/mm/migrate.c
index 72c09dea6526..afedcfab60e2 100644
--- a/mm/migrate.c
+++ b/mm/migrate.c
@@ -38,6 +38,7 @@
38#include <linux/balloon_compaction.h> 38#include <linux/balloon_compaction.h>
39#include <linux/mmu_notifier.h> 39#include <linux/mmu_notifier.h>
40#include <linux/page_idle.h> 40#include <linux/page_idle.h>
41#include <linux/ptrace.h>
41 42
42#include <asm/tlbflush.h> 43#include <asm/tlbflush.h>
43 44
@@ -1483,7 +1484,6 @@ SYSCALL_DEFINE6(move_pages, pid_t, pid, unsigned long, nr_pages,
1483 const int __user *, nodes, 1484 const int __user *, nodes,
1484 int __user *, status, int, flags) 1485 int __user *, status, int, flags)
1485{ 1486{
1486 const struct cred *cred = current_cred(), *tcred;
1487 struct task_struct *task; 1487 struct task_struct *task;
1488 struct mm_struct *mm; 1488 struct mm_struct *mm;
1489 int err; 1489 int err;
@@ -1507,14 +1507,9 @@ SYSCALL_DEFINE6(move_pages, pid_t, pid, unsigned long, nr_pages,
1507 1507
1508 /* 1508 /*
1509 * Check if this process has the right to modify the specified 1509 * Check if this process has the right to modify the specified
1510 * process. The right exists if the process has administrative 1510 * process. Use the regular "ptrace_may_access()" checks.
1511 * capabilities, superuser privileges or the same
1512 * userid as the target process.
1513 */ 1511 */
1514 tcred = __task_cred(task); 1512 if (!ptrace_may_access(task, PTRACE_MODE_READ_REALCREDS)) {
1515 if (!uid_eq(cred->euid, tcred->suid) && !uid_eq(cred->euid, tcred->uid) &&
1516 !uid_eq(cred->uid, tcred->suid) && !uid_eq(cred->uid, tcred->uid) &&
1517 !capable(CAP_SYS_NICE)) {
1518 rcu_read_unlock(); 1513 rcu_read_unlock();
1519 err = -EPERM; 1514 err = -EPERM;
1520 goto out; 1515 goto out;
diff --git a/net/netfilter/nf_conntrack_extend.c b/net/netfilter/nf_conntrack_extend.c
index 1a9545965c0d..531ca55f1af6 100644
--- a/net/netfilter/nf_conntrack_extend.c
+++ b/net/netfilter/nf_conntrack_extend.c
@@ -53,7 +53,11 @@ nf_ct_ext_create(struct nf_ct_ext **ext, enum nf_ct_ext_id id,
53 53
54 rcu_read_lock(); 54 rcu_read_lock();
55 t = rcu_dereference(nf_ct_ext_types[id]); 55 t = rcu_dereference(nf_ct_ext_types[id]);
56 BUG_ON(t == NULL); 56 if (!t) {
57 rcu_read_unlock();
58 return NULL;
59 }
60
57 off = ALIGN(sizeof(struct nf_ct_ext), t->align); 61 off = ALIGN(sizeof(struct nf_ct_ext), t->align);
58 len = off + t->len + var_alloc_len; 62 len = off + t->len + var_alloc_len;
59 alloc_size = t->alloc_size + var_alloc_len; 63 alloc_size = t->alloc_size + var_alloc_len;
@@ -88,7 +92,10 @@ void *__nf_ct_ext_add_length(struct nf_conn *ct, enum nf_ct_ext_id id,
88 92
89 rcu_read_lock(); 93 rcu_read_lock();
90 t = rcu_dereference(nf_ct_ext_types[id]); 94 t = rcu_dereference(nf_ct_ext_types[id]);
91 BUG_ON(t == NULL); 95 if (!t) {
96 rcu_read_unlock();
97 return NULL;
98 }
92 99
93 newoff = ALIGN(old->len, t->align); 100 newoff = ALIGN(old->len, t->align);
94 newlen = newoff + t->len + var_alloc_len; 101 newlen = newoff + t->len + var_alloc_len;
@@ -186,6 +193,6 @@ void nf_ct_extend_unregister(struct nf_ct_ext_type *type)
186 RCU_INIT_POINTER(nf_ct_ext_types[type->id], NULL); 193 RCU_INIT_POINTER(nf_ct_ext_types[type->id], NULL);
187 update_alloc_size(type); 194 update_alloc_size(type);
188 mutex_unlock(&nf_ct_ext_type_mutex); 195 mutex_unlock(&nf_ct_ext_type_mutex);
189 rcu_barrier(); /* Wait for completion of call_rcu()'s */ 196 synchronize_rcu();
190} 197}
191EXPORT_SYMBOL_GPL(nf_ct_extend_unregister); 198EXPORT_SYMBOL_GPL(nf_ct_extend_unregister);
diff --git a/sound/core/seq/seq_clientmgr.c b/sound/core/seq/seq_clientmgr.c
index c67f9c212dd1..e326c1d80416 100644
--- a/sound/core/seq/seq_clientmgr.c
+++ b/sound/core/seq/seq_clientmgr.c
@@ -1530,19 +1530,14 @@ static int snd_seq_ioctl_create_queue(struct snd_seq_client *client,
1530 void __user *arg) 1530 void __user *arg)
1531{ 1531{
1532 struct snd_seq_queue_info info; 1532 struct snd_seq_queue_info info;
1533 int result;
1534 struct snd_seq_queue *q; 1533 struct snd_seq_queue *q;
1535 1534
1536 if (copy_from_user(&info, arg, sizeof(info))) 1535 if (copy_from_user(&info, arg, sizeof(info)))
1537 return -EFAULT; 1536 return -EFAULT;
1538 1537
1539 result = snd_seq_queue_alloc(client->number, info.locked, info.flags); 1538 q = snd_seq_queue_alloc(client->number, info.locked, info.flags);
1540 if (result < 0) 1539 if (IS_ERR(q))
1541 return result; 1540 return PTR_ERR(q);
1542
1543 q = queueptr(result);
1544 if (q == NULL)
1545 return -EINVAL;
1546 1541
1547 info.queue = q->queue; 1542 info.queue = q->queue;
1548 info.locked = q->locked; 1543 info.locked = q->locked;
@@ -1552,7 +1547,7 @@ static int snd_seq_ioctl_create_queue(struct snd_seq_client *client,
1552 if (! info.name[0]) 1547 if (! info.name[0])
1553 snprintf(info.name, sizeof(info.name), "Queue-%d", q->queue); 1548 snprintf(info.name, sizeof(info.name), "Queue-%d", q->queue);
1554 strlcpy(q->name, info.name, sizeof(q->name)); 1549 strlcpy(q->name, info.name, sizeof(q->name));
1555 queuefree(q); 1550 snd_use_lock_free(&q->use_lock);
1556 1551
1557 if (copy_to_user(arg, &info, sizeof(info))) 1552 if (copy_to_user(arg, &info, sizeof(info)))
1558 return -EFAULT; 1553 return -EFAULT;
diff --git a/sound/core/seq/seq_queue.c b/sound/core/seq/seq_queue.c
index 450c5187eecb..79e0c5604ef8 100644
--- a/sound/core/seq/seq_queue.c
+++ b/sound/core/seq/seq_queue.c
@@ -184,22 +184,26 @@ void __exit snd_seq_queues_delete(void)
184static void queue_use(struct snd_seq_queue *queue, int client, int use); 184static void queue_use(struct snd_seq_queue *queue, int client, int use);
185 185
186/* allocate a new queue - 186/* allocate a new queue -
187 * return queue index value or negative value for error 187 * return pointer to new queue or ERR_PTR(-errno) for error
188 * The new queue's use_lock is set to 1. It is the caller's responsibility to
189 * call snd_use_lock_free(&q->use_lock).
188 */ 190 */
189int snd_seq_queue_alloc(int client, int locked, unsigned int info_flags) 191struct snd_seq_queue *snd_seq_queue_alloc(int client, int locked, unsigned int info_flags)
190{ 192{
191 struct snd_seq_queue *q; 193 struct snd_seq_queue *q;
192 194
193 q = queue_new(client, locked); 195 q = queue_new(client, locked);
194 if (q == NULL) 196 if (q == NULL)
195 return -ENOMEM; 197 return ERR_PTR(-ENOMEM);
196 q->info_flags = info_flags; 198 q->info_flags = info_flags;
197 queue_use(q, client, 1); 199 queue_use(q, client, 1);
200 snd_use_lock_use(&q->use_lock);
198 if (queue_list_add(q) < 0) { 201 if (queue_list_add(q) < 0) {
202 snd_use_lock_free(&q->use_lock);
199 queue_delete(q); 203 queue_delete(q);
200 return -ENOMEM; 204 return ERR_PTR(-ENOMEM);
201 } 205 }
202 return q->queue; 206 return q;
203} 207}
204 208
205/* delete a queue - queue must be owned by the client */ 209/* delete a queue - queue must be owned by the client */
diff --git a/sound/core/seq/seq_queue.h b/sound/core/seq/seq_queue.h
index 30c8111477f6..719093489a2c 100644
--- a/sound/core/seq/seq_queue.h
+++ b/sound/core/seq/seq_queue.h
@@ -71,7 +71,7 @@ void snd_seq_queues_delete(void);
71 71
72 72
73/* create new queue (constructor) */ 73/* create new queue (constructor) */
74int snd_seq_queue_alloc(int client, int locked, unsigned int flags); 74struct snd_seq_queue *snd_seq_queue_alloc(int client, int locked, unsigned int flags);
75 75
76/* delete queue (destructor) */ 76/* delete queue (destructor) */
77int snd_seq_queue_delete(int client, int queueid); 77int snd_seq_queue_delete(int client, int queueid);
diff --git a/sound/usb/mixer.c b/sound/usb/mixer.c
index 499b03c8281d..696de5ac69be 100644
--- a/sound/usb/mixer.c
+++ b/sound/usb/mixer.c
@@ -541,6 +541,8 @@ int snd_usb_mixer_vol_tlv(struct snd_kcontrol *kcontrol, int op_flag,
541 541
542 if (size < sizeof(scale)) 542 if (size < sizeof(scale))
543 return -ENOMEM; 543 return -ENOMEM;
544 if (cval->min_mute)
545 scale[0] = SNDRV_CTL_TLVT_DB_MINMAX_MUTE;
544 scale[2] = cval->dBmin; 546 scale[2] = cval->dBmin;
545 scale[3] = cval->dBmax; 547 scale[3] = cval->dBmax;
546 if (copy_to_user(_tlv, scale, sizeof(scale))) 548 if (copy_to_user(_tlv, scale, sizeof(scale)))
diff --git a/sound/usb/mixer.h b/sound/usb/mixer.h
index 3417ef347e40..2b4b067646ab 100644
--- a/sound/usb/mixer.h
+++ b/sound/usb/mixer.h
@@ -64,6 +64,7 @@ struct usb_mixer_elem_info {
64 int cached; 64 int cached;
65 int cache_val[MAX_CHANNELS]; 65 int cache_val[MAX_CHANNELS];
66 u8 initialized; 66 u8 initialized;
67 u8 min_mute;
67 void *private_data; 68 void *private_data;
68}; 69};
69 70
diff --git a/sound/usb/mixer_quirks.c b/sound/usb/mixer_quirks.c
index 04991b009132..5d2fc5f58bfe 100644
--- a/sound/usb/mixer_quirks.c
+++ b/sound/usb/mixer_quirks.c
@@ -1873,6 +1873,12 @@ void snd_usb_mixer_fu_apply_quirk(struct usb_mixer_interface *mixer,
1873 if (unitid == 7 && cval->control == UAC_FU_VOLUME) 1873 if (unitid == 7 && cval->control == UAC_FU_VOLUME)
1874 snd_dragonfly_quirk_db_scale(mixer, cval, kctl); 1874 snd_dragonfly_quirk_db_scale(mixer, cval, kctl);
1875 break; 1875 break;
1876 /* lowest playback value is muted on C-Media devices */
1877 case USB_ID(0x0d8c, 0x000c):
1878 case USB_ID(0x0d8c, 0x0014):
1879 if (strstr(kctl->id.name, "Playback"))
1880 cval->min_mute = 1;
1881 break;
1876 } 1882 }
1877} 1883}
1878 1884
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index 29f38e2b4ca9..1cc20d138dae 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -1143,6 +1143,7 @@ bool snd_usb_get_sample_rate_quirk(struct snd_usb_audio *chip)
1143 case USB_ID(0x0556, 0x0014): /* Phoenix Audio TMX320VC */ 1143 case USB_ID(0x0556, 0x0014): /* Phoenix Audio TMX320VC */
1144 case USB_ID(0x05A3, 0x9420): /* ELP HD USB Camera */ 1144 case USB_ID(0x05A3, 0x9420): /* ELP HD USB Camera */
1145 case USB_ID(0x074D, 0x3553): /* Outlaw RR2150 (Micronas UAC3553B) */ 1145 case USB_ID(0x074D, 0x3553): /* Outlaw RR2150 (Micronas UAC3553B) */
1146 case USB_ID(0x1395, 0x740a): /* Sennheiser DECT */
1146 case USB_ID(0x1901, 0x0191): /* GE B850V3 CP2114 audio interface */ 1147 case USB_ID(0x1901, 0x0191): /* GE B850V3 CP2114 audio interface */
1147 case USB_ID(0x1de7, 0x0013): /* Phoenix Audio MT202exe */ 1148 case USB_ID(0x1de7, 0x0013): /* Phoenix Audio MT202exe */
1148 case USB_ID(0x1de7, 0x0014): /* Phoenix Audio TMX320 */ 1149 case USB_ID(0x1de7, 0x0014): /* Phoenix Audio TMX320 */