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authorKishon Vijay Abraham I2017-08-24 09:12:50 -0500
committerJean-Jacques Hiblot2017-08-25 07:16:12 -0500
commitcca72e968f052da18a67cdae6171e1f6acb9b9df (patch)
tree611954b6546f3b4d2b0a4c6956664e544abc1924
parent33496ede38c37090e3fdcb8075bd93ac423c6063 (diff)
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ARM: dts: dra7: Add properties to enable PCIe x2 lane mode
syscon-lane-sel and syscon-lane-conf properties specific to enable PCIe x2 lane mode are added here. Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7.dtsi2
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a05300c64bf3..fee24a815ef7 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -315,6 +315,8 @@
315 ti,hwmods = "pcie1"; 315 ti,hwmods = "pcie1";
316 phys = <&pcie1_phy>; 316 phys = <&pcie1_phy>;
317 phy-names = "pcie-phy0"; 317 phy-names = "pcie-phy0";
318 syscon-lane-conf = <&scm_conf 0x558>;
319 syscon-lane-sel = <&scm_conf_pcie 0x18>;
318 interrupt-map-mask = <0 0 0 7>; 320 interrupt-map-mask = <0 0 0 7>;
319 interrupt-map = <0 0 0 1 &pcie1_intc 1>, 321 interrupt-map = <0 0 0 1 &pcie1_intc 1>,
320 <0 0 0 2 &pcie1_intc 2>, 322 <0 0 0 2 &pcie1_intc 2>,