diff options
author | Praneeth Bajjuri | 2014-08-05 18:06:21 -0500 |
---|---|---|
committer | Praneeth Bajjuri | 2014-08-05 18:07:18 -0500 |
commit | cedc4a02470fbed1f5ee9f9b41d54307b3999278 (patch) | |
tree | 4a9b95c7b38d15ecc1634b1b8cf351c63d9d73e5 | |
parent | cf03903f4012e5dd1d49110b3112cba62c827d5b (diff) | |
parent | 8aed6500ff95bd66f4a0ba80f63a9550951d1c04 (diff) | |
download | kernel-omap-p-ti-android-3.8.y-linaro-10.tar.gz kernel-omap-p-ti-android-3.8.y-linaro-10.tar.xz kernel-omap-p-ti-android-3.8.y-linaro-10.zip |
Merge branch 'p-ti-android-3.8.y' of git://git.omapzoom.org/kernel/omap into p-ti-android-3.8.yp-ti-android-3.8.y-linaro-10
* 'p-ti-android-3.8.y' of git://git.omapzoom.org/kernel/omap: (70 commits)
ARM: DRA7: enable the 10" display
mmc: card: fixing an false identification of SANITIZE command
mmc: card: Adding support for sanitize in eMMC 4.5
TI-EC: fix trigger key read logic
gpio: pcf857x: handle gpio->read return value
OMAPDSS: android-display: fixed sparse and compiler warnings
OMAPDSS: omapfb: Fixed sparse & compiler warnings
mm: vmscan: Fixed sparse & compiler warnings
gpu: ion: Fixed sparse & compiler warnings
backlight: generic_bl: Fixed sparse & compiler warnings
i2c: ov1063x: Fixed sparse & compiler warnings
C_CAN: D_CAN: Fixed sparse & compiler warnings
TI-VPS: Fixed sparse and compiler warnings
TI-EC: Fixed sparse & compiler warnings in early camera
mtd: onenand: omap: Fixed sparse & compiler warnings in omap2.c
ARM: OMAP: hci_tty: Fixed sparse & compiler warnings in tty_hci.c
OMAPDSS: TFCS panel: Fixed sparse & compiler warnings in TFCS panel driver
v4l: ti-vps: vip: Use TILED flag in descriptor when using TILER address
v4l: ti-vps: vip: Call subdev op for getting video field type
v4l: v4l2-core: HACK: Allow TILER2D buffers for DMA BUFF mapping
...
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
51 files changed, 1250 insertions, 359 deletions
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 851f526ef742..a06aa6f3c09f 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts | |||
@@ -81,7 +81,7 @@ | |||
81 | 81 | ||
82 | memory { | 82 | memory { |
83 | device_type = "memory"; | 83 | device_type = "memory"; |
84 | reg = <0x80000000 0x20000000>; /* 512 MB */ | 84 | reg = <0x80000000 0x60000000>; /* 512 + 1024 MB */ |
85 | }; | 85 | }; |
86 | 86 | ||
87 | vmmc2_fixed: fixedregulator-mmc2 { | 87 | vmmc2_fixed: fixedregulator-mmc2 { |
@@ -180,7 +180,6 @@ | |||
180 | ti,media-codec = <&tlv320aic3106>; | 180 | ti,media-codec = <&tlv320aic3106>; |
181 | ti,media-mclk-freq = <11289600>; | 181 | ti,media-mclk-freq = <11289600>; |
182 | ti,media-slots = <2>; | 182 | ti,media-slots = <2>; |
183 | ti,media-shared; | ||
184 | 183 | ||
185 | /* Multichannel DAI link */ | 184 | /* Multichannel DAI link */ |
186 | ti,multichannel-cpu = <&mcasp6>; | 185 | ti,multichannel-cpu = <&mcasp6>; |
@@ -189,6 +188,7 @@ | |||
189 | ti,multichannel-codec-c = <&tlv320aic3106c>; | 188 | ti,multichannel-codec-c = <&tlv320aic3106c>; |
190 | ti,multichannel-slots = <8>; | 189 | ti,multichannel-slots = <8>; |
191 | ti,multichannel-mclk-freq = <11289600>; | 190 | ti,multichannel-mclk-freq = <11289600>; |
191 | ti,multichannel-shared; | ||
192 | 192 | ||
193 | /* Bluetooth */ | 193 | /* Bluetooth */ |
194 | ti,bt-cpu = <&mcasp7>; | 194 | ti,bt-cpu = <&mcasp7>; |
@@ -579,7 +579,7 @@ | |||
579 | dcan1_pins: pinmux_dcan1_pins { | 579 | dcan1_pins: pinmux_dcan1_pins { |
580 | pinctrl-single,pins = < | 580 | pinctrl-single,pins = < |
581 | 0x3d0 0x00000000 /* DCAN1_TX: MODE0 */ | 581 | 0x3d0 0x00000000 /* DCAN1_TX: MODE0 */ |
582 | 0x3d4 0x00060000 /* DCAN1_RX: MODE0 | INPUTENABLE | PULLUP */ | 582 | 0x418 0x00000001 /* WAKEUP0: MODE1 */ |
583 | >; | 583 | >; |
584 | }; | 584 | }; |
585 | 585 | ||
@@ -675,9 +675,9 @@ | |||
675 | gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */ | 675 | gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */ |
676 | }; | 676 | }; |
677 | 677 | ||
678 | tlv320aic3106: tlv320aic3106@18 { | 678 | tlv320aic3106: tlv320aic3106@19 { |
679 | compatible = "ti,tlv320aic3x"; | 679 | compatible = "ti,tlv320aic3x"; |
680 | reg = <0x18>; | 680 | reg = <0x19>; |
681 | adc-settle-ms = <40>; | 681 | adc-settle-ms = <40>; |
682 | IOVDD-supply = <&vaudio_3v3>; | 682 | IOVDD-supply = <&vaudio_3v3>; |
683 | DVDD-supply = <&vaudio_1v8>; | 683 | DVDD-supply = <&vaudio_1v8>; |
@@ -685,9 +685,12 @@ | |||
685 | DRVDD-supply = <&vaudio_3v3>; | 685 | DRVDD-supply = <&vaudio_3v3>; |
686 | }; | 686 | }; |
687 | 687 | ||
688 | mXT244:mXT244@4a { | 688 | ldc3001:ldc3001@18 { |
689 | reg = <0x4a>; | 689 | reg = <0x18>; |
690 | interrupt-parent = <&gpio1>; | ||
691 | interrupts = <2 4>; | ||
690 | }; | 692 | }; |
693 | |||
691 | }; | 694 | }; |
692 | 695 | ||
693 | /include/ "tps659038.dtsi" | 696 | /include/ "tps659038.dtsi" |
@@ -1090,17 +1093,53 @@ | |||
1090 | pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>; | 1093 | pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>; |
1091 | */ | 1094 | */ |
1092 | pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>; | 1095 | pinctrl-0 = <&vin1a_pins &vin1a_d16_d23_pins>; |
1096 | |||
1097 | vin1a: port@0A { | ||
1098 | #address-cells = <1>; | ||
1099 | #size-cells = <0>; | ||
1100 | reg = <0>; | ||
1101 | }; | ||
1102 | |||
1103 | vin2a: port@1A { | ||
1104 | #address-cells = <1>; | ||
1105 | #size-cells = <0>; | ||
1106 | reg = <1>; | ||
1107 | }; | ||
1093 | }; | 1108 | }; |
1094 | 1109 | ||
1095 | &vip2 { | 1110 | &vip2 { |
1096 | pinctrl-names = "default"; | 1111 | pinctrl-names = "default"; |
1097 | pinctrl-0 = <&vin3a_pins>; | 1112 | pinctrl-0 = <&vin3a_pins>; |
1113 | |||
1114 | vin3a: port@0A { | ||
1115 | #address-cells = <1>; | ||
1116 | #size-cells = <0>; | ||
1117 | reg = <0>; | ||
1118 | }; | ||
1119 | |||
1120 | vin4a: port@1A { | ||
1121 | #address-cells = <1>; | ||
1122 | #size-cells = <0>; | ||
1123 | reg = <1>; | ||
1124 | }; | ||
1098 | }; | 1125 | }; |
1099 | 1126 | ||
1100 | &vip3 { | 1127 | &vip3 { |
1101 | pinctrl-names = "default"; | 1128 | pinctrl-names = "default"; |
1102 | //pinctrl-0 = <&vin5a_pins &vin6a_pins>; | 1129 | //pinctrl-0 = <&vin5a_pins &vin6a_pins>; |
1103 | pinctrl-0 = <&vin5a_pins>; | 1130 | pinctrl-0 = <&vin5a_pins>; |
1131 | |||
1132 | vin5a: port@0A { | ||
1133 | #address-cells = <1>; | ||
1134 | #size-cells = <0>; | ||
1135 | reg = <0>; | ||
1136 | }; | ||
1137 | |||
1138 | vin6a: port@1A { | ||
1139 | #address-cells = <1>; | ||
1140 | #size-cells = <0>; | ||
1141 | reg = <1>; | ||
1142 | }; | ||
1104 | }; | 1143 | }; |
1105 | 1144 | ||
1106 | &vin1a { | 1145 | &vin1a { |
@@ -1163,12 +1202,16 @@ | |||
1163 | 1202 | ||
1164 | &dpi1 { | 1203 | &dpi1 { |
1165 | lcd { | 1204 | lcd { |
1166 | compatible = "ti,tfc_s9700"; | 1205 | compatible = "ti,tfc_lp101"; |
1167 | tlc = <&tlc59108>; | 1206 | tlc = <&tlc59108>; |
1168 | data-lines = <24>; | 1207 | data-lines = <24>; |
1169 | }; | 1208 | }; |
1170 | }; | 1209 | }; |
1171 | 1210 | ||
1211 | &ldc3001 { | ||
1212 | compatible = "lgphilips,ldc3001"; | ||
1213 | }; | ||
1214 | |||
1172 | &hdmi { | 1215 | &hdmi { |
1173 | vdda_hdmi_dac-supply = <&ldo3_reg>; | 1216 | vdda_hdmi_dac-supply = <&ldo3_reg>; |
1174 | tpd12s015: tpd12s015 { | 1217 | tpd12s015: tpd12s015 { |
@@ -1197,59 +1240,6 @@ | |||
1197 | }; | 1240 | }; |
1198 | }; | 1241 | }; |
1199 | 1242 | ||
1200 | &mXT244 { | ||
1201 | compatible = "atmel,mXT244"; | ||
1202 | interrupts = <0 119 0x4>; | ||
1203 | |||
1204 | atmel,config = < | ||
1205 | /* MXT244_GEN_COMMAND(6) */ | ||
1206 | 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1207 | /* MXT244_GEN_POWER(7) */ | ||
1208 | 0x20 0xff 0x32 | ||
1209 | /* MXT244_GEN_ACQUIRE(8) */ | ||
1210 | 0x0a 0x00 0x05 0x00 0x00 0x00 0x09 0x23 | ||
1211 | /* MXT244_TOUCH_MULTI(9) */ | ||
1212 | 0x00 0x00 0x00 0x13 0x0b 0x00 0x00 0x00 0x02 0x00 | ||
1213 | 0x00 0x01 0x01 0x0e 0x0a 0x0a 0x0a 0x0a 0x00 0x00 | ||
1214 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1215 | 0x00 | ||
1216 | /* MXT244_TOUCH_KEYARRAY(15) */ | ||
1217 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1218 | 0x00 | ||
1219 | /* MXT244_COMMSCONFIG_T18(2) */ | ||
1220 | 0x00 0x00 | ||
1221 | /* MXT244_SPT_GPIOPWM(19) */ | ||
1222 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1223 | 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1224 | /* MXT244_PROCI_GRIPFACE(20) */ | ||
1225 | 0x07 0x00 0x00 0x00 0x00 0x00 0x00 0x50 0x28 0x04 | ||
1226 | 0x0f 0x0a | ||
1227 | /* MXT244_PROCG_NOISE(22) */ | ||
1228 | 0x05 0x00 0x00 0x00 0x00 0x00 0x00 0x03 0x23 0x00 | ||
1229 | 0x00 0x05 0x0f 0x19 0x23 0x2d 0x03 | ||
1230 | /* MXT244_TOUCH_PROXIMITY(23) */ | ||
1231 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1232 | 0x00 0x00 0x00 0x00 0x00 | ||
1233 | /* MXT244_PROCI_ONETOUCH(24) */ | ||
1234 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1235 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1236 | /* MXT244_SPT_SELFTEST(25) */ | ||
1237 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1238 | 0x00 0x00 0x00 0x00 | ||
1239 | /* MXT244_PROCI_TWOTOUCH(27) */ | ||
1240 | 0x00 0x00 0x00 0x00 0x00 0x00 0x00 | ||
1241 | /* MXT244_SPT_CTECONFIG(28) */ | ||
1242 | 0x00 0x00 0x02 0x08 0x10 0x00 >; | ||
1243 | |||
1244 | atmel,x_line = <18>; | ||
1245 | atmel,y_line = <12>; | ||
1246 | atmel,x_size = <800>; | ||
1247 | atmel,y_size = <480>; | ||
1248 | atmel,blen = <0x01>; | ||
1249 | atmel,threshold = <30>; | ||
1250 | atmel,voltage = <2800000>; | ||
1251 | atmel,orient = <0x4>; | ||
1252 | }; | ||
1253 | &qspi { | 1243 | &qspi { |
1254 | spi-max-frequency = <48000000>; | 1244 | spi-max-frequency = <48000000>; |
1255 | m25p80@0 { | 1245 | m25p80@0 { |
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 27ec4e4150d9..57bb8008dc5c 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi | |||
@@ -755,6 +755,7 @@ | |||
755 | compatible = "ti,avsclass0"; | 755 | compatible = "ti,avsclass0"; |
756 | reg = <0x4A0025EC 0x20>; | 756 | reg = <0x4A0025EC 0x20>; |
757 | efuse-settings = <1030000 8>; | 757 | efuse-settings = <1030000 8>; |
758 | voltage-tolerance = <1>; | ||
758 | }; | 759 | }; |
759 | 760 | ||
760 | avs_gpu: regulator-avs@0x4A003B00 { | 761 | avs_gpu: regulator-avs@0x4A003B00 { |
@@ -769,7 +770,7 @@ | |||
769 | avs_dspeve: regulator-avs@0x4A0025D8 { | 770 | avs_dspeve: regulator-avs@0x4A0025D8 { |
770 | compatible = "ti,avsclass0"; | 771 | compatible = "ti,avsclass0"; |
771 | reg = <0x4A0025D8 0x20>; | 772 | reg = <0x4A0025D8 0x20>; |
772 | efuse-settings = <1055000 8 | 773 | efuse-settings = <1060000 8 |
773 | 1150000 12 | 774 | 1150000 12 |
774 | 1250000 16>; | 775 | 1250000 16>; |
775 | voltage-tolerance = <1>; | 776 | voltage-tolerance = <1>; |
@@ -778,7 +779,7 @@ | |||
778 | avs_iva: regulator-avs@0x4A0025C4 { | 779 | avs_iva: regulator-avs@0x4A0025C4 { |
779 | compatible = "ti,avsclass0"; | 780 | compatible = "ti,avsclass0"; |
780 | reg = <0x4A0025C4 0x20>; | 781 | reg = <0x4A0025C4 0x20>; |
781 | efuse-settings = <1055000 8 | 782 | efuse-settings = <1060000 8 |
782 | 1150000 12 | 783 | 1150000 12 |
783 | 1250000 16>; | 784 | 1250000 16>; |
784 | voltage-tolerance = <1>; | 785 | voltage-tolerance = <1>; |
@@ -1092,17 +1093,6 @@ | |||
1092 | <0 153 0x4>; | 1093 | <0 153 0x4>; |
1093 | #address-cells = <1>; | 1094 | #address-cells = <1>; |
1094 | #size-cells = <0>; | 1095 | #size-cells = <0>; |
1095 | |||
1096 | vin1a: port@0A { | ||
1097 | #address-cells = <1>; | ||
1098 | #size-cells = <0>; | ||
1099 | reg = <0>; | ||
1100 | }; | ||
1101 | vin2a: port@1A { | ||
1102 | #address-cells = <1>; | ||
1103 | #size-cells = <0>; | ||
1104 | reg = <1>; | ||
1105 | }; | ||
1106 | }; | 1096 | }; |
1107 | 1097 | ||
1108 | vip2: vip@0x48990000 { | 1098 | vip2: vip@0x48990000 { |
@@ -1115,17 +1105,6 @@ | |||
1115 | <0 151 0x4>; | 1105 | <0 151 0x4>; |
1116 | #address-cells = <1>; | 1106 | #address-cells = <1>; |
1117 | #size-cells = <0>; | 1107 | #size-cells = <0>; |
1118 | |||
1119 | vin3a: port@0A { | ||
1120 | #address-cells = <1>; | ||
1121 | #size-cells = <0>; | ||
1122 | reg = <0>; | ||
1123 | }; | ||
1124 | vin4a: port@1A { | ||
1125 | #address-cells = <1>; | ||
1126 | #size-cells = <0>; | ||
1127 | reg = <1>; | ||
1128 | }; | ||
1129 | }; | 1108 | }; |
1130 | 1109 | ||
1131 | vip3: vip@0x489b0000 { | 1110 | vip3: vip@0x489b0000 { |
@@ -1138,17 +1117,6 @@ | |||
1138 | <0 149 0x4>; | 1117 | <0 149 0x4>; |
1139 | #address-cells = <1>; | 1118 | #address-cells = <1>; |
1140 | #size-cells = <0>; | 1119 | #size-cells = <0>; |
1141 | |||
1142 | vin5a: port@0A { | ||
1143 | #address-cells = <1>; | ||
1144 | #size-cells = <0>; | ||
1145 | reg = <0>; | ||
1146 | }; | ||
1147 | vin6a: port@1A { | ||
1148 | #address-cells = <1>; | ||
1149 | #size-cells = <0>; | ||
1150 | reg = <1>; | ||
1151 | }; | ||
1152 | }; | 1120 | }; |
1153 | 1121 | ||
1154 | vpe { | 1122 | vpe { |
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index ab745be9f727..bd620ef0ff6c 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts | |||
@@ -92,6 +92,12 @@ | |||
92 | ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>; | 92 | ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>; |
93 | }; | 93 | }; |
94 | 94 | ||
95 | display_layout { | ||
96 | compatible = "ti, omap4-dsscomp"; | ||
97 | ti,num_displays = <3>; | ||
98 | ti,default_display = "lcd"; | ||
99 | }; | ||
100 | |||
95 | vmmcwl_fixed: fixedregulator-mmcwl { | 101 | vmmcwl_fixed: fixedregulator-mmcwl { |
96 | compatible = "regulator-fixed"; | 102 | compatible = "regulator-fixed"; |
97 | regulator-name = "vmmcwl_fixed"; | 103 | regulator-name = "vmmcwl_fixed"; |
@@ -102,6 +108,11 @@ | |||
102 | enable-active-high; | 108 | enable-active-high; |
103 | }; | 109 | }; |
104 | 110 | ||
111 | wlcore { | ||
112 | compatible = "wlcore"; | ||
113 | gpio = <135>; | ||
114 | }; | ||
115 | |||
105 | vaudio_1v8: fixedregulator-vaudio-dig { | 116 | vaudio_1v8: fixedregulator-vaudio-dig { |
106 | compatible = "regulator-fixed"; | 117 | compatible = "regulator-fixed"; |
107 | regulator-name = "vdac_fixed"; | 118 | regulator-name = "vdac_fixed"; |
@@ -167,6 +178,17 @@ | |||
167 | ti,bt-bclk-freq = <512000>; | 178 | ti,bt-bclk-freq = <512000>; |
168 | }; | 179 | }; |
169 | 180 | ||
181 | radio { | ||
182 | compatible = "ti,dra7xx_radio"; | ||
183 | gpios = <&gpio6 20 0>; | ||
184 | |||
185 | radio_helper1 { | ||
186 | compatible = "ti,dra7xx_radio_subdev"; | ||
187 | ti,hwmods = "mcasp2"; | ||
188 | status = "okay"; | ||
189 | }; | ||
190 | }; | ||
191 | |||
170 | sound_hdmi { | 192 | sound_hdmi { |
171 | compatible = "ti,omap-hdmi-tpd12s015-audio"; | 193 | compatible = "ti,omap-hdmi-tpd12s015-audio"; |
172 | ti,model = "OMAP5HDMI"; | 194 | ti,model = "OMAP5HDMI"; |
@@ -188,6 +210,18 @@ | |||
188 | dr_mode = "host"; | 210 | dr_mode = "host"; |
189 | }; | 211 | }; |
190 | 212 | ||
213 | kim { | ||
214 | compatible = "kim"; | ||
215 | nshutdown_gpio = <132>; | ||
216 | dev_name = "/dev/ttyO2"; | ||
217 | flow_cntrl = <1>; | ||
218 | baud_rate = <3686400>; | ||
219 | gpios = <&pcf_lcd3 14 0>; /* pcf8575@21 P16 */ | ||
220 | }; | ||
221 | |||
222 | btwilink { | ||
223 | compatible = "btwilink"; | ||
224 | }; | ||
191 | 225 | ||
192 | }; | 226 | }; |
193 | 227 | ||
@@ -201,6 +235,10 @@ | |||
201 | &mcasp7_pins | 235 | &mcasp7_pins |
202 | &vout1_pins | 236 | &vout1_pins |
203 | &usb_pins | 237 | &usb_pins |
238 | &wl_pins | ||
239 | &wlirq_pins | ||
240 | &bt_uart3_pins | ||
241 | &radio_pins | ||
204 | >; | 242 | >; |
205 | 243 | ||
206 | i2c1_pins: pinmux_i2c1_pins { | 244 | i2c1_pins: pinmux_i2c1_pins { |
@@ -210,6 +248,13 @@ | |||
210 | >; | 248 | >; |
211 | }; | 249 | }; |
212 | 250 | ||
251 | i2c2_pins: pinmux_i2c2_pins { | ||
252 | pinctrl-single,pins = < | ||
253 | 0x408 0x60001 /* hdmi_sda INPUT | MODE1 */ | ||
254 | 0x40C 0x60001 /* hdmi_scl INPUT | MODE1 */ | ||
255 | >; | ||
256 | }; | ||
257 | |||
213 | i2c3_pins: pinmux_i2c3_pins { | 258 | i2c3_pins: pinmux_i2c3_pins { |
214 | pinctrl-single,pins = < | 259 | pinctrl-single,pins = < |
215 | 0x410 0x60000 /* i2c3_sda INPUT | MODE0 */ | 260 | 0x410 0x60000 /* i2c3_sda INPUT | MODE0 */ |
@@ -231,6 +276,66 @@ | |||
231 | >; | 276 | >; |
232 | }; | 277 | }; |
233 | 278 | ||
279 | wl_pins: pinmux_wl_pins { | ||
280 | pinctrl-single,pins = < | ||
281 | 0x3e8 0x60003 /* MMC4_CLK: INPUTENABLE | PULLUP | MODE3 */ | ||
282 | 0x3ec 0x60003 /* MMC4_CMD: INPUTENABLE | PULLUP | MODE3 */ | ||
283 | 0x3f0 0x60003 /* MMC4_DAT0: INPUTENABLE | PULLUP | MODE3 */ | ||
284 | 0x3f4 0x60003 /* MMC4_DAT1: INPUTENABLE | PULLUP | MODE3 */ | ||
285 | 0x3f8 0x60003 /* MMC4_DAT2: INPUTENABLE | PULLUP | MODE3 */ | ||
286 | 0x3fc 0x60003 /* MMC4_DAT3: INPUTENABLE | PULLUP | MODE3 */ | ||
287 | 0x2cc 0x2000E /* WLAN_EN: OUTPUT | MODE14 */ | ||
288 | >; | ||
289 | }; | ||
290 | |||
291 | wlirq_pins: pinmux_wlirq_pins { | ||
292 | pinctrl-single,pins = < | ||
293 | 0x2c8 0x106000E /* WLAN_IRQ: INPUT | WAKEUP_ENABLE | MODE 14 */ | ||
294 | >; | ||
295 | }; | ||
296 | |||
297 | bt_uart3_pins: pinmux_bt_uart3_pins { | ||
298 | pinctrl-single,pins = < | ||
299 | 0x3c0 0x60001 /* uart3_rx.spi2_sclk: INPUT | PULLUP | MODE 1 */ | ||
300 | 0x3c4 0x1 /* uart3_tx.spi2.d1: OUTPUT | MODE 1 */ | ||
301 | 0x3c8 0x40001 /* uart3_rts.spi2.c0: OUTPUT | PULLUP | MODE 1 */ | ||
302 | 0x3cc 0x60001 /* uart3_cts.spi2.d0: INPUT | MODE 1 */ | ||
303 | 0x2bc 0xE /* BT_EN.gp5_4: OUTPUT | MODE 14 */ | ||
304 | >; | ||
305 | }; | ||
306 | |||
307 | dcan1_pins: pinmux_dcan1_pins { | ||
308 | pinctrl-single,pins = < | ||
309 | 0x3d0 0x00000000 /* DCAN1_TX: MODE0 */ | ||
310 | 0x418 0x00000001 /* WAKEUP0: MODE1 */ | ||
311 | >; | ||
312 | }; | ||
313 | |||
314 | dcan2_pins: pinmux_dcan2_pins { | ||
315 | pinctrl-single,pins = < | ||
316 | 0x288 0x00000002 /* DCAN2_TX: MODE2 */ | ||
317 | 0x28C 0x00060002 /* DCAN2_RX: MODE2 | INPUTENABLE | PULLUP */ | ||
318 | >; | ||
319 | }; | ||
320 | |||
321 | radio_pins: pinmux_radio_pins { | ||
322 | pinctrl-single,pins = < | ||
323 | 0x02F4 0x40000 /* MCASP2_ACLKX: MODE0 */ | ||
324 | 0x02F8 0xc0000 /* MCASP2_AFSX: MODE0 */ | ||
325 | 0x0304 0x40000 /* MCASP2_AXR0: MODE0 */ | ||
326 | 0x0308 0x40000 /* MCASP2_AXR1: MODE0 */ | ||
327 | 0x030C 0xc0000 /* MCASP2_AXR2: MODE0 */ | ||
328 | 0x0310 0xc0000 /* MCASP2_AXR3: MODE0 */ | ||
329 | 0x0314 0x40000 /* MCASP2_AXR4: MODE0 */ | ||
330 | 0x0318 0x40000 /* MCASP2_AXR5: MODE0 */ | ||
331 | 0x031c 0x40000 /* MCASP2_AXR6: MODE0 */ | ||
332 | 0x0320 0x40000 /* MCASP2_AXR7: MODE0 */ | ||
333 | 0x0334 0x70004 /* I2C4_SDA: MODE4 */ | ||
334 | 0x0338 0x70004 /* I2C4_SCL: MODE4 */ | ||
335 | 0x02A0 0x5000e /* GPIO6_20: MODE14 */ | ||
336 | >; | ||
337 | }; | ||
338 | |||
234 | vout1_pins: pinmux_vout1_pins { | 339 | vout1_pins: pinmux_vout1_pins { |
235 | pinctrl-single,pins = < | 340 | pinctrl-single,pins = < |
236 | 0x1C8 0x0 /* vout1_clk OUTPUT | MODE0 */ | 341 | 0x1C8 0x0 /* vout1_clk OUTPUT | MODE0 */ |
@@ -340,6 +445,31 @@ | |||
340 | >; | 445 | >; |
341 | }; | 446 | }; |
342 | 447 | ||
448 | cpsw_default_pins: pinmux_cpsw_default_pins { | ||
449 | pinctrl-single,pins = < | ||
450 | /* Slave 1 */ | ||
451 | 0x250 0x0 /* rgmii1_tclk PIN_OUTPUT | MUX_MODE0 */ | ||
452 | 0x254 0x0 /* rgmii1_tctl PIN_OUTPUT | MUX_MODE0 */ | ||
453 | 0x258 0x0 /* rgmii1_td3 PIN_OUTPUT | MUX_MODE0 */ | ||
454 | 0x25c 0x0 /* rgmii1_td2 PIN_OUTPUT | MUX_MODE0 */ | ||
455 | 0x260 0x0 /* rgmii1_td1 PIN_OUTPUT | MUX_MODE0 */ | ||
456 | 0x264 0x0 /* rgmii1_td0 PIN_OUTPUT | MUX_MODE0 */ | ||
457 | 0x268 0x00040000 /* rgmii1_rclk PIN_INPUT | MUX_MODE0 */ | ||
458 | 0x26c 0x00040000 /* rgmii1_rctl PIN_INPUT | MUX_MODE0 */ | ||
459 | 0x270 0x00040000 /* rgmii1_rd3 PIN_INPUT | MUX_MODE0 */ | ||
460 | 0x274 0x00040000 /* rgmii1_rd2 PIN_INPUT | MUX_MODE0 */ | ||
461 | 0x278 0x00040000 /* rgmii1_rd1 PIN_INPUT | MUX_MODE0 */ | ||
462 | 0x27c 0x00040000 /* rgmii1_rd0 PIN_INPUT | MUX_MODE0 */ | ||
463 | >; | ||
464 | }; | ||
465 | |||
466 | davinci_mdio_default_pins: pinmux_davinci_mdio_default_pins { | ||
467 | pinctrl-single,pins = < | ||
468 | 0x23C 0x30000 /* mdio_data PIN_OUTPUT_PULLUP | MUX_MODE0 */ | ||
469 | 0x240 0x70000 /* mdio_clk PIN_INPUT_PULLUP | MUX_MODE0 */ | ||
470 | >; | ||
471 | }; | ||
472 | |||
343 | mcasp3_pins: pinmux_mcasp3_pins { | 473 | mcasp3_pins: pinmux_mcasp3_pins { |
344 | pinctrl-single,pins = < | 474 | pinctrl-single,pins = < |
345 | 0x324 0x00000180 /* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */ | 475 | 0x324 0x00000180 /* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */ |
@@ -393,7 +523,7 @@ | |||
393 | reg = <0x21>; | 523 | reg = <0x21>; |
394 | gpio-controller; | 524 | gpio-controller; |
395 | #gpio-cells = <2>; | 525 | #gpio-cells = <2>; |
396 | n_latch = <0x1408>; | 526 | n_latch = <0x1418>; |
397 | interrupt-parent = <&gpio6>; | 527 | interrupt-parent = <&gpio6>; |
398 | interrupts = <14 2>; | 528 | interrupts = <14 2>; |
399 | interrupt-controller; | 529 | interrupt-controller; |
@@ -546,7 +676,7 @@ | |||
546 | reg = <0x26>; | 676 | reg = <0x26>; |
547 | gpio-controller; | 677 | gpio-controller; |
548 | #gpio-cells = <2>; | 678 | #gpio-cells = <2>; |
549 | n_latch = <0xfffb>; | 679 | n_latch = <0xff7b>; |
550 | }; | 680 | }; |
551 | 681 | ||
552 | tlv320aic3106a: tlv320aic3106@18 { | 682 | tlv320aic3106a: tlv320aic3106@18 { |
@@ -584,7 +714,8 @@ | |||
584 | <&gpio4 14 0>, | 714 | <&gpio4 14 0>, |
585 | <&gpio4 15 0>, | 715 | <&gpio4 15 0>, |
586 | <&gpio4 16 0>, | 716 | <&gpio4 16 0>, |
587 | <&gpio6 17 0>; | 717 | <&gpio6 17 0>, |
718 | <&pcf_hdmi 6 0>; | ||
588 | }; | 719 | }; |
589 | 720 | ||
590 | ov10633@37 { | 721 | ov10633@37 { |
@@ -600,6 +731,26 @@ | |||
600 | }; | 731 | }; |
601 | }; | 732 | }; |
602 | 733 | ||
734 | camera_tvp5158: camera_tvp5158 { | ||
735 | compatible = "ti,tvp5158"; | ||
736 | reg = <0x58>; | ||
737 | gpios = <&pcf_hdmi 3 0>, | ||
738 | <&pcf_lcd3 8 0>, | ||
739 | <&pcf_hdmi 2 0>, | ||
740 | <&pcf_hdmi 6 0>; | ||
741 | port { | ||
742 | tvp5158: endpoint { | ||
743 | // No props incase of BT656 | ||
744 | }; | ||
745 | }; | ||
746 | }; | ||
747 | |||
748 | }; | ||
749 | |||
750 | &i2c2 { | ||
751 | pinctrl-names = "default"; | ||
752 | pinctrl-0 = <&i2c2_pins>; | ||
753 | clock-frequency = <400000>; | ||
603 | }; | 754 | }; |
604 | 755 | ||
605 | &i2c3 { | 756 | &i2c3 { |
@@ -614,10 +765,28 @@ | |||
614 | clock-frequency = <400000>; | 765 | clock-frequency = <400000>; |
615 | }; | 766 | }; |
616 | 767 | ||
768 | &dcan1 { | ||
769 | pinctrl-names = "default"; | ||
770 | pinctrl-0 = <&dcan1_pins>; | ||
771 | status = "okay"; | ||
772 | }; | ||
773 | |||
774 | &dcan2 { | ||
775 | pinctrl-names = "default"; | ||
776 | pinctrl-0 = <&dcan2_pins>; | ||
777 | status = "okay"; | ||
778 | }; | ||
779 | |||
617 | 780 | ||
618 | &vip1 { | 781 | &vip1 { |
619 | pinctrl-names = "default"; | 782 | pinctrl-names = "default"; |
620 | pinctrl-0 = <&vin1a_pins &vin2a_pins>; | 783 | pinctrl-0 = <&vin1a_pins &vin2a_pins>; |
784 | |||
785 | vin2a: port@1A { | ||
786 | #address-cells = <1>; | ||
787 | #size-cells = <0>; | ||
788 | reg = <1>; | ||
789 | }; | ||
621 | }; | 790 | }; |
622 | 791 | ||
623 | &vin2a { | 792 | &vin2a { |
@@ -625,6 +794,30 @@ | |||
625 | slave-mode; | 794 | slave-mode; |
626 | remote-endpoint = <&onboardLI>; | 795 | remote-endpoint = <&onboardLI>; |
627 | }; | 796 | }; |
797 | |||
798 | endpoint@1 { | ||
799 | slave-mode; | ||
800 | remote-endpoint = <&tvp5158>; | ||
801 | }; | ||
802 | }; | ||
803 | |||
804 | &gmac { | ||
805 | status="okay"; | ||
806 | pinctrl-names = "default"; | ||
807 | pinctrl-0 = <&cpsw_default_pins>; | ||
808 | }; | ||
809 | |||
810 | &davinci_mdio { | ||
811 | pinctrl-names = "default"; | ||
812 | pinctrl-0 = <&davinci_mdio_default_pins>; | ||
813 | }; | ||
814 | |||
815 | &cpsw_emac0 { | ||
816 | phy_id = <&davinci_mdio>, <3>; | ||
817 | }; | ||
818 | |||
819 | &cpsw_emac1 { | ||
820 | phy_id = <&davinci_mdio>, <2>; | ||
628 | }; | 821 | }; |
629 | 822 | ||
630 | &mmc1 { | 823 | &mmc1 { |
@@ -678,7 +871,7 @@ | |||
678 | <&pcf_hdmi 5 0>, /* pcf8575@22 P5, LS_OE */ | 871 | <&pcf_hdmi 5 0>, /* pcf8575@22 P5, LS_OE */ |
679 | <&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */ | 872 | <&gpio7 12 0>; /* gpio7_12/sp1_cs2, HPD */ |
680 | 873 | ||
681 | hdmi_ddc = <&i2c5>; | 874 | hdmi_ddc = <&i2c2>; |
682 | 875 | ||
683 | hdmi-monitor { | 876 | hdmi-monitor { |
684 | compatible = "ti,hdmi_panel"; | 877 | compatible = "ti,hdmi_panel"; |
diff --git a/arch/arm/boot/dts/tps659038.dtsi b/arch/arm/boot/dts/tps659038.dtsi index 39f70ed114c1..e19c6de5c6ed 100644 --- a/arch/arm/boot/dts/tps659038.dtsi +++ b/arch/arm/boot/dts/tps659038.dtsi | |||
@@ -50,8 +50,8 @@ | |||
50 | 50 | ||
51 | smps7_reg: smps7 { | 51 | smps7_reg: smps7 { |
52 | regulator-name = "smps7"; | 52 | regulator-name = "smps7"; |
53 | regulator-min-microvolt = <1030000>; | 53 | regulator-min-microvolt = <850000>; |
54 | regulator-max-microvolt = <1030000>; | 54 | regulator-max-microvolt = <1060000>; |
55 | regulator-always-on; | 55 | regulator-always-on; |
56 | regulator-boot-on; | 56 | regulator-boot-on; |
57 | }; | 57 | }; |
diff --git a/arch/arm/configs/android_omap_defconfig b/arch/arm/configs/android_omap_defconfig index 6765ad23b5ba..5246906a4745 100644 --- a/arch/arm/configs/android_omap_defconfig +++ b/arch/arm/configs/android_omap_defconfig | |||
@@ -35,7 +35,7 @@ CONFIG_PREEMPT=y | |||
35 | CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y | 35 | CONFIG_ARM_FLUSH_CONSOLE_ON_RESTART=y |
36 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 36 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
37 | CONFIG_ZBOOT_ROM_BSS=0x0 | 37 | CONFIG_ZBOOT_ROM_BSS=0x0 |
38 | CONFIG_CMDLINE="root=/dev/mmcblk0p2 rw rootwait console=ttyO0,115200 androidboot.console=ttyO0 mem=1500M init=/init omapfb.fb_opt=-1,-1,-1,-1,-1,-1 cma=96M no_console_suspend androidboot.selinux=permissive" | 38 | CONFIG_CMDLINE="root=/dev/mmcblk0p2 rw rootwait console=ttyO0,115200 androidboot.console=ttyO0 init=/init omapfb.fb_opt=-1,-1,-1,-1,-1,-1 cma=96M no_console_suspend androidboot.selinux=permissive" |
39 | # CONFIG_CMDLINE_FORCE is not set | 39 | # CONFIG_CMDLINE_FORCE is not set |
40 | CONFIG_CMDLINE_EXTEND=y | 40 | CONFIG_CMDLINE_EXTEND=y |
41 | CONFIG_KEXEC=y | 41 | CONFIG_KEXEC=y |
@@ -262,10 +262,12 @@ CONFIG_MFD_PALMAS_PWM=y | |||
262 | CONFIG_MFD_PALMAS_RESOURCE=y | 262 | CONFIG_MFD_PALMAS_RESOURCE=y |
263 | CONFIG_REGULATOR_PALMAS=y | 263 | CONFIG_REGULATOR_PALMAS=y |
264 | CONFIG_MFD_TPS65910=y | 264 | CONFIG_MFD_TPS65910=y |
265 | CONFIG_MFD_TPS65917=y | ||
265 | CONFIG_REGULATOR_TPS65023=y | 266 | CONFIG_REGULATOR_TPS65023=y |
266 | CONFIG_REGULATOR_TPS6507X=y | 267 | CONFIG_REGULATOR_TPS6507X=y |
267 | CONFIG_REGULATOR_TPS65217=y | 268 | CONFIG_REGULATOR_TPS65217=y |
268 | CONFIG_REGULATOR_TPS65910=y | 269 | CONFIG_REGULATOR_TPS65910=y |
270 | CONFIG_REGULATOR_TPS65917=y | ||
269 | CONFIG_REGULATOR_TI_ABB=y | 271 | CONFIG_REGULATOR_TI_ABB=y |
270 | CONFIG_REGULATOR_TIAVSCLASS0=y | 272 | CONFIG_REGULATOR_TIAVSCLASS0=y |
271 | CONFIG_MEDIA_SUPPORT=y | 273 | CONFIG_MEDIA_SUPPORT=y |
@@ -468,6 +470,7 @@ CONFIG_TI_DAVINCI_MDIO=y | |||
468 | CONFIG_TI_DAVINCI_CPDMA=y | 470 | CONFIG_TI_DAVINCI_CPDMA=y |
469 | CONFIG_PM_WAKELOCKS=y | 471 | CONFIG_PM_WAKELOCKS=y |
470 | CONFIG_TOUCHSCREEN_ATMEL_MXT=y | 472 | CONFIG_TOUCHSCREEN_ATMEL_MXT=y |
473 | CONFIG_TOUCHSCREEN_LDC3001=y | ||
471 | CONFIG_PANEL_LG_101=y | 474 | CONFIG_PANEL_LG_101=y |
472 | CONFIG_PANEL_SERLINK=y | 475 | CONFIG_PANEL_SERLINK=y |
473 | CONFIG_PANEL_DSERLINK=y | 476 | CONFIG_PANEL_DSERLINK=y |
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 398e5fdc21de..3028087905fe 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -12,6 +12,7 @@ config ARCH_OMAP2PLUS_TYPICAL | |||
12 | select MENELAUS if ARCH_OMAP2 | 12 | select MENELAUS if ARCH_OMAP2 |
13 | select NEON if CPU_V7 | 13 | select NEON if CPU_V7 |
14 | select PM_RUNTIME | 14 | select PM_RUNTIME |
15 | select SOC_BUS | ||
15 | select REGULATOR | 16 | select REGULATOR |
16 | select SERIAL_OMAP | 17 | select SERIAL_OMAP |
17 | select SERIAL_OMAP_CONSOLE | 18 | select SERIAL_OMAP_CONSOLE |
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h index a9f8ce65fdc6..824f9be7e37b 100644 --- a/arch/arm/mach-omap2/common.h +++ b/arch/arm/mach-omap2/common.h | |||
@@ -123,6 +123,14 @@ int omap2_common_pm_late_init(void); | |||
123 | void dra7xx_init_early(void); | 123 | void dra7xx_init_early(void); |
124 | void dra7xx_init_late(void); | 124 | void dra7xx_init_late(void); |
125 | 125 | ||
126 | #ifdef CONFIG_SOC_BUS | ||
127 | void omap_soc_device_init(void); | ||
128 | #else | ||
129 | static inline void omap_soc_device_init(void) | ||
130 | { | ||
131 | } | ||
132 | #endif | ||
133 | |||
126 | #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) | 134 | #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430) |
127 | void omap2xxx_restart(char mode, const char *cmd); | 135 | void omap2xxx_restart(char mode, const char *cmd); |
128 | #else | 136 | #else |
diff --git a/arch/arm/mach-omap2/devices.c b/arch/arm/mach-omap2/devices.c index 0aabee9cd58c..63f5a54fd857 100644 --- a/arch/arm/mach-omap2/devices.c +++ b/arch/arm/mach-omap2/devices.c | |||
@@ -749,7 +749,6 @@ static int __init omap2_init_devices(void) | |||
749 | */ | 749 | */ |
750 | omap_init_audio(); | 750 | omap_init_audio(); |
751 | omap_init_camera(); | 751 | omap_init_camera(); |
752 | omap_init_mbox(); | ||
753 | gcxxx_init(); | 752 | gcxxx_init(); |
754 | /* If dtb is there, the devices will be created dynamically */ | 753 | /* If dtb is there, the devices will be created dynamically */ |
755 | if (!of_have_populated_dt()) { | 754 | if (!of_have_populated_dt()) { |
diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index fd505a32d88f..349aa731e3f8 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c | |||
@@ -18,6 +18,11 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/init.h> | 19 | #include <linux/init.h> |
20 | #include <linux/io.h> | 20 | #include <linux/io.h> |
21 | #include <linux/slab.h> | ||
22 | |||
23 | #ifdef CONFIG_SOC_BUS | ||
24 | #include <linux/sys_soc.h> | ||
25 | #endif | ||
21 | 26 | ||
22 | #include <asm/cputype.h> | 27 | #include <asm/cputype.h> |
23 | 28 | ||
@@ -31,8 +36,11 @@ | |||
31 | #define OMAP4_SILICON_TYPE_STANDARD 0x01 | 36 | #define OMAP4_SILICON_TYPE_STANDARD 0x01 |
32 | #define OMAP4_SILICON_TYPE_PERFORMANCE 0x02 | 37 | #define OMAP4_SILICON_TYPE_PERFORMANCE 0x02 |
33 | 38 | ||
39 | #define OMAP_SOC_MAX_NAME_LENGTH 16 | ||
40 | |||
34 | static unsigned int omap_revision; | 41 | static unsigned int omap_revision; |
35 | static const char *cpu_rev; | 42 | static char soc_name[OMAP_SOC_MAX_NAME_LENGTH]; |
43 | static char soc_rev[OMAP_SOC_MAX_NAME_LENGTH]; | ||
36 | u32 omap_features; | 44 | u32 omap_features; |
37 | 45 | ||
38 | unsigned int omap_rev(void) | 46 | unsigned int omap_rev(void) |
@@ -197,9 +205,12 @@ void __init omap2xxx_check_revision(void) | |||
197 | j = i; | 205 | j = i; |
198 | } | 206 | } |
199 | 207 | ||
200 | pr_info("OMAP%04x", omap_rev() >> 16); | 208 | sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); |
209 | sprintf(soc_rev, "ES%x", (omap_rev() >> 12) & 0xf); | ||
210 | |||
211 | pr_info("%s", soc_name); | ||
201 | if ((omap_rev() >> 8) & 0x0f) | 212 | if ((omap_rev() >> 8) & 0x0f) |
202 | pr_info("ES%x", (omap_rev() >> 12) & 0xf); | 213 | pr_info("%s", soc_rev); |
203 | pr_info("\n"); | 214 | pr_info("\n"); |
204 | } | 215 | } |
205 | 216 | ||
@@ -239,8 +250,10 @@ static void __init omap3_cpuinfo(void) | |||
239 | cpu_name = "OMAP3503"; | 250 | cpu_name = "OMAP3503"; |
240 | } | 251 | } |
241 | 252 | ||
253 | sprintf(soc_name, "%s", cpu_name); | ||
254 | |||
242 | /* Print verbose information */ | 255 | /* Print verbose information */ |
243 | pr_info("%s ES%s (", cpu_name, cpu_rev); | 256 | pr_info("%s %s (", soc_name, soc_rev); |
244 | 257 | ||
245 | OMAP3_SHOW_FEATURE(l2cache); | 258 | OMAP3_SHOW_FEATURE(l2cache); |
246 | OMAP3_SHOW_FEATURE(iva); | 259 | OMAP3_SHOW_FEATURE(iva); |
@@ -332,6 +345,7 @@ void __init am33xx_check_features(void) | |||
332 | 345 | ||
333 | void __init omap3xxx_check_revision(void) | 346 | void __init omap3xxx_check_revision(void) |
334 | { | 347 | { |
348 | const char *cpu_rev; | ||
335 | u32 cpuid, idcode; | 349 | u32 cpuid, idcode; |
336 | u16 hawkeye; | 350 | u16 hawkeye; |
337 | u8 rev; | 351 | u8 rev; |
@@ -483,6 +497,7 @@ void __init omap3xxx_check_revision(void) | |||
483 | cpu_rev = "1.2"; | 497 | cpu_rev = "1.2"; |
484 | pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); | 498 | pr_warn("Warning: unknown chip type; assuming OMAP3630ES1.2\n"); |
485 | } | 499 | } |
500 | sprintf(soc_rev, "ES%s", cpu_rev); | ||
486 | } | 501 | } |
487 | 502 | ||
488 | void __init omap4xxx_check_revision(void) | 503 | void __init omap4xxx_check_revision(void) |
@@ -557,8 +572,10 @@ void __init omap4xxx_check_revision(void) | |||
557 | omap_revision = OMAP4430_REV_ES2_3; | 572 | omap_revision = OMAP4430_REV_ES2_3; |
558 | } | 573 | } |
559 | 574 | ||
560 | pr_info("OMAP%04x ES%d.%d\n", omap_rev() >> 16, | 575 | sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); |
561 | ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); | 576 | sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf, |
577 | (omap_rev() >> 8) & 0xf); | ||
578 | pr_info("%s %s\n", soc_name, soc_rev); | ||
562 | } | 579 | } |
563 | 580 | ||
564 | void __init omap5xxx_check_revision(void) | 581 | void __init omap5xxx_check_revision(void) |
@@ -605,8 +622,10 @@ void __init omap5xxx_check_revision(void) | |||
605 | omap_revision = OMAP5430_REV_ES2_0; | 622 | omap_revision = OMAP5430_REV_ES2_0; |
606 | } | 623 | } |
607 | 624 | ||
608 | pr_info("OMAP%04x ES%d.0\n", | 625 | sprintf(soc_name, "OMAP%04x", omap_rev() >> 16); |
609 | omap_rev() >> 16, ((omap_rev() >> 12) & 0xf)); | 626 | sprintf(soc_rev, "ES%d.0", (omap_rev() >> 12) & 0xf); |
627 | |||
628 | pr_info("%s %s\n", soc_name, soc_rev); | ||
610 | } | 629 | } |
611 | 630 | ||
612 | void __init dra7xx_check_revision(void) | 631 | void __init dra7xx_check_revision(void) |
@@ -631,13 +650,29 @@ void __init dra7xx_check_revision(void) | |||
631 | omap_revision = DRA752_REV_ES1_0; | 650 | omap_revision = DRA752_REV_ES1_0; |
632 | } | 651 | } |
633 | break; | 652 | break; |
653 | |||
654 | case 0xb9bc: | ||
655 | switch (rev) { | ||
656 | case 0: | ||
657 | omap_revision = DRA722_REV_ES1_0; | ||
658 | break; | ||
659 | default: | ||
660 | /* If we have no new revisions */ | ||
661 | omap_revision = DRA722_REV_ES1_0; | ||
662 | break; | ||
663 | } | ||
664 | break; | ||
665 | |||
634 | default: | 666 | default: |
635 | /* Unknown. Default to latest silicon revision */ | 667 | /* Unknown. Default to latest silicon revision */ |
636 | omap_revision = DRA752_REV_ES1_0; | 668 | omap_revision = DRA752_REV_ES1_0; |
637 | } | 669 | } |
638 | 670 | ||
639 | pr_info("DRA%03x ES%d.%d\n", omap_rev() >> 16, | 671 | sprintf(soc_name, "DRA%03x", omap_rev() >> 16); |
640 | ((omap_rev() >> 12) & 0xf), ((omap_rev() >> 8) & 0xf)); | 672 | sprintf(soc_rev, "ES%d.%d", (omap_rev() >> 12) & 0xf, |
673 | (omap_rev() >> 8) & 0xf); | ||
674 | |||
675 | pr_info("%s %s\n", soc_name, soc_rev); | ||
641 | } | 676 | } |
642 | 677 | ||
643 | /* | 678 | /* |
@@ -658,3 +693,65 @@ void __init omap2_set_globals_tap(u32 class, void __iomem *tap) | |||
658 | else | 693 | else |
659 | tap_prod_id = 0x0208; | 694 | tap_prod_id = 0x0208; |
660 | } | 695 | } |
696 | |||
697 | #ifdef CONFIG_SOC_BUS | ||
698 | |||
699 | static const char const *omap_types[] = { | ||
700 | [OMAP2_DEVICE_TYPE_TEST] = "TST", | ||
701 | [OMAP2_DEVICE_TYPE_EMU] = "EMU", | ||
702 | [OMAP2_DEVICE_TYPE_SEC] = "HS", | ||
703 | [OMAP2_DEVICE_TYPE_GP] = "GP", | ||
704 | [OMAP2_DEVICE_TYPE_BAD] = "BAD", | ||
705 | }; | ||
706 | |||
707 | static const char * __init omap_get_family(void) | ||
708 | { | ||
709 | if (cpu_is_omap24xx()) | ||
710 | return kasprintf(GFP_KERNEL, "OMAP2"); | ||
711 | else if (cpu_is_omap34xx()) | ||
712 | return kasprintf(GFP_KERNEL, "OMAP3"); | ||
713 | else if (cpu_is_omap44xx()) | ||
714 | return kasprintf(GFP_KERNEL, "OMAP4"); | ||
715 | else if (soc_is_omap54xx()) | ||
716 | return kasprintf(GFP_KERNEL, "OMAP5"); | ||
717 | else if (soc_is_dra7xx()) | ||
718 | return kasprintf(GFP_KERNEL, "DRA7"); | ||
719 | else | ||
720 | return kasprintf(GFP_KERNEL, "Unknown"); | ||
721 | } | ||
722 | |||
723 | static ssize_t omap_get_type(struct device *dev, | ||
724 | struct device_attribute *attr, | ||
725 | char *buf) | ||
726 | { | ||
727 | return sprintf(buf, "%s\n", omap_types[omap_type()]); | ||
728 | } | ||
729 | |||
730 | static struct device_attribute omap_soc_attr = | ||
731 | __ATTR(type, S_IRUGO, omap_get_type, NULL); | ||
732 | |||
733 | void __init omap_soc_device_init(void) | ||
734 | { | ||
735 | struct device *parent; | ||
736 | struct soc_device *soc_dev; | ||
737 | struct soc_device_attribute *soc_dev_attr; | ||
738 | |||
739 | soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); | ||
740 | if (!soc_dev_attr) | ||
741 | return; | ||
742 | |||
743 | soc_dev_attr->machine = soc_name; | ||
744 | soc_dev_attr->family = omap_get_family(); | ||
745 | soc_dev_attr->revision = soc_rev; | ||
746 | |||
747 | soc_dev = soc_device_register(soc_dev_attr); | ||
748 | if (IS_ERR_OR_NULL(soc_dev)) { | ||
749 | kfree(soc_dev_attr); | ||
750 | return; | ||
751 | } | ||
752 | |||
753 | parent = soc_device_to_device(soc_dev); | ||
754 | if (!IS_ERR_OR_NULL(parent)) | ||
755 | device_create_file(parent, &omap_soc_attr); | ||
756 | } | ||
757 | #endif /* CONFIG_SOC_BUS */ | ||
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c index 216f19694003..090aaa852404 100644 --- a/arch/arm/mach-omap2/io.c +++ b/arch/arm/mach-omap2/io.c | |||
@@ -451,6 +451,7 @@ void __init omap2430_init_late(void) | |||
451 | { | 451 | { |
452 | omap_mux_late_init(); | 452 | omap_mux_late_init(); |
453 | omap2_common_pm_late_init(); | 453 | omap2_common_pm_late_init(); |
454 | omap_soc_device_init(); | ||
454 | omap2_pm_init(); | 455 | omap2_pm_init(); |
455 | omap2_clk_enable_autoidle_all(); | 456 | omap2_clk_enable_autoidle_all(); |
456 | } | 457 | } |
@@ -524,6 +525,7 @@ void __init omap3_init_late(void) | |||
524 | { | 525 | { |
525 | omap_mux_late_init(); | 526 | omap_mux_late_init(); |
526 | omap2_common_pm_late_init(); | 527 | omap2_common_pm_late_init(); |
528 | omap_soc_device_init(); | ||
527 | omap3_pm_init(); | 529 | omap3_pm_init(); |
528 | omap2_clk_enable_autoidle_all(); | 530 | omap2_clk_enable_autoidle_all(); |
529 | } | 531 | } |
@@ -532,6 +534,7 @@ void __init omap3430_init_late(void) | |||
532 | { | 534 | { |
533 | omap_mux_late_init(); | 535 | omap_mux_late_init(); |
534 | omap2_common_pm_late_init(); | 536 | omap2_common_pm_late_init(); |
537 | omap_soc_device_init(); | ||
535 | omap3_pm_init(); | 538 | omap3_pm_init(); |
536 | omap2_clk_enable_autoidle_all(); | 539 | omap2_clk_enable_autoidle_all(); |
537 | } | 540 | } |
@@ -540,6 +543,7 @@ void __init omap35xx_init_late(void) | |||
540 | { | 543 | { |
541 | omap_mux_late_init(); | 544 | omap_mux_late_init(); |
542 | omap2_common_pm_late_init(); | 545 | omap2_common_pm_late_init(); |
546 | omap_soc_device_init(); | ||
543 | omap3_pm_init(); | 547 | omap3_pm_init(); |
544 | omap2_clk_enable_autoidle_all(); | 548 | omap2_clk_enable_autoidle_all(); |
545 | } | 549 | } |
@@ -548,6 +552,7 @@ void __init omap3630_init_late(void) | |||
548 | { | 552 | { |
549 | omap_mux_late_init(); | 553 | omap_mux_late_init(); |
550 | omap2_common_pm_late_init(); | 554 | omap2_common_pm_late_init(); |
555 | omap_soc_device_init(); | ||
551 | omap3_pm_init(); | 556 | omap3_pm_init(); |
552 | omap2_clk_enable_autoidle_all(); | 557 | omap2_clk_enable_autoidle_all(); |
553 | } | 558 | } |
@@ -556,6 +561,7 @@ void __init am35xx_init_late(void) | |||
556 | { | 561 | { |
557 | omap_mux_late_init(); | 562 | omap_mux_late_init(); |
558 | omap2_common_pm_late_init(); | 563 | omap2_common_pm_late_init(); |
564 | omap_soc_device_init(); | ||
559 | omap3_pm_init(); | 565 | omap3_pm_init(); |
560 | omap2_clk_enable_autoidle_all(); | 566 | omap2_clk_enable_autoidle_all(); |
561 | } | 567 | } |
@@ -564,6 +570,7 @@ void __init ti81xx_init_late(void) | |||
564 | { | 570 | { |
565 | omap_mux_late_init(); | 571 | omap_mux_late_init(); |
566 | omap2_common_pm_late_init(); | 572 | omap2_common_pm_late_init(); |
573 | omap_soc_device_init(); | ||
567 | omap3_pm_init(); | 574 | omap3_pm_init(); |
568 | omap2_clk_enable_autoidle_all(); | 575 | omap2_clk_enable_autoidle_all(); |
569 | } | 576 | } |
@@ -592,6 +599,7 @@ void __init am33xx_init_late(void) | |||
592 | { | 599 | { |
593 | omap_mux_late_init(); | 600 | omap_mux_late_init(); |
594 | omap2_common_pm_late_init(); | 601 | omap2_common_pm_late_init(); |
602 | omap_soc_device_init(); | ||
595 | am33xx_pm_init(); | 603 | am33xx_pm_init(); |
596 | } | 604 | } |
597 | #endif | 605 | #endif |
@@ -624,6 +632,7 @@ void __init omap4430_init_late(void) | |||
624 | { | 632 | { |
625 | omap_mux_late_init(); | 633 | omap_mux_late_init(); |
626 | omap2_common_pm_late_init(); | 634 | omap2_common_pm_late_init(); |
635 | omap_soc_device_init(); | ||
627 | omap4_pm_init(); | 636 | omap4_pm_init(); |
628 | omap2_clk_enable_autoidle_all(); | 637 | omap2_clk_enable_autoidle_all(); |
629 | } | 638 | } |
@@ -657,6 +666,7 @@ void __init omap5_init_late(void) | |||
657 | { | 666 | { |
658 | omap_mux_late_init(); | 667 | omap_mux_late_init(); |
659 | omap2_common_pm_late_init(); | 668 | omap2_common_pm_late_init(); |
669 | omap_soc_device_init(); | ||
660 | omap4_pm_init(); | 670 | omap4_pm_init(); |
661 | omap2_clk_enable_autoidle_all(); | 671 | omap2_clk_enable_autoidle_all(); |
662 | } | 672 | } |
@@ -687,6 +697,7 @@ void __init dra7xx_init_early(void) | |||
687 | void __init dra7xx_init_late(void) | 697 | void __init dra7xx_init_late(void) |
688 | { | 698 | { |
689 | omap2_common_pm_late_init(); | 699 | omap2_common_pm_late_init(); |
700 | omap_soc_device_init(); | ||
690 | omap4_pm_init(); | 701 | omap4_pm_init(); |
691 | omap2_clk_enable_autoidle_all(); | 702 | omap2_clk_enable_autoidle_all(); |
692 | } | 703 | } |
diff --git a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c index c9143562ba65..2e2b2c25129d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_44xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_44xx_data.c | |||
@@ -660,7 +660,6 @@ static struct omap_hwmod omap44xx_dsp_hwmod = { | |||
660 | .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, | 660 | .clkctrl_offs = OMAP4_CM_TESLA_TESLA_CLKCTRL_OFFSET, |
661 | .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, | 661 | .rstctrl_offs = OMAP4_RM_TESLA_RSTCTRL_OFFSET, |
662 | .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, | 662 | .context_offs = OMAP4_RM_TESLA_TESLA_CONTEXT_OFFSET, |
663 | .modulemode = MODULEMODE_HWCTRL, | ||
664 | }, | 663 | }, |
665 | }, | 664 | }, |
666 | }; | 665 | }; |
@@ -1686,7 +1685,6 @@ static struct omap_hwmod omap44xx_ipu_hwmod = { | |||
1686 | .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, | 1685 | .clkctrl_offs = OMAP4_CM_DUCATI_DUCATI_CLKCTRL_OFFSET, |
1687 | .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, | 1686 | .rstctrl_offs = OMAP4_RM_DUCATI_RSTCTRL_OFFSET, |
1688 | .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, | 1687 | .context_offs = OMAP4_RM_DUCATI_DUCATI_CONTEXT_OFFSET, |
1689 | .modulemode = MODULEMODE_HWCTRL, | ||
1690 | }, | 1688 | }, |
1691 | }, | 1689 | }, |
1692 | }; | 1690 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c index e72d91183ab4..81e577137e1e 100644 --- a/arch/arm/mach-omap2/omap_hwmod_54xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_54xx_data.c | |||
@@ -631,7 +631,6 @@ static struct omap_hwmod omap54xx_dsp_hwmod = { | |||
631 | .clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET, | 631 | .clkctrl_offs = OMAP54XX_CM_DSP_DSP_CLKCTRL_OFFSET, |
632 | .rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET, | 632 | .rstctrl_offs = OMAP54XX_RM_DSP_RSTCTRL_OFFSET, |
633 | .context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET, | 633 | .context_offs = OMAP54XX_RM_DSP_DSP_CONTEXT_OFFSET, |
634 | .modulemode = MODULEMODE_HWCTRL, | ||
635 | }, | 634 | }, |
636 | }, | 635 | }, |
637 | }; | 636 | }; |
@@ -1727,7 +1726,6 @@ static struct omap_hwmod omap54xx_ipu_hwmod = { | |||
1727 | .clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET, | 1726 | .clkctrl_offs = OMAP54XX_CM_IPU_IPU_CLKCTRL_OFFSET, |
1728 | .rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET, | 1727 | .rstctrl_offs = OMAP54XX_RM_IPU_RSTCTRL_OFFSET, |
1729 | .context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET, | 1728 | .context_offs = OMAP54XX_RM_IPU_IPU_CONTEXT_OFFSET, |
1730 | .modulemode = MODULEMODE_HWCTRL, | ||
1731 | }, | 1729 | }, |
1732 | }, | 1730 | }, |
1733 | }; | 1731 | }; |
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c index 7096bc248569..d56c7b6a2f6d 100644 --- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c | |||
@@ -580,7 +580,6 @@ static struct omap_hwmod dra7xx_dsp1_hwmod = { | |||
580 | .clkctrl_offs = DRA7XX_CM_DSP1_DSP1_CLKCTRL_OFFSET, | 580 | .clkctrl_offs = DRA7XX_CM_DSP1_DSP1_CLKCTRL_OFFSET, |
581 | .rstctrl_offs = DRA7XX_RM_DSP1_RSTCTRL_OFFSET, | 581 | .rstctrl_offs = DRA7XX_RM_DSP1_RSTCTRL_OFFSET, |
582 | .context_offs = DRA7XX_RM_DSP1_DSP1_CONTEXT_OFFSET, | 582 | .context_offs = DRA7XX_RM_DSP1_DSP1_CONTEXT_OFFSET, |
583 | .modulemode = MODULEMODE_HWCTRL, | ||
584 | }, | 583 | }, |
585 | }, | 584 | }, |
586 | }; | 585 | }; |
@@ -598,7 +597,6 @@ static struct omap_hwmod dra7xx_dsp2_hwmod = { | |||
598 | .clkctrl_offs = DRA7XX_CM_DSP2_DSP2_CLKCTRL_OFFSET, | 597 | .clkctrl_offs = DRA7XX_CM_DSP2_DSP2_CLKCTRL_OFFSET, |
599 | .rstctrl_offs = DRA7XX_RM_DSP2_RSTCTRL_OFFSET, | 598 | .rstctrl_offs = DRA7XX_RM_DSP2_RSTCTRL_OFFSET, |
600 | .context_offs = DRA7XX_RM_DSP2_DSP2_CONTEXT_OFFSET, | 599 | .context_offs = DRA7XX_RM_DSP2_DSP2_CONTEXT_OFFSET, |
601 | .modulemode = MODULEMODE_HWCTRL, | ||
602 | }, | 600 | }, |
603 | }, | 601 | }, |
604 | }; | 602 | }; |
@@ -1458,7 +1456,6 @@ static struct omap_hwmod dra7xx_ipu1_hwmod = { | |||
1458 | .clkctrl_offs = DRA7XX_CM_IPU1_IPU1_CLKCTRL_OFFSET, | 1456 | .clkctrl_offs = DRA7XX_CM_IPU1_IPU1_CLKCTRL_OFFSET, |
1459 | .rstctrl_offs = DRA7XX_RM_IPU1_RSTCTRL_OFFSET, | 1457 | .rstctrl_offs = DRA7XX_RM_IPU1_RSTCTRL_OFFSET, |
1460 | .context_offs = DRA7XX_RM_IPU1_IPU1_CONTEXT_OFFSET, | 1458 | .context_offs = DRA7XX_RM_IPU1_IPU1_CONTEXT_OFFSET, |
1461 | .modulemode = MODULEMODE_HWCTRL, | ||
1462 | }, | 1459 | }, |
1463 | }, | 1460 | }, |
1464 | #if defined(CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU1) || \ | 1461 | #if defined(CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU1) || \ |
@@ -1480,7 +1477,6 @@ static struct omap_hwmod dra7xx_ipu2_hwmod = { | |||
1480 | .clkctrl_offs = DRA7XX_CM_IPU2_IPU2_CLKCTRL_OFFSET, | 1477 | .clkctrl_offs = DRA7XX_CM_IPU2_IPU2_CLKCTRL_OFFSET, |
1481 | .rstctrl_offs = DRA7XX_RM_IPU2_RSTCTRL_OFFSET, | 1478 | .rstctrl_offs = DRA7XX_RM_IPU2_RSTCTRL_OFFSET, |
1482 | .context_offs = DRA7XX_RM_IPU2_IPU2_CONTEXT_OFFSET, | 1479 | .context_offs = DRA7XX_RM_IPU2_IPU2_CONTEXT_OFFSET, |
1483 | .modulemode = MODULEMODE_HWCTRL, | ||
1484 | }, | 1480 | }, |
1485 | }, | 1481 | }, |
1486 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU2 | 1482 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU2 |
@@ -2118,8 +2114,8 @@ static struct omap_hwmod_irq_info dra7xx_mmc3_irqs[] = { | |||
2118 | }; | 2114 | }; |
2119 | 2115 | ||
2120 | static struct omap_hwmod_dma_info dra7xx_mmc3_sdma_reqs[] = { | 2116 | static struct omap_hwmod_dma_info dra7xx_mmc3_sdma_reqs[] = { |
2121 | { .name = "77", .dma_req = 76 + DRA7XX_DMA_REQ_START }, | 2117 | { .name = "tx", .dma_req = 76 + DRA7XX_DMA_REQ_START }, |
2122 | { .name = "78", .dma_req = 77 + DRA7XX_DMA_REQ_START }, | 2118 | { .name = "rx", .dma_req = 77 + DRA7XX_DMA_REQ_START }, |
2123 | { .dma_req = -1 } | 2119 | { .dma_req = -1 } |
2124 | }; | 2120 | }; |
2125 | 2121 | ||
diff --git a/arch/arm/mach-omap2/remoteproc.c b/arch/arm/mach-omap2/remoteproc.c index d56449ecfc02..3446249f9ab5 100644 --- a/arch/arm/mach-omap2/remoteproc.c +++ b/arch/arm/mach-omap2/remoteproc.c | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/err.h> | 19 | #include <linux/err.h> |
20 | #include <linux/remoteproc.h> | 20 | #include <linux/remoteproc.h> |
21 | #include <linux/interrupt.h> | ||
21 | #include <linux/dma-contiguous.h> | 22 | #include <linux/dma-contiguous.h> |
22 | #include <linux/dma-mapping.h> | 23 | #include <linux/dma-mapping.h> |
23 | #include <linux/of.h> | 24 | #include <linux/of.h> |
@@ -94,19 +95,38 @@ static void dra7_ctrl_write_dsp2_boot_addr(u32 bootaddr); | |||
94 | * identifying the timer as well as a matching logic to be used | 95 | * identifying the timer as well as a matching logic to be used |
95 | * to lookup the specific timer device node from the DT blob. | 96 | * to lookup the specific timer device node from the DT blob. |
96 | */ | 97 | */ |
97 | static struct omap_rproc_timers_info ipu_timers[] = { | 98 | static struct omap_rproc_timers_info omap4_ipu_timers[] = { |
98 | { .name = "timer3", .id = 3, }, | 99 | { .name = "timer3", .id = 3, }, |
100 | #ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG | ||
101 | { .name = "timer4", .id = 4, .is_wdt = 1, }, | ||
102 | { .name = "timer9", .id = 9, .is_wdt = 1, }, | ||
103 | #endif | ||
99 | }; | 104 | }; |
100 | 105 | ||
101 | static struct omap_rproc_timers_info dsp_timers[] = { | 106 | static struct omap_rproc_timers_info omap4_dsp_timers[] = { |
102 | { .name = "timer5", .id = 5, }, | 107 | { .name = "timer5", .id = 5, }, |
108 | #ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG | ||
109 | { .name = "timer6", .id = 6, .is_wdt = 1, }, | ||
110 | #endif | ||
111 | }; | ||
112 | |||
113 | static struct omap_rproc_timers_info dra7_ipu2_timers[] = { | ||
114 | { .name = "timer3", .id = 3, }, | ||
115 | #ifdef CONFIG_OMAP_REMOTEPROC_WATCHDOG | ||
116 | { .name = "timer4", .id = 4, .is_wdt = 1, }, | ||
117 | { .name = "timer9", .id = 9, .is_wdt = 1, }, | ||
118 | #endif | ||
119 | }; | ||
120 | |||
121 | static struct omap_rproc_timers_info dra7_dsp1_timers[] = { | ||
122 | { .name = "timer5", .id = 5}, | ||
103 | }; | 123 | }; |
104 | 124 | ||
105 | static struct omap_rproc_timers_info ipu1_timers[] = { | 125 | static struct omap_rproc_timers_info dra7_ipu1_timers[] = { |
106 | { .name = "timer11", .id = 11, }, | 126 | { .name = "timer11", .id = 11, }, |
107 | }; | 127 | }; |
108 | 128 | ||
109 | static struct omap_rproc_timers_info dsp2_timers[] = { | 129 | static struct omap_rproc_timers_info dra7_dsp2_timers[] = { |
110 | { .name = "timer6", .id = 6, }, | 130 | { .name = "timer6", .id = 6, }, |
111 | }; | 131 | }; |
112 | 132 | ||
@@ -186,8 +206,8 @@ static struct omap_rproc_pdata omap4_rproc_data[] = { | |||
186 | .firmware = "tesla-dsp.xe64T", | 206 | .firmware = "tesla-dsp.xe64T", |
187 | .mbox_name = "mbox-dsp", | 207 | .mbox_name = "mbox-dsp", |
188 | .oh_name = "dsp", | 208 | .oh_name = "dsp", |
189 | .timers = dsp_timers, | 209 | .timers = omap4_dsp_timers, |
190 | .timers_cnt = ARRAY_SIZE(dsp_timers), | 210 | .timers_cnt = ARRAY_SIZE(omap4_dsp_timers), |
191 | .set_bootaddr = omap_ctrl_write_dsp_boot_addr, | 211 | .set_bootaddr = omap_ctrl_write_dsp_boot_addr, |
192 | }, | 212 | }, |
193 | { | 213 | { |
@@ -195,8 +215,8 @@ static struct omap_rproc_pdata omap4_rproc_data[] = { | |||
195 | .firmware = "ducati-m3-core0.xem3", | 215 | .firmware = "ducati-m3-core0.xem3", |
196 | .mbox_name = "mbox-ipu", | 216 | .mbox_name = "mbox-ipu", |
197 | .oh_name = "ipu", | 217 | .oh_name = "ipu", |
198 | .timers = ipu_timers, | 218 | .timers = omap4_ipu_timers, |
199 | .timers_cnt = ARRAY_SIZE(ipu_timers), | 219 | .timers_cnt = ARRAY_SIZE(omap4_ipu_timers), |
200 | }, | 220 | }, |
201 | }; | 221 | }; |
202 | 222 | ||
@@ -206,8 +226,8 @@ static struct omap_rproc_pdata dra7_rproc_data[] = { | |||
206 | .firmware = "dra7-dsp1-fw.xe66", | 226 | .firmware = "dra7-dsp1-fw.xe66", |
207 | .mbox_name = "mbox-dsp1", | 227 | .mbox_name = "mbox-dsp1", |
208 | .oh_name = "dsp1", | 228 | .oh_name = "dsp1", |
209 | .timers = dsp_timers, | 229 | .timers = dra7_dsp1_timers, |
210 | .timers_cnt = ARRAY_SIZE(dsp_timers), | 230 | .timers_cnt = ARRAY_SIZE(dra7_dsp1_timers), |
211 | .set_bootaddr = dra7_ctrl_write_dsp1_boot_addr, | 231 | .set_bootaddr = dra7_ctrl_write_dsp1_boot_addr, |
212 | .carveouts = dsp1_carveouts, | 232 | .carveouts = dsp1_carveouts, |
213 | .carveouts_cnt = ARRAY_SIZE(dsp1_carveouts), | 233 | .carveouts_cnt = ARRAY_SIZE(dsp1_carveouts), |
@@ -217,10 +237,10 @@ static struct omap_rproc_pdata dra7_rproc_data[] = { | |||
217 | .firmware = "dra7-ipu2-fw.xem4", | 237 | .firmware = "dra7-ipu2-fw.xem4", |
218 | .mbox_name = "mbox-ipu2", | 238 | .mbox_name = "mbox-ipu2", |
219 | .oh_name = "ipu2", | 239 | .oh_name = "ipu2", |
220 | .timers = ipu_timers, | 240 | .timers = dra7_ipu2_timers, |
221 | .timers_cnt = ARRAY_SIZE(ipu_timers), | 241 | .timers_cnt = ARRAY_SIZE(dra7_ipu2_timers), |
222 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU2 | 242 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU2 |
223 | .late_attach = 1, | 243 | .late_attach = 1, |
224 | #endif | 244 | #endif |
225 | }, | 245 | }, |
226 | { | 246 | { |
@@ -228,8 +248,8 @@ static struct omap_rproc_pdata dra7_rproc_data[] = { | |||
228 | .firmware = "dra7-dsp2-fw.xe66", | 248 | .firmware = "dra7-dsp2-fw.xe66", |
229 | .mbox_name = "mbox-dsp2", | 249 | .mbox_name = "mbox-dsp2", |
230 | .oh_name = "dsp2", | 250 | .oh_name = "dsp2", |
231 | .timers = dsp2_timers, | 251 | .timers = dra7_dsp2_timers, |
232 | .timers_cnt = ARRAY_SIZE(dsp2_timers), | 252 | .timers_cnt = ARRAY_SIZE(dra7_dsp2_timers), |
233 | .set_bootaddr = dra7_ctrl_write_dsp2_boot_addr, | 253 | .set_bootaddr = dra7_ctrl_write_dsp2_boot_addr, |
234 | .carveouts = dsp2_carveouts, | 254 | .carveouts = dsp2_carveouts, |
235 | .carveouts_cnt = ARRAY_SIZE(dsp2_carveouts), | 255 | .carveouts_cnt = ARRAY_SIZE(dsp2_carveouts), |
@@ -239,10 +259,10 @@ static struct omap_rproc_pdata dra7_rproc_data[] = { | |||
239 | .firmware = "dra7-ipu1-fw.xem4", | 259 | .firmware = "dra7-ipu1-fw.xem4", |
240 | .mbox_name = "mbox-ipu1", | 260 | .mbox_name = "mbox-ipu1", |
241 | .oh_name = "ipu1", | 261 | .oh_name = "ipu1", |
242 | .timers = ipu1_timers, | 262 | .timers = dra7_ipu1_timers, |
243 | .timers_cnt = ARRAY_SIZE(ipu1_timers), | 263 | .timers_cnt = ARRAY_SIZE(dra7_ipu1_timers), |
244 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU1 | 264 | #ifdef CONFIG_OMAP_REMOTEPROC_LATE_ATTACH_IPU1 |
245 | .late_attach = 1, | 265 | .late_attach = 1, |
246 | #endif | 266 | #endif |
247 | }, | 267 | }, |
248 | }; | 268 | }; |
@@ -500,6 +520,62 @@ out: | |||
500 | } | 520 | } |
501 | 521 | ||
502 | /** | 522 | /** |
523 | * omap_rproc_watchdog_isr - Watchdog ISR handler for remoteproc device | ||
524 | * @irq: IRQ number associated with a watchdog timer | ||
525 | * @data: IRQ handler data | ||
526 | * | ||
527 | * This ISR routine executes the required necessary low-level code to | ||
528 | * acknowledge a watchdog timer interrupt. There can be multiple watchdog | ||
529 | * timers associated with a rproc (like IPUs which have 2 watchdog timers, | ||
530 | * one per Cortex M3/M4 core), so a lookup has to be performed to identify | ||
531 | * the timer to acknowledge its interrupt. | ||
532 | * | ||
533 | * The function also invokes a report watchdog ops, plugged in by the OMAP | ||
534 | * remoteproc driver code to be able to report this watchdog error to trigger | ||
535 | * a recovery. Ideally, this ISR should be present with the OMAP remoteproc | ||
536 | * driver code, but is implemented here because of the dependencies against | ||
537 | * the omap_dmtimer API which can only be invoked through some platform data | ||
538 | * functions ops. | ||
539 | * | ||
540 | * Return: IRQ_HANDLED or IRQ_NONE | ||
541 | */ | ||
542 | static irqreturn_t omap_rproc_watchdog_isr(int irq, void *data) | ||
543 | { | ||
544 | struct platform_device *pdev = data; | ||
545 | struct rproc *rproc = platform_get_drvdata(pdev); | ||
546 | struct device *dev = &pdev->dev; | ||
547 | struct omap_rproc_pdata *pdata = dev->platform_data; | ||
548 | struct omap_rproc_timers_info *timers = pdata->timers; | ||
549 | struct omap_dm_timer *timer = NULL; | ||
550 | int i; | ||
551 | |||
552 | for (i = 0; i < pdata->timers_cnt; i++) { | ||
553 | if (irq == omap_dm_timer_get_irq(timers[i].odt)) { | ||
554 | timer = timers[i].odt; | ||
555 | break; | ||
556 | } | ||
557 | } | ||
558 | |||
559 | if (!timer) { | ||
560 | dev_err(dev, "invalid timer\n"); | ||
561 | return IRQ_NONE; | ||
562 | } | ||
563 | omap_dm_timer_write_status(timer, OMAP_TIMER_INT_OVERFLOW); | ||
564 | |||
565 | /* | ||
566 | * rproc_report_crash needs to be invoked to recover a triggery, but | ||
567 | * since remoteproc core can be built as a module, use a platform | ||
568 | * data ops to break the dependency. This usage is non-standard, but | ||
569 | * given the dependencies, is the best possible solution to minimize | ||
570 | * adding more code. | ||
571 | */ | ||
572 | if (pdata->report_watchdog) | ||
573 | pdata->report_watchdog(rproc, RPROC_WATCHDOG); | ||
574 | |||
575 | return IRQ_HANDLED; | ||
576 | } | ||
577 | |||
578 | /** | ||
503 | * of_dev_timer_lookup - look up needed timer node from dt blob | 579 | * of_dev_timer_lookup - look up needed timer node from dt blob |
504 | * @np: parent device_node of all the searchable nodes | 580 | * @np: parent device_node of all the searchable nodes |
505 | * @hwmod_name: hwmod name of the desired timer | 581 | * @hwmod_name: hwmod name of the desired timer |
@@ -589,6 +665,21 @@ check_timer: | |||
589 | goto free_timers; | 665 | goto free_timers; |
590 | } | 666 | } |
591 | omap_dm_timer_set_source(timers[i].odt, OMAP_TIMER_SRC_SYS_CLK); | 667 | omap_dm_timer_set_source(timers[i].odt, OMAP_TIMER_SRC_SYS_CLK); |
668 | |||
669 | if (timers[i].is_wdt) { | ||
670 | ret = request_irq(omap_dm_timer_get_irq(timers[i].odt), | ||
671 | omap_rproc_watchdog_isr, IRQF_SHARED, | ||
672 | "rproc-wdt", pdev); | ||
673 | if (ret) { | ||
674 | dev_err(&pdev->dev, "error requesting irq for timer %s\n", | ||
675 | timers[i].name); | ||
676 | omap_dm_timer_free(timers[i].odt); | ||
677 | timers[i].odt = NULL; | ||
678 | goto free_timers; | ||
679 | } | ||
680 | /* clean counter, remoteproc code will set the value */ | ||
681 | omap_dm_timer_set_load(timers[i].odt, 0, 0); | ||
682 | } | ||
592 | } | 683 | } |
593 | 684 | ||
594 | start_timers: | 685 | start_timers: |
@@ -598,6 +689,9 @@ start_timers: | |||
598 | 689 | ||
599 | free_timers: | 690 | free_timers: |
600 | while (i--) { | 691 | while (i--) { |
692 | if (timers[i].is_wdt) | ||
693 | free_irq(omap_dm_timer_get_irq(timers[i].odt), pdev); | ||
694 | |||
601 | omap_dm_timer_free(timers[i].odt); | 695 | omap_dm_timer_free(timers[i].odt); |
602 | timers[i].odt = NULL; | 696 | timers[i].odt = NULL; |
603 | } | 697 | } |
@@ -625,6 +719,10 @@ static int omap_rproc_disable_timers(struct platform_device *pdev, | |||
625 | for (i = 0; i < pdata->timers_cnt; i++) { | 719 | for (i = 0; i < pdata->timers_cnt; i++) { |
626 | omap_dm_timer_stop(timers[i].odt); | 720 | omap_dm_timer_stop(timers[i].odt); |
627 | if (configure) { | 721 | if (configure) { |
722 | if (timers[i].is_wdt) { | ||
723 | free_irq(omap_dm_timer_get_irq(timers[i].odt), | ||
724 | pdev); | ||
725 | } | ||
628 | omap_dm_timer_free(timers[i].odt); | 726 | omap_dm_timer_free(timers[i].odt); |
629 | timers[i].odt = NULL; | 727 | timers[i].odt = NULL; |
630 | } | 728 | } |
diff --git a/arch/arm/mach-omap2/soc.h b/arch/arm/mach-omap2/soc.h index 98181124c7f7..cbd86d1e7556 100644 --- a/arch/arm/mach-omap2/soc.h +++ b/arch/arm/mach-omap2/soc.h | |||
@@ -460,6 +460,7 @@ IS_OMAP_TYPE(3430, 0x3430) | |||
460 | #define DRA7XX_CLASS 0x07000007 | 460 | #define DRA7XX_CLASS 0x07000007 |
461 | #define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) | 461 | #define DRA752_REV_ES1_0 (DRA7XX_CLASS | (0x52 << 16) | (0x10 << 8)) |
462 | #define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) | 462 | #define DRA752_REV_ES1_1 (DRA7XX_CLASS | (0x52 << 16) | (0x11 << 8)) |
463 | #define DRA722_REV_ES1_0 (DRA7XX_CLASS | (0x22 << 16) | (0x10 << 8)) | ||
463 | 464 | ||
464 | void omap2xxx_check_revision(void); | 465 | void omap2xxx_check_revision(void); |
465 | void omap3xxx_check_revision(void); | 466 | void omap3xxx_check_revision(void); |
diff --git a/arch/arm/plat-omap/android-display.c b/arch/arm/plat-omap/android-display.c index 815ba4b32176..076b2736ec1b 100644 --- a/arch/arm/plat-omap/android-display.c +++ b/arch/arm/plat-omap/android-display.c | |||
@@ -169,10 +169,6 @@ void omap_android_display_setup(struct omap_dss_board_info *dss, | |||
169 | num_configs = sgx->num_configs; | 169 | num_configs = sgx->num_configs; |
170 | 170 | ||
171 | for (i = 0; i < num_configs; ++i) { | 171 | for (i = 0; i < num_configs; ++i) { |
172 | if (!sgx || !sgx->configs) | ||
173 | p_sgx_config = sgx_omaplfb_get(i); | ||
174 | else | ||
175 | p_sgx_config = &(sgx->configs[i]); | ||
176 | 172 | ||
177 | struct omap_android_display_data mem = { | 173 | struct omap_android_display_data mem = { |
178 | .bpp = 4, | 174 | .bpp = 4, |
@@ -180,6 +176,11 @@ void omap_android_display_setup(struct omap_dss_board_info *dss, | |||
180 | .height = 720, | 176 | .height = 720, |
181 | }; | 177 | }; |
182 | 178 | ||
179 | if (!sgx || !sgx->configs) | ||
180 | p_sgx_config = sgx_omaplfb_get(i); | ||
181 | else | ||
182 | p_sgx_config = &(sgx->configs[i]); | ||
183 | |||
183 | if (i == 0 && i < dss->num_devices) | 184 | if (i == 0 && i < dss->num_devices) |
184 | get_display_size(dss->devices[i], &mem); | 185 | get_display_size(dss->devices[i], &mem); |
185 | 186 | ||
diff --git a/drivers/gpio/gpio-pcf857x.c b/drivers/gpio/gpio-pcf857x.c index 49cceed07177..e5731cb7d984 100644 --- a/drivers/gpio/gpio-pcf857x.c +++ b/drivers/gpio/gpio-pcf857x.c | |||
@@ -134,7 +134,7 @@ static int pcf857x_get(struct gpio_chip *chip, unsigned offset) | |||
134 | int value; | 134 | int value; |
135 | 135 | ||
136 | value = gpio->read(gpio->client); | 136 | value = gpio->read(gpio->client); |
137 | return (value < 0) ? 0 : (value & (1 << offset)); | 137 | return (value > 0) ? (value & (1 << offset)) : value; |
138 | } | 138 | } |
139 | 139 | ||
140 | static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) | 140 | static int pcf857x_output(struct gpio_chip *chip, unsigned offset, int value) |
@@ -178,23 +178,28 @@ static void pcf857x_irq_demux_work(struct work_struct *work) | |||
178 | struct pcf857x *gpio = container_of(work, | 178 | struct pcf857x *gpio = container_of(work, |
179 | struct pcf857x, | 179 | struct pcf857x, |
180 | work); | 180 | work); |
181 | unsigned long change, i, status, flags; | 181 | unsigned long change, i, flags; |
182 | int status; | ||
182 | 183 | ||
183 | status = gpio->read(gpio->client); | 184 | status = gpio->read(gpio->client); |
184 | 185 | ||
185 | spin_lock_irqsave(&gpio->slock, flags); | 186 | if (status >= 0) { |
187 | spin_lock_irqsave(&gpio->slock, flags); | ||
186 | 188 | ||
187 | /* | 189 | /* |
188 | * call the interrupt handler iff gpio is used as | 190 | * call the interrupt handler iff gpio is used as |
189 | * interrupt source, just to avoid bad irqs | 191 | * interrupt source, just to avoid bad irqs |
190 | */ | 192 | */ |
191 | 193 | ||
192 | change = ((gpio->status ^ status) & gpio->irq_mapped); | 194 | change = ((gpio->status ^ status) & gpio->irq_mapped); |
193 | for_each_set_bit(i, &change, gpio->chip.ngpio) | 195 | for_each_set_bit(i, &change, gpio->chip.ngpio) |
194 | generic_handle_irq(irq_find_mapping(gpio->irq_domain, i)); | 196 | generic_handle_irq( |
195 | gpio->status = status; | 197 | irq_find_mapping(gpio->irq_domain, i)); |
198 | gpio->status = status; | ||
196 | 199 | ||
197 | spin_unlock_irqrestore(&gpio->slock, flags); | 200 | spin_unlock_irqrestore(&gpio->slock, flags); |
201 | } else | ||
202 | pr_err("failed to read gpio status %x\n", status); | ||
198 | } | 203 | } |
199 | 204 | ||
200 | static irqreturn_t pcf857x_irq_demux(int irq, void *data) | 205 | static irqreturn_t pcf857x_irq_demux(int irq, void *data) |
diff --git a/drivers/gpu/ion/ion.c b/drivers/gpu/ion/ion.c index d7c780ff35b4..0d25b7259aaa 100644 --- a/drivers/gpu/ion/ion.c +++ b/drivers/gpu/ion/ion.c | |||
@@ -520,7 +520,7 @@ static int ion_debug_client_show(struct seq_file *s, void *unused) | |||
520 | struct ion_client *client = s->private; | 520 | struct ion_client *client = s->private; |
521 | struct rb_node *n; | 521 | struct rb_node *n; |
522 | size_t sizes[ION_NUM_HEAP_IDS] = {0}; | 522 | size_t sizes[ION_NUM_HEAP_IDS] = {0}; |
523 | const char *names[ION_NUM_HEAP_IDS] = {0}; | 523 | const char *names[ION_NUM_HEAP_IDS] = {NULL}; |
524 | int i; | 524 | int i; |
525 | 525 | ||
526 | mutex_lock(&client->lock); | 526 | mutex_lock(&client->lock); |
@@ -726,7 +726,7 @@ static void ion_buffer_sync_for_device(struct ion_buffer *buffer, | |||
726 | mutex_unlock(&buffer->lock); | 726 | mutex_unlock(&buffer->lock); |
727 | } | 727 | } |
728 | 728 | ||
729 | int ion_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) | 729 | static int ion_vm_fault(struct vm_area_struct *vma, struct vm_fault *vmf) |
730 | { | 730 | { |
731 | struct ion_buffer *buffer = vma->vm_private_data; | 731 | struct ion_buffer *buffer = vma->vm_private_data; |
732 | struct scatterlist *sg; | 732 | struct scatterlist *sg; |
@@ -780,7 +780,7 @@ static void ion_vm_close(struct vm_area_struct *vma) | |||
780 | mutex_unlock(&buffer->lock); | 780 | mutex_unlock(&buffer->lock); |
781 | } | 781 | } |
782 | 782 | ||
783 | struct vm_operations_struct ion_vma_ops = { | 783 | static struct vm_operations_struct ion_vma_ops = { |
784 | .open = ion_vm_open, | 784 | .open = ion_vm_open, |
785 | .close = ion_vm_close, | 785 | .close = ion_vm_close, |
786 | .fault = ion_vm_fault, | 786 | .fault = ion_vm_fault, |
@@ -871,7 +871,7 @@ static void ion_dma_buf_end_cpu_access(struct dma_buf *dmabuf, size_t start, | |||
871 | mutex_unlock(&buffer->lock); | 871 | mutex_unlock(&buffer->lock); |
872 | } | 872 | } |
873 | 873 | ||
874 | struct dma_buf_ops dma_buf_ops = { | 874 | static struct dma_buf_ops dma_buf_ops = { |
875 | .map_dma_buf = ion_map_dma_buf, | 875 | .map_dma_buf = ion_map_dma_buf, |
876 | .unmap_dma_buf = ion_unmap_dma_buf, | 876 | .unmap_dma_buf = ion_unmap_dma_buf, |
877 | .mmap = ion_mmap, | 877 | .mmap = ion_mmap, |
diff --git a/drivers/gpu/ion/ion_carveout_heap.c b/drivers/gpu/ion/ion_carveout_heap.c index ce8d311968f6..473e9ba7c569 100644 --- a/drivers/gpu/ion/ion_carveout_heap.c +++ b/drivers/gpu/ion/ion_carveout_heap.c | |||
@@ -84,7 +84,7 @@ static void ion_carveout_heap_free(struct ion_buffer *buffer) | |||
84 | buffer->priv_phys = ION_CARVEOUT_ALLOCATE_FAIL; | 84 | buffer->priv_phys = ION_CARVEOUT_ALLOCATE_FAIL; |
85 | } | 85 | } |
86 | 86 | ||
87 | struct sg_table *ion_carveout_heap_map_dma(struct ion_heap *heap, | 87 | static struct sg_table *ion_carveout_heap_map_dma(struct ion_heap *heap, |
88 | struct ion_buffer *buffer) | 88 | struct ion_buffer *buffer) |
89 | { | 89 | { |
90 | struct sg_table *table; | 90 | struct sg_table *table; |
@@ -103,13 +103,13 @@ struct sg_table *ion_carveout_heap_map_dma(struct ion_heap *heap, | |||
103 | return table; | 103 | return table; |
104 | } | 104 | } |
105 | 105 | ||
106 | void ion_carveout_heap_unmap_dma(struct ion_heap *heap, | 106 | static void ion_carveout_heap_unmap_dma(struct ion_heap *heap, |
107 | struct ion_buffer *buffer) | 107 | struct ion_buffer *buffer) |
108 | { | 108 | { |
109 | sg_free_table(buffer->sg_table); | 109 | sg_free_table(buffer->sg_table); |
110 | } | 110 | } |
111 | 111 | ||
112 | void *ion_carveout_heap_map_kernel(struct ion_heap *heap, | 112 | static void *ion_carveout_heap_map_kernel(struct ion_heap *heap, |
113 | struct ion_buffer *buffer) | 113 | struct ion_buffer *buffer) |
114 | { | 114 | { |
115 | int mtype = MT_MEMORY_NONCACHED; | 115 | int mtype = MT_MEMORY_NONCACHED; |
@@ -121,7 +121,7 @@ void *ion_carveout_heap_map_kernel(struct ion_heap *heap, | |||
121 | mtype); | 121 | mtype); |
122 | } | 122 | } |
123 | 123 | ||
124 | void ion_carveout_heap_unmap_kernel(struct ion_heap *heap, | 124 | static void ion_carveout_heap_unmap_kernel(struct ion_heap *heap, |
125 | struct ion_buffer *buffer) | 125 | struct ion_buffer *buffer) |
126 | { | 126 | { |
127 | __arm_iounmap(buffer->vaddr); | 127 | __arm_iounmap(buffer->vaddr); |
@@ -129,8 +129,9 @@ void ion_carveout_heap_unmap_kernel(struct ion_heap *heap, | |||
129 | return; | 129 | return; |
130 | } | 130 | } |
131 | 131 | ||
132 | int ion_carveout_heap_map_user(struct ion_heap *heap, struct ion_buffer *buffer, | 132 | static int ion_carveout_heap_map_user(struct ion_heap *heap, |
133 | struct vm_area_struct *vma) | 133 | struct ion_buffer *buffer, |
134 | struct vm_area_struct *vma) | ||
134 | { | 135 | { |
135 | return remap_pfn_range(vma, vma->vm_start, | 136 | return remap_pfn_range(vma, vma->vm_start, |
136 | __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff, | 137 | __phys_to_pfn(buffer->priv_phys) + vma->vm_pgoff, |
diff --git a/drivers/gpu/ion/ion_chunk_heap.c b/drivers/gpu/ion/ion_chunk_heap.c index 3e77de59223c..b2dce96717e9 100644 --- a/drivers/gpu/ion/ion_chunk_heap.c +++ b/drivers/gpu/ion/ion_chunk_heap.c | |||
@@ -116,13 +116,13 @@ static void ion_chunk_heap_free(struct ion_buffer *buffer) | |||
116 | kfree(table); | 116 | kfree(table); |
117 | } | 117 | } |
118 | 118 | ||
119 | struct sg_table *ion_chunk_heap_map_dma(struct ion_heap *heap, | 119 | static struct sg_table *ion_chunk_heap_map_dma(struct ion_heap *heap, |
120 | struct ion_buffer *buffer) | 120 | struct ion_buffer *buffer) |
121 | { | 121 | { |
122 | return buffer->priv_virt; | 122 | return buffer->priv_virt; |
123 | } | 123 | } |
124 | 124 | ||
125 | void ion_chunk_heap_unmap_dma(struct ion_heap *heap, | 125 | static void ion_chunk_heap_unmap_dma(struct ion_heap *heap, |
126 | struct ion_buffer *buffer) | 126 | struct ion_buffer *buffer) |
127 | { | 127 | { |
128 | return; | 128 | return; |
@@ -162,7 +162,7 @@ struct ion_heap *ion_chunk_heap_create(struct ion_platform_heap *heap_data) | |||
162 | gen_pool_add(chunk_heap->pool, chunk_heap->base, heap_data->size, -1); | 162 | gen_pool_add(chunk_heap->pool, chunk_heap->base, heap_data->size, -1); |
163 | chunk_heap->heap.ops = &chunk_heap_ops; | 163 | chunk_heap->heap.ops = &chunk_heap_ops; |
164 | chunk_heap->heap.type = ION_HEAP_TYPE_CHUNK; | 164 | chunk_heap->heap.type = ION_HEAP_TYPE_CHUNK; |
165 | pr_info("%s: base %lu size %ld align %ld\n", __func__, chunk_heap->base, | 165 | pr_info("%s: base %lu size %u align %ld\n", __func__, chunk_heap->base, |
166 | heap_data->size, heap_data->align); | 166 | heap_data->size, heap_data->align); |
167 | 167 | ||
168 | return &chunk_heap->heap; | 168 | return &chunk_heap->heap; |
diff --git a/drivers/gpu/ion/ion_heap.c b/drivers/gpu/ion/ion_heap.c index 225ef94655db..c7e36d179146 100644 --- a/drivers/gpu/ion/ion_heap.c +++ b/drivers/gpu/ion/ion_heap.c | |||
@@ -34,7 +34,7 @@ void *ion_heap_map_kernel(struct ion_heap *heap, | |||
34 | struct page **tmp = pages; | 34 | struct page **tmp = pages; |
35 | 35 | ||
36 | if (!pages) | 36 | if (!pages) |
37 | return 0; | 37 | return NULL; |
38 | 38 | ||
39 | if (buffer->flags & ION_FLAG_CACHED) | 39 | if (buffer->flags & ION_FLAG_CACHED) |
40 | pgprot = PAGE_KERNEL; | 40 | pgprot = PAGE_KERNEL; |
diff --git a/drivers/gpu/ion/ion_system_heap.c b/drivers/gpu/ion/ion_system_heap.c index a9d809e55731..2177e51a8af6 100644 --- a/drivers/gpu/ion/ion_system_heap.c +++ b/drivers/gpu/ion/ion_system_heap.c | |||
@@ -26,12 +26,12 @@ | |||
26 | #include <linux/vmalloc.h> | 26 | #include <linux/vmalloc.h> |
27 | #include "ion_priv.h" | 27 | #include "ion_priv.h" |
28 | 28 | ||
29 | static unsigned int high_order_gfp_flags = (GFP_HIGHUSER | __GFP_ZERO | | 29 | static gfp_t high_order_gfp_flags = (GFP_HIGHUSER | __GFP_ZERO | |
30 | __GFP_NOWARN | __GFP_NORETRY) & | 30 | __GFP_NOWARN | __GFP_NORETRY) & |
31 | ~__GFP_WAIT; | 31 | ~__GFP_WAIT; |
32 | static unsigned int low_order_gfp_flags = (GFP_HIGHUSER | __GFP_ZERO | | 32 | static gfp_t low_order_gfp_flags = (GFP_HIGHUSER | __GFP_ZERO | |
33 | __GFP_NOWARN); | 33 | __GFP_NOWARN); |
34 | static const unsigned int orders[] = {8, 4, 0}; | 34 | static const unsigned int orders[] = {8, 4, 3, 2, 1, 0}; |
35 | static const int num_orders = ARRAY_SIZE(orders); | 35 | static const int num_orders = ARRAY_SIZE(orders); |
36 | static int order_to_index(unsigned int order) | 36 | static int order_to_index(unsigned int order) |
37 | { | 37 | { |
@@ -77,13 +77,13 @@ static struct page *alloc_buffer_page(struct ion_system_heap *heap, | |||
77 | gfp_flags = high_order_gfp_flags; | 77 | gfp_flags = high_order_gfp_flags; |
78 | page = alloc_pages(gfp_flags, order); | 78 | page = alloc_pages(gfp_flags, order); |
79 | if (!page) | 79 | if (!page) |
80 | return 0; | 80 | return NULL; |
81 | arm_dma_ops.sync_single_for_device(NULL, | 81 | arm_dma_ops.sync_single_for_device(NULL, |
82 | pfn_to_dma(NULL, page_to_pfn(page)), | 82 | pfn_to_dma(NULL, page_to_pfn(page)), |
83 | PAGE_SIZE << order, DMA_BIDIRECTIONAL); | 83 | PAGE_SIZE << order, DMA_BIDIRECTIONAL); |
84 | } | 84 | } |
85 | if (!page) | 85 | if (!page) |
86 | return 0; | 86 | return NULL; |
87 | 87 | ||
88 | if (split_pages) | 88 | if (split_pages) |
89 | split_page(page, order); | 89 | split_page(page, order); |
@@ -208,7 +208,7 @@ err: | |||
208 | return -ENOMEM; | 208 | return -ENOMEM; |
209 | } | 209 | } |
210 | 210 | ||
211 | void ion_system_heap_free(struct ion_buffer *buffer) | 211 | static void ion_system_heap_free(struct ion_buffer *buffer) |
212 | { | 212 | { |
213 | struct ion_heap *heap = buffer->heap; | 213 | struct ion_heap *heap = buffer->heap; |
214 | struct ion_system_heap *sys_heap = container_of(heap, | 214 | struct ion_system_heap *sys_heap = container_of(heap, |
@@ -232,13 +232,13 @@ void ion_system_heap_free(struct ion_buffer *buffer) | |||
232 | kfree(table); | 232 | kfree(table); |
233 | } | 233 | } |
234 | 234 | ||
235 | struct sg_table *ion_system_heap_map_dma(struct ion_heap *heap, | 235 | static struct sg_table *ion_system_heap_map_dma(struct ion_heap *heap, |
236 | struct ion_buffer *buffer) | 236 | struct ion_buffer *buffer) |
237 | { | 237 | { |
238 | return buffer->priv_virt; | 238 | return buffer->priv_virt; |
239 | } | 239 | } |
240 | 240 | ||
241 | void ion_system_heap_unmap_dma(struct ion_heap *heap, | 241 | static void ion_system_heap_unmap_dma(struct ion_heap *heap, |
242 | struct ion_buffer *buffer) | 242 | struct ion_buffer *buffer) |
243 | { | 243 | { |
244 | return; | 244 | return; |
@@ -336,7 +336,7 @@ static int ion_system_contig_heap_allocate(struct ion_heap *heap, | |||
336 | return 0; | 336 | return 0; |
337 | } | 337 | } |
338 | 338 | ||
339 | void ion_system_contig_heap_free(struct ion_buffer *buffer) | 339 | static void ion_system_contig_heap_free(struct ion_buffer *buffer) |
340 | { | 340 | { |
341 | kfree(buffer->priv_virt); | 341 | kfree(buffer->priv_virt); |
342 | } | 342 | } |
@@ -350,7 +350,7 @@ static int ion_system_contig_heap_phys(struct ion_heap *heap, | |||
350 | return 0; | 350 | return 0; |
351 | } | 351 | } |
352 | 352 | ||
353 | struct sg_table *ion_system_contig_heap_map_dma(struct ion_heap *heap, | 353 | static struct sg_table *ion_system_contig_heap_map_dma(struct ion_heap *heap, |
354 | struct ion_buffer *buffer) | 354 | struct ion_buffer *buffer) |
355 | { | 355 | { |
356 | struct sg_table *table; | 356 | struct sg_table *table; |
@@ -369,14 +369,14 @@ struct sg_table *ion_system_contig_heap_map_dma(struct ion_heap *heap, | |||
369 | return table; | 369 | return table; |
370 | } | 370 | } |
371 | 371 | ||
372 | void ion_system_contig_heap_unmap_dma(struct ion_heap *heap, | 372 | static void ion_system_contig_heap_unmap_dma(struct ion_heap *heap, |
373 | struct ion_buffer *buffer) | 373 | struct ion_buffer *buffer) |
374 | { | 374 | { |
375 | sg_free_table(buffer->sg_table); | 375 | sg_free_table(buffer->sg_table); |
376 | kfree(buffer->sg_table); | 376 | kfree(buffer->sg_table); |
377 | } | 377 | } |
378 | 378 | ||
379 | int ion_system_contig_heap_map_user(struct ion_heap *heap, | 379 | static int ion_system_contig_heap_map_user(struct ion_heap *heap, |
380 | struct ion_buffer *buffer, | 380 | struct ion_buffer *buffer, |
381 | struct vm_area_struct *vma) | 381 | struct vm_area_struct *vma) |
382 | { | 382 | { |
diff --git a/drivers/gpu/ion/omap/omap_tiler_heap.c b/drivers/gpu/ion/omap/omap_tiler_heap.c index cbd16cf6c522..13408796c39c 100644 --- a/drivers/gpu/ion/omap/omap_tiler_heap.c +++ b/drivers/gpu/ion/omap/omap_tiler_heap.c | |||
@@ -378,7 +378,7 @@ static void sg_free(struct scatterlist *sg, unsigned int nents) | |||
378 | 378 | ||
379 | 379 | ||
380 | 380 | ||
381 | struct sg_table *omap_tiler_heap_map_dma(struct ion_heap *heap, | 381 | static struct sg_table *omap_tiler_heap_map_dma(struct ion_heap *heap, |
382 | struct ion_buffer *buffer) | 382 | struct ion_buffer *buffer) |
383 | { | 383 | { |
384 | int ret, i; | 384 | int ret, i; |
@@ -420,13 +420,13 @@ struct sg_table *omap_tiler_heap_map_dma(struct ion_heap *heap, | |||
420 | return table; | 420 | return table; |
421 | } | 421 | } |
422 | 422 | ||
423 | void omap_tiler_heap_unmap_dma(struct ion_heap *heap, | 423 | static void omap_tiler_heap_unmap_dma(struct ion_heap *heap, |
424 | struct ion_buffer *buffer) | 424 | struct ion_buffer *buffer) |
425 | { | 425 | { |
426 | __sg_free_table(buffer->sg_table, -1, sg_free); | 426 | __sg_free_table(buffer->sg_table, -1, sg_free); |
427 | } | 427 | } |
428 | 428 | ||
429 | void *ion_tiler_heap_map_kernel(struct ion_heap *heap, | 429 | static void *ion_tiler_heap_map_kernel(struct ion_heap *heap, |
430 | struct ion_buffer *buffer) | 430 | struct ion_buffer *buffer) |
431 | { | 431 | { |
432 | /* todo: Need to see how to implement this api. Seems like it is | 432 | /* todo: Need to see how to implement this api. Seems like it is |
@@ -435,7 +435,7 @@ void *ion_tiler_heap_map_kernel(struct ion_heap *heap, | |||
435 | return NULL; | 435 | return NULL; |
436 | } | 436 | } |
437 | 437 | ||
438 | void ion_tiler_heap_unmap_kernel(struct ion_heap *heap, | 438 | static void ion_tiler_heap_unmap_kernel(struct ion_heap *heap, |
439 | struct ion_buffer *buffer) | 439 | struct ion_buffer *buffer) |
440 | { | 440 | { |
441 | /* todo: Need to see how to implement this api. Seems like it is | 441 | /* todo: Need to see how to implement this api. Seems like it is |
diff --git a/drivers/media/i2c/ov1063x.c b/drivers/media/i2c/ov1063x.c index 8fb028520764..dc527562526b 100644 --- a/drivers/media/i2c/ov1063x.c +++ b/drivers/media/i2c/ov1063x.c | |||
@@ -106,13 +106,14 @@ struct ov1063x_priv { | |||
106 | int cam_fpd_mux_s0_gpio; | 106 | int cam_fpd_mux_s0_gpio; |
107 | int vin2_s0_gpio; | 107 | int vin2_s0_gpio; |
108 | int ov_pwdn_gpio; | 108 | int ov_pwdn_gpio; |
109 | int vin2_s2_gpio; | ||
109 | }; | 110 | }; |
110 | 111 | ||
111 | static int ov1063x_init_sensor(struct i2c_client *client); | 112 | static int ov1063x_init_sensor(struct i2c_client *client); |
112 | 113 | ||
113 | static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, | 114 | static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, |
114 | int cam_fpd_mux_s0_val, int mux1_sel0_val, int mux1_sel1_val, | 115 | int cam_fpd_mux_s0_val, int mux1_sel0_val, int mux1_sel1_val, |
115 | int mux2_sel0_val, int mux2_sel1_val, int ov_pwdn_val); | 116 | int mux2_sel0_val, int mux2_sel1_val, int ov_pwdn_val, int vin2_s2_val); |
116 | 117 | ||
117 | static const struct ov1063x_reg ov1063x_regs_default[] = { | 118 | static const struct ov1063x_reg ov1063x_regs_default[] = { |
118 | /* Register configuration for full resolution : 1280x720 */ | 119 | /* Register configuration for full resolution : 1280x720 */ |
@@ -1412,6 +1413,22 @@ static int ov1063x_enum_fmt(struct v4l2_subdev *sd, unsigned int index, | |||
1412 | return 0; | 1413 | return 0; |
1413 | } | 1414 | } |
1414 | 1415 | ||
1416 | static int ov1063x_enum_framesizes(struct v4l2_subdev *sd, | ||
1417 | struct v4l2_frmsizeenum *f) | ||
1418 | { | ||
1419 | /* For now, hard coded resolutions for OV10635 sensor */ | ||
1420 | int cam_width[7] = { 1280, 1280, 752, 640, 600, 352, 320 }; | ||
1421 | int cam_height[7] = { 800, 720, 480, 480, 400, 288, 240 }; | ||
1422 | |||
1423 | if (f->index >= 7) | ||
1424 | return -EINVAL; | ||
1425 | |||
1426 | f->type = V4L2_FRMSIZE_TYPE_DISCRETE; | ||
1427 | f->discrete.width = cam_width[f->index]; | ||
1428 | f->discrete.height = cam_height[f->index]; | ||
1429 | return 0; | ||
1430 | } | ||
1431 | |||
1415 | static int ov1063x_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms) | 1432 | static int ov1063x_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *parms) |
1416 | { | 1433 | { |
1417 | struct i2c_client *client = v4l2_get_subdevdata(sd); | 1434 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
@@ -1520,41 +1537,43 @@ static int ov1063x_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a) | |||
1520 | 1537 | ||
1521 | static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, | 1538 | static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, |
1522 | int cam_fpd_mux_s0_val, int mux1_sel0_val, int mux1_sel1_val, | 1539 | int cam_fpd_mux_s0_val, int mux1_sel0_val, int mux1_sel1_val, |
1523 | int mux2_sel0_val, int mux2_sel1_val, int ov_pwdn_val) { | 1540 | int mux2_sel0_val, int mux2_sel1_val, int ov_pwdn_val, |
1541 | int vin2_s2_val) { | ||
1524 | 1542 | ||
1525 | struct ov1063x_priv *priv = to_ov1063x(client); | 1543 | struct ov1063x_priv *priv = to_ov1063x(client); |
1526 | int ret = 0, X = -1, idx = 0; | 1544 | int ret = 0, X = -1, idx = 0; |
1527 | struct gpio gpios[10]; | 1545 | struct gpio gpios[10]; |
1528 | 1546 | ||
1529 | if (vin2_s0_val != X) { | 1547 | if ((vin2_s0_val != X) && gpio_is_valid(priv->vin2_s0_gpio)) { |
1530 | gpios[idx].gpio = priv->vin2_s0_gpio; | 1548 | gpios[idx].gpio = priv->vin2_s0_gpio; |
1531 | gpios[idx].flags = vin2_s0_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1549 | gpios[idx].flags = vin2_s0_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1532 | GPIOF_OUT_INIT_LOW; | 1550 | GPIOF_OUT_INIT_LOW; |
1533 | gpios[idx].label = "vin2_s0"; | 1551 | gpios[idx].label = "vin2_s0"; |
1534 | idx++; | 1552 | idx++; |
1535 | } | 1553 | } |
1536 | if (cam_fpd_mux_s0_val != X) { | 1554 | if ((cam_fpd_mux_s0_val != X) && |
1555 | gpio_is_valid(priv->cam_fpd_mux_s0_gpio)) { | ||
1537 | gpios[idx].gpio = priv->cam_fpd_mux_s0_gpio; | 1556 | gpios[idx].gpio = priv->cam_fpd_mux_s0_gpio; |
1538 | gpios[idx].flags = cam_fpd_mux_s0_val == 1 ? | 1557 | gpios[idx].flags = cam_fpd_mux_s0_val == 1 ? |
1539 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; | 1558 | GPIOF_OUT_INIT_HIGH : GPIOF_OUT_INIT_LOW; |
1540 | gpios[idx].label = "cam_fpd_mux_s0"; | 1559 | gpios[idx].label = "cam_fpd_mux_s0"; |
1541 | idx++; | 1560 | idx++; |
1542 | } | 1561 | } |
1543 | if (mux1_sel0_val != X) { | 1562 | if ((mux1_sel0_val != X) && gpio_is_valid(priv->mux1_sel0_gpio)) { |
1544 | gpios[idx].gpio = priv->mux1_sel0_gpio; | 1563 | gpios[idx].gpio = priv->mux1_sel0_gpio; |
1545 | gpios[idx].flags = mux1_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1564 | gpios[idx].flags = mux1_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1546 | GPIOF_OUT_INIT_LOW; | 1565 | GPIOF_OUT_INIT_LOW; |
1547 | gpios[idx].label = "mux1_sel0"; | 1566 | gpios[idx].label = "mux1_sel0"; |
1548 | idx++; | 1567 | idx++; |
1549 | } | 1568 | } |
1550 | if (mux1_sel1_val != X) { | 1569 | if ((mux1_sel1_val != X) && gpio_is_valid(priv->mux1_sel1_gpio)) { |
1551 | gpios[idx].gpio = priv->mux1_sel1_gpio; | 1570 | gpios[idx].gpio = priv->mux1_sel1_gpio; |
1552 | gpios[idx].flags = mux1_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1571 | gpios[idx].flags = mux1_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1553 | GPIOF_OUT_INIT_LOW; | 1572 | GPIOF_OUT_INIT_LOW; |
1554 | gpios[idx].label = "mux1_sel1"; | 1573 | gpios[idx].label = "mux1_sel1"; |
1555 | idx++; | 1574 | idx++; |
1556 | } | 1575 | } |
1557 | if (mux2_sel0_val != X) { | 1576 | if ((mux2_sel0_val != X) && gpio_is_valid(priv->mux2_sel0_gpio)) { |
1558 | gpios[idx].gpio = priv->mux2_sel0_gpio; | 1577 | gpios[idx].gpio = priv->mux2_sel0_gpio; |
1559 | gpios[idx].flags = mux2_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1578 | gpios[idx].flags = mux2_sel0_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1560 | GPIOF_OUT_INIT_LOW; | 1579 | GPIOF_OUT_INIT_LOW; |
@@ -1562,7 +1581,7 @@ static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, | |||
1562 | idx++; | 1581 | idx++; |
1563 | } | 1582 | } |
1564 | 1583 | ||
1565 | if (mux2_sel1_val != X) { | 1584 | if ((mux2_sel1_val != X) && gpio_is_valid(priv->mux2_sel1_gpio)) { |
1566 | gpios[idx].gpio = priv->mux2_sel1_gpio; | 1585 | gpios[idx].gpio = priv->mux2_sel1_gpio; |
1567 | gpios[idx].flags = mux2_sel1_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1586 | gpios[idx].flags = mux2_sel1_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1568 | GPIOF_OUT_INIT_LOW; | 1587 | GPIOF_OUT_INIT_LOW; |
@@ -1570,7 +1589,7 @@ static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, | |||
1570 | idx++; | 1589 | idx++; |
1571 | } | 1590 | } |
1572 | 1591 | ||
1573 | if (ov_pwdn_val != X) { | 1592 | if ((ov_pwdn_val != X) && gpio_is_valid(priv->ov_pwdn_gpio)) { |
1574 | gpios[idx].gpio = priv->ov_pwdn_gpio; | 1593 | gpios[idx].gpio = priv->ov_pwdn_gpio; |
1575 | gpios[idx].flags = ov_pwdn_val == 1 ? GPIOF_OUT_INIT_HIGH : | 1594 | gpios[idx].flags = ov_pwdn_val == 1 ? GPIOF_OUT_INIT_HIGH : |
1576 | GPIOF_OUT_INIT_LOW; | 1595 | GPIOF_OUT_INIT_LOW; |
@@ -1578,6 +1597,14 @@ static int ov1063x_set_gpios(struct i2c_client *client, int vin2_s0_val, | |||
1578 | idx++; | 1597 | idx++; |
1579 | } | 1598 | } |
1580 | 1599 | ||
1600 | if ((vin2_s2_val != X) && gpio_is_valid(priv->vin2_s2_gpio)) { | ||
1601 | gpios[idx].gpio = priv->vin2_s2_gpio; | ||
1602 | gpios[idx].flags = vin2_s2_val == 1 ? GPIOF_OUT_INIT_HIGH : | ||
1603 | GPIOF_OUT_INIT_LOW; | ||
1604 | gpios[idx].label = "vin2_s2"; | ||
1605 | idx++; | ||
1606 | } | ||
1607 | |||
1581 | ret = gpio_request_array(gpios, idx); | 1608 | ret = gpio_request_array(gpios, idx); |
1582 | if (ret) | 1609 | if (ret) |
1583 | return ret; | 1610 | return ret; |
@@ -1622,27 +1649,26 @@ static int ov1063x_detect_sensor(struct i2c_client *client) | |||
1622 | static int ov1063x_init_sensor(struct i2c_client *client) | 1649 | static int ov1063x_init_sensor(struct i2c_client *client) |
1623 | { | 1650 | { |
1624 | struct ov1063x_priv *priv = to_ov1063x(client); | 1651 | struct ov1063x_priv *priv = to_ov1063x(client); |
1625 | int ret, X = -1; | 1652 | int ret = -EINVAL, X = -1; |
1626 | 1653 | ||
1627 | switch (priv->sensor_connector) { | 1654 | switch (priv->sensor_connector) { |
1628 | case VIS_OVCAM: | 1655 | case VIS_OVCAM: |
1629 | ret = ov1063x_set_gpios(client, X, 1, 1, 0, 0, 0, 1); | 1656 | ret = ov1063x_set_gpios(client, X, 1, 1, 0, 0, 0, 1, X); |
1630 | break; | 1657 | break; |
1631 | case VIS_SERDES: | 1658 | case VIS_SERDES: |
1632 | if (client->addr == 0x39) | 1659 | if (client->addr == 0x39) |
1633 | ret = ov1063x_set_gpios(client, 0, 1, X, X, X, X, 1); | 1660 | ret = ov1063x_set_gpios(client, 0, 1, X, X, X, X, 1, X); |
1634 | else | 1661 | else |
1635 | ret = ov1063x_set_gpios(client, X, 1, X, X, 0, 1, 1); | 1662 | ret = ov1063x_set_gpios(client, X, 1, X, X, 0, 1, 1, X); |
1636 | break; | 1663 | break; |
1637 | case VIS_LI: | 1664 | case VIS_LI: |
1638 | ret = ov1063x_set_gpios(client, X, 1, 0, 0, 1, 0, 1); | 1665 | ret = ov1063x_set_gpios(client, X, 1, 0, 0, 1, 0, 1, X); |
1639 | break; | 1666 | break; |
1640 | case BASE_LI: | 1667 | case BASE_LI: |
1641 | ret = ov1063x_set_gpios(client, X, 0, X, X, X, X, X); | 1668 | ret = ov1063x_set_gpios(client, 1, 0, X, X, X, X, X, 0); |
1642 | break; | 1669 | break; |
1643 | default: | 1670 | default: |
1644 | dev_err(&client->dev, "Unknown connector!\n"); | 1671 | dev_err(&client->dev, "Unknown connector!\n"); |
1645 | return -EINVAL; | ||
1646 | } | 1672 | } |
1647 | 1673 | ||
1648 | return ret; | 1674 | return ret; |
@@ -1713,6 +1739,13 @@ static int sensor_get_gpios(struct device_node *node, struct i2c_client *client) | |||
1713 | return -EINVAL; | 1739 | return -EINVAL; |
1714 | } | 1740 | } |
1715 | 1741 | ||
1742 | gpio = of_get_gpio(node, 7); | ||
1743 | if (gpio_is_valid(gpio)) { | ||
1744 | priv->vin2_s2_gpio = gpio; | ||
1745 | } else { | ||
1746 | priv->vin2_s2_gpio = -1; | ||
1747 | dev_err(&client->dev, "failed to parse VIN2_S2 gpio\n"); | ||
1748 | } | ||
1716 | return 0; | 1749 | return 0; |
1717 | } | 1750 | } |
1718 | 1751 | ||
@@ -1851,6 +1884,7 @@ static struct v4l2_subdev_video_ops ov1063x_video_ops = { | |||
1851 | .s_mbus_fmt = ov1063x_s_fmt, | 1884 | .s_mbus_fmt = ov1063x_s_fmt, |
1852 | .try_mbus_fmt = ov1063x_try_fmt, | 1885 | .try_mbus_fmt = ov1063x_try_fmt, |
1853 | .enum_mbus_fmt = ov1063x_enum_fmt, | 1886 | .enum_mbus_fmt = ov1063x_enum_fmt, |
1887 | .enum_framesizes = ov1063x_enum_framesizes, | ||
1854 | .cropcap = ov1063x_cropcap, | 1888 | .cropcap = ov1063x_cropcap, |
1855 | .g_crop = ov1063x_g_crop, | 1889 | .g_crop = ov1063x_g_crop, |
1856 | .s_crop = ov1063x_s_crop, | 1890 | .s_crop = ov1063x_s_crop, |
diff --git a/drivers/media/i2c/tvp5158.c b/drivers/media/i2c/tvp5158.c index ff74a3365be3..12ac07a13831 100644 --- a/drivers/media/i2c/tvp5158.c +++ b/drivers/media/i2c/tvp5158.c | |||
@@ -202,6 +202,8 @@ struct tvp5158_priv { | |||
202 | const char *sensor_name; | 202 | const char *sensor_name; |
203 | int cam_fpd_mux_s0_gpio; | 203 | int cam_fpd_mux_s0_gpio; |
204 | int sel_tvp_fpd_s0; | 204 | int sel_tvp_fpd_s0; |
205 | int vin2_s0_gpio; | ||
206 | int vin2_s2_gpio; | ||
205 | enum tvp5158_std current_std; | 207 | enum tvp5158_std current_std; |
206 | enum tvp5158_signal_present signal_present; | 208 | enum tvp5158_signal_present signal_present; |
207 | const struct tvp5158_std_info *std_list; | 209 | const struct tvp5158_std_info *std_list; |
@@ -426,6 +428,27 @@ static int tvp5158_enum_fmt(struct v4l2_subdev *sd, unsigned int index, | |||
426 | return 0; | 428 | return 0; |
427 | } | 429 | } |
428 | 430 | ||
431 | static int tvp5158_enum_framesizes(struct v4l2_subdev *sd, | ||
432 | struct v4l2_frmsizeenum *f) | ||
433 | { | ||
434 | |||
435 | /* For now, hard coded resolutions for TVP5158 NTSC decoder */ | ||
436 | int cam_width[] = { 720, 640,}; | ||
437 | int cam_height[] = { 240, 240,}; | ||
438 | |||
439 | if (f->index >= 2) | ||
440 | return -EINVAL; | ||
441 | |||
442 | f->type = V4L2_FRMSIZE_TYPE_DISCRETE; | ||
443 | f->discrete.width = cam_width[f->index]; | ||
444 | /* tvp5158 sensor outputs interlaced data, hence, in the timings | ||
445 | * we listed down the field height. In the framesize query we need | ||
446 | * to publish the frame height, so multiply the field height by 2 */ | ||
447 | f->discrete.height = 2 * cam_height[f->index]; | ||
448 | |||
449 | return 0; | ||
450 | } | ||
451 | |||
429 | static int tvp5158_get_gpios(struct device_node *node, | 452 | static int tvp5158_get_gpios(struct device_node *node, |
430 | struct i2c_client *client) | 453 | struct i2c_client *client) |
431 | { | 454 | { |
@@ -448,6 +471,22 @@ static int tvp5158_get_gpios(struct device_node *node, | |||
448 | return -EINVAL; | 471 | return -EINVAL; |
449 | } | 472 | } |
450 | 473 | ||
474 | gpio = of_get_gpio(node, 2); | ||
475 | if (gpio_is_valid(gpio)) | ||
476 | priv->vin2_s0_gpio = gpio; | ||
477 | else { | ||
478 | priv->vin2_s0_gpio = -1; | ||
479 | dev_err(&client->dev, "failed to parse VIN2_S0 gpio\n"); | ||
480 | } | ||
481 | |||
482 | gpio = of_get_gpio(node, 3); | ||
483 | if (gpio_is_valid(gpio)) | ||
484 | priv->vin2_s2_gpio = gpio; | ||
485 | else { | ||
486 | priv->vin2_s2_gpio = -1; | ||
487 | dev_err(&client->dev, "failed to parse VIN2_S2 gpio\n"); | ||
488 | } | ||
489 | |||
451 | return 0; | 490 | return 0; |
452 | } | 491 | } |
453 | 492 | ||
@@ -455,19 +494,42 @@ static int tvp5158_set_gpios(struct i2c_client *client) | |||
455 | { | 494 | { |
456 | 495 | ||
457 | struct tvp5158_priv *priv = to_tvp5158(client); | 496 | struct tvp5158_priv *priv = to_tvp5158(client); |
458 | struct gpio gpios[] = { | 497 | struct gpio gpios[10]; |
459 | { priv->sel_tvp_fpd_s0, GPIOF_OUT_INIT_LOW, | 498 | int ret = -1, i = 0; |
460 | "tvp_fpd_mux_s0" }, | 499 | |
461 | { priv->cam_fpd_mux_s0_gpio, GPIOF_OUT_INIT_HIGH, | 500 | if (gpio_is_valid(priv->sel_tvp_fpd_s0)) { |
462 | "cam_fpd_mux_s0" }, | 501 | gpios[i].gpio = priv->sel_tvp_fpd_s0; |
463 | }; | 502 | gpios[i].flags = GPIOF_OUT_INIT_LOW; |
464 | int ret = -1; | 503 | gpios[i].label = "tvp_fpd_mux_s0"; |
504 | i++; | ||
505 | } | ||
506 | |||
507 | if (gpio_is_valid(priv->cam_fpd_mux_s0_gpio)) { | ||
508 | gpios[i].gpio = priv->cam_fpd_mux_s0_gpio; | ||
509 | gpios[i].flags = GPIOF_OUT_INIT_HIGH; | ||
510 | gpios[i].label = "cam_fpd_mux_s0"; | ||
511 | i++; | ||
512 | } | ||
513 | |||
514 | if (gpio_is_valid(priv->vin2_s0_gpio)) { | ||
515 | gpios[i].gpio = priv->vin2_s0_gpio; | ||
516 | gpios[i].flags = GPIOF_OUT_INIT_LOW; | ||
517 | gpios[i].label = "vin2_s0"; | ||
518 | i++; | ||
519 | } | ||
520 | |||
521 | if (gpio_is_valid(priv->vin2_s2_gpio)) { | ||
522 | gpios[i].gpio = priv->vin2_s2_gpio; | ||
523 | gpios[i].flags = GPIOF_OUT_INIT_HIGH; | ||
524 | gpios[i].label = "vin2_s2"; | ||
525 | i++; | ||
526 | } | ||
465 | 527 | ||
466 | ret = gpio_request_array(gpios, ARRAY_SIZE(gpios)); | 528 | ret = gpio_request_array(gpios, i); |
467 | if (ret) | 529 | if (ret) |
468 | return ret; | 530 | return ret; |
469 | 531 | ||
470 | gpio_free_array(gpios, ARRAY_SIZE(gpios)); | 532 | gpio_free_array(gpios, i); |
471 | 533 | ||
472 | return 0; | 534 | return 0; |
473 | } | 535 | } |
@@ -475,6 +537,7 @@ static int tvp5158_set_gpios(struct i2c_client *client) | |||
475 | static struct v4l2_subdev_video_ops tvp5158_video_ops = { | 537 | static struct v4l2_subdev_video_ops tvp5158_video_ops = { |
476 | .querystd = tvp5158_querystd, | 538 | .querystd = tvp5158_querystd, |
477 | .enum_mbus_fmt = tvp5158_enum_fmt, | 539 | .enum_mbus_fmt = tvp5158_enum_fmt, |
540 | .enum_framesizes = tvp5158_enum_framesizes, | ||
478 | .g_parm = tvp5158_g_parm, | 541 | .g_parm = tvp5158_g_parm, |
479 | .s_parm = tvp5158_s_parm, | 542 | .s_parm = tvp5158_s_parm, |
480 | .s_stream = tvp5158_s_stream, | 543 | .s_stream = tvp5158_s_stream, |
diff --git a/drivers/media/platform/ti-vps/vip.c b/drivers/media/platform/ti-vps/vip.c index e6e487b23e35..742caca874a4 100644 --- a/drivers/media/platform/ti-vps/vip.c +++ b/drivers/media/platform/ti-vps/vip.c | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include <linux/of_i2c.h> | 22 | #include <linux/of_i2c.h> |
23 | #include "vip.h" | 23 | #include "vip.h" |
24 | #include "../../../drivers/gpu/drm/omapdrm/omap_dmm_tiler.h" | ||
24 | 25 | ||
25 | #define VIP_MODULE_NAME "dra7xx-vip" | 26 | #define VIP_MODULE_NAME "dra7xx-vip" |
26 | #define VIP_INPUT_NAME "Vin0" | 27 | #define VIP_INPUT_NAME "Vin0" |
@@ -796,6 +797,8 @@ static int add_out_dtd(struct vip_stream *stream, int srce_type) | |||
796 | return -1; | 797 | return -1; |
797 | } | 798 | } |
798 | 799 | ||
800 | if (is_tiler_addr(dma_addr)) | ||
801 | flags |= VPDMA_DATA_MODE_TILED; | ||
799 | /* | 802 | /* |
800 | * Use VPDMA_MAX_SIZE1 or VPDMA_MAX_SIZE2 register for slice0/1 | 803 | * Use VPDMA_MAX_SIZE1 or VPDMA_MAX_SIZE2 register for slice0/1 |
801 | */ | 804 | */ |
@@ -904,7 +907,7 @@ static void start_dma(struct vip_dev *dev, struct vip_buffer *buf) | |||
904 | dma_addr = vb2_dma_contig_plane_dma_addr(&buf->vb, 0); | 907 | dma_addr = vb2_dma_contig_plane_dma_addr(&buf->vb, 0); |
905 | drop_data = 0; | 908 | drop_data = 0; |
906 | } else { | 909 | } else { |
907 | dma_addr = NULL; | 910 | dma_addr = 0; |
908 | drop_data = 1; | 911 | drop_data = 1; |
909 | } | 912 | } |
910 | 913 | ||
@@ -966,7 +969,7 @@ static void vip_process_buffer_complete(struct vip_stream *stream) | |||
966 | vpdma_buf_unmap(dev->shared->vpdma, &dev->desc_list.buf); | 969 | vpdma_buf_unmap(dev->shared->vpdma, &dev->desc_list.buf); |
967 | 970 | ||
968 | fld = dtd_get_field(dev->write_desc); | 971 | fld = dtd_get_field(dev->write_desc); |
969 | stream->field = fld ? V4L2_FIELD_TOP : V4L2_FIELD_BOTTOM; | 972 | stream->field = fld ? V4L2_FIELD_BOTTOM : V4L2_FIELD_TOP; |
970 | 973 | ||
971 | vpdma_buf_map(dev->shared->vpdma, &dev->desc_list.buf); | 974 | vpdma_buf_map(dev->shared->vpdma, &dev->desc_list.buf); |
972 | } | 975 | } |
@@ -1162,18 +1165,15 @@ static int vip_enum_fmt_vid_cap(struct file *file, void *priv, | |||
1162 | static int vip_enum_framesizes(struct file *file, void *priv, | 1165 | static int vip_enum_framesizes(struct file *file, void *priv, |
1163 | struct v4l2_frmsizeenum *f) | 1166 | struct v4l2_frmsizeenum *f) |
1164 | { | 1167 | { |
1165 | /* For now, hard coded resolutions for OV10635 sensor */ | 1168 | struct vip_stream *stream = file2stream(file); |
1166 | int cam_width[7] = { 1280, 1280, 752, 640, 600, 352, 320 }; | 1169 | struct vip_dev *dev = stream->port->dev; |
1167 | int cam_height[7] = { 800, 720, 480, 480, 400, 288, 240 }; | 1170 | int ret; |
1168 | |||
1169 | if (f->index >= 7) | ||
1170 | return -EINVAL; | ||
1171 | 1171 | ||
1172 | f->type = V4L2_FRMSIZE_TYPE_DISCRETE; | 1172 | ret = v4l2_subdev_call(dev->sensor, video, enum_framesizes, f); |
1173 | f->discrete.width = cam_width[f->index]; | 1173 | if (ret) |
1174 | f->discrete.height = cam_height[f->index]; | 1174 | vip_dprintk(dev, "enum_framesizes failed in subdev\n"); |
1175 | 1175 | ||
1176 | return 0; | 1176 | return ret; |
1177 | } | 1177 | } |
1178 | 1178 | ||
1179 | static int vip_enum_frameintervals(struct file *file, void *priv, | 1179 | static int vip_enum_frameintervals(struct file *file, void *priv, |
@@ -1205,15 +1205,24 @@ static int vip_g_fmt_vid_cap(struct file *file, void *priv, | |||
1205 | { | 1205 | { |
1206 | struct vip_stream *stream = file2stream(file); | 1206 | struct vip_stream *stream = file2stream(file); |
1207 | struct vip_port *port = stream->port; | 1207 | struct vip_port *port = stream->port; |
1208 | struct vip_dev *dev = stream->port->dev; | ||
1209 | struct v4l2_mbus_framefmt mbus_fmt; | ||
1210 | int ret; | ||
1208 | 1211 | ||
1209 | f->fmt.pix.width = stream->width; | 1212 | f->fmt.pix.width = stream->width; |
1210 | f->fmt.pix.height = stream->height; | 1213 | f->fmt.pix.height = stream->height; |
1211 | f->fmt.pix.pixelformat = port->fmt->fourcc; | 1214 | f->fmt.pix.pixelformat = port->fmt->fourcc; |
1212 | f->fmt.pix.field = stream->sup_field; | 1215 | f->fmt.pix.field = stream->sup_field; |
1213 | f->fmt.pix.colorspace = port->fmt->colorspace; | 1216 | f->fmt.pix.colorspace = port->fmt->colorspace; |
1214 | f->fmt.pix.bytesperline = stream->bytesperline; | 1217 | f->fmt.pix.bytesperline = stream->bytesperline; |
1215 | f->fmt.pix.sizeimage = stream->sizeimage; | 1218 | f->fmt.pix.sizeimage = stream->sizeimage; |
1216 | 1219 | ||
1220 | ret = v4l2_subdev_call(dev->sensor, video, g_mbus_fmt, &mbus_fmt); | ||
1221 | if (ret) | ||
1222 | vip_dprintk(dev, "g_mbus_fmt failed in subdev\n"); | ||
1223 | |||
1224 | f->fmt.pix.field = mbus_fmt.field; | ||
1225 | |||
1217 | return 0; | 1226 | return 0; |
1218 | } | 1227 | } |
1219 | 1228 | ||
@@ -1543,6 +1552,14 @@ static int vip_start_streaming(struct vb2_queue *vq, unsigned int count) | |||
1543 | list_add_tail(&buf->dq_list, &dev->vip_bufs); | 1552 | list_add_tail(&buf->dq_list, &dev->vip_bufs); |
1544 | spin_unlock_irqrestore(&dev->slock, flags); | 1553 | spin_unlock_irqrestore(&dev->slock, flags); |
1545 | 1554 | ||
1555 | /* It can so happen on some HW devices that start_dma completes, and | ||
1556 | * even generates IRQ before we return from here or before vq->streaming | ||
1557 | * is updated in videobuf2-core.c. If that happens, the vip_irq | ||
1558 | * doesn't process the buffer as it thinks there was no stream started. | ||
1559 | * In order handle this situation, we are updating the streaming status | ||
1560 | * before starting the dma */ | ||
1561 | vq->streaming = 1; | ||
1562 | |||
1546 | start_dma(dev, buf); | 1563 | start_dma(dev, buf); |
1547 | 1564 | ||
1548 | return 0; | 1565 | return 0; |
@@ -1558,12 +1575,6 @@ static int vip_stop_streaming(struct vb2_queue *vq) | |||
1558 | struct vip_dev *dev = port->dev; | 1575 | struct vip_dev *dev = port->dev; |
1559 | struct vip_buffer *buf; | 1576 | struct vip_buffer *buf; |
1560 | 1577 | ||
1561 | if (!vb2_is_streaming(vq)) | ||
1562 | return 0; | ||
1563 | |||
1564 | vpdma_buf_unmap(dev->shared->vpdma, &dev->desc_list.buf); | ||
1565 | vpdma_reset_desc_list(&dev->desc_list); | ||
1566 | |||
1567 | disable_irqs(dev, dev->slice_id); | 1578 | disable_irqs(dev, dev->slice_id); |
1568 | /* release all active buffers */ | 1579 | /* release all active buffers */ |
1569 | while (!list_empty(&dev->vip_bufs)) { | 1580 | while (!list_empty(&dev->vip_bufs)) { |
@@ -1577,6 +1588,13 @@ static int vip_stop_streaming(struct vb2_queue *vq) | |||
1577 | list_del(&buf->list); | 1588 | list_del(&buf->list); |
1578 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); | 1589 | vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR); |
1579 | } | 1590 | } |
1591 | |||
1592 | if (!vb2_is_streaming(vq)) | ||
1593 | return 0; | ||
1594 | |||
1595 | vpdma_buf_unmap(dev->shared->vpdma, &dev->desc_list.buf); | ||
1596 | vpdma_reset_desc_list(&dev->desc_list); | ||
1597 | |||
1580 | return 0; | 1598 | return 0; |
1581 | } | 1599 | } |
1582 | 1600 | ||
@@ -1720,6 +1738,8 @@ static int vip_setup_parser(struct vip_port *port) | |||
1720 | 1738 | ||
1721 | vip_set_data_interface(port, iface); | 1739 | vip_set_data_interface(port, iface); |
1722 | vip_sync_type(port, sync_type); | 1740 | vip_sync_type(port, sync_type); |
1741 | |||
1742 | return 0; | ||
1723 | } | 1743 | } |
1724 | 1744 | ||
1725 | static int vip_init_port(struct vip_port *port) | 1745 | static int vip_init_port(struct vip_port *port) |
diff --git a/drivers/media/platform/ti-vps/vpdma.c b/drivers/media/platform/ti-vps/vpdma.c index 6314621250f6..3452d61b97be 100644 --- a/drivers/media/platform/ti-vps/vpdma.c +++ b/drivers/media/platform/ti-vps/vpdma.c | |||
@@ -25,6 +25,8 @@ | |||
25 | 25 | ||
26 | #include "vpdma.h" | 26 | #include "vpdma.h" |
27 | #include "vpdma_priv.h" | 27 | #include "vpdma_priv.h" |
28 | #include "../../../drivers/gpu/drm/omapdrm/omap_dmm_tiler.h" | ||
29 | |||
28 | 30 | ||
29 | #define VPDMA_FIRMWARE "vpdma-1b8.fw" | 31 | #define VPDMA_FIRMWARE "vpdma-1b8.fw" |
30 | 32 | ||
@@ -700,7 +702,16 @@ int vpdma_add_out_dtd(struct vpdma_desc_list *list, int width, | |||
700 | fmt->data_type == DATA_TYPE_C420) | 702 | fmt->data_type == DATA_TYPE_C420) |
701 | depth = 8; | 703 | depth = 8; |
702 | 704 | ||
703 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | 705 | if (!is_tiler_addr(dma_addr)) |
706 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | ||
707 | else { | ||
708 | enum tiler_fmt fmt; | ||
709 | tiler_get_fmt(dma_addr, &fmt); | ||
710 | if (fmt != TILFMT_PAGE) | ||
711 | stride = tiler_stride(fmt, 0); | ||
712 | else | ||
713 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | ||
714 | } | ||
704 | 715 | ||
705 | dtd = list->next; | 716 | dtd = list->next; |
706 | WARN_ON((void *)(dtd + 1) > (list->buf.addr + list->buf.size)); | 717 | WARN_ON((void *)(dtd + 1) > (list->buf.addr + list->buf.size)); |
@@ -772,7 +783,16 @@ void vpdma_add_in_dtd(struct vpdma_desc_list *list, int width, | |||
772 | depth = 8; | 783 | depth = 8; |
773 | } | 784 | } |
774 | 785 | ||
775 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | 786 | if (!is_tiler_addr(dma_addr)) |
787 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | ||
788 | else { | ||
789 | enum tiler_fmt fmt; | ||
790 | tiler_get_fmt(dma_addr, &fmt); | ||
791 | if (fmt != TILFMT_PAGE) | ||
792 | stride = tiler_stride(fmt, 0); | ||
793 | else | ||
794 | stride = ALIGN((depth * width) >> 3, VPDMA_DESC_ALIGN); | ||
795 | } | ||
776 | 796 | ||
777 | dma_addr += rect.top * stride + (rect.left * depth >> 3); | 797 | dma_addr += rect.top * stride + (rect.left * depth >> 3); |
778 | 798 | ||
diff --git a/drivers/media/platform/ti-vps/vpe.c b/drivers/media/platform/ti-vps/vpe.c index 2256a8bbbd6b..7eaa2802ad6d 100644 --- a/drivers/media/platform/ti-vps/vpe.c +++ b/drivers/media/platform/ti-vps/vpe.c | |||
@@ -1855,7 +1855,7 @@ static void set_dei_shadow_registers(struct vpe_ctx *ctx) | |||
1855 | { | 1855 | { |
1856 | struct vpe_mmr_adb *mmr_adb = ctx->mmr_adb.addr; | 1856 | struct vpe_mmr_adb *mmr_adb = ctx->mmr_adb.addr; |
1857 | u32 *dei_mmr = &mmr_adb->dei_regs[0]; | 1857 | u32 *dei_mmr = &mmr_adb->dei_regs[0]; |
1858 | struct vpe_dei_regs *cur = &dei_regs; | 1858 | struct vpe_dei_regs *cur = (struct vpe_dei_regs *) &dei_regs; |
1859 | 1859 | ||
1860 | dei_mmr[2] = cur->mdt_spacial_freq_thr_reg; | 1860 | dei_mmr[2] = cur->mdt_spacial_freq_thr_reg; |
1861 | dei_mmr[3] = cur->edi_config_reg; | 1861 | dei_mmr[3] = cur->edi_config_reg; |
diff --git a/drivers/media/v4l2-core/videobuf2-dma-contig.c b/drivers/media/v4l2-core/videobuf2-dma-contig.c index 10beaee7f0ae..1917231a31eb 100644 --- a/drivers/media/v4l2-core/videobuf2-dma-contig.c +++ b/drivers/media/v4l2-core/videobuf2-dma-contig.c | |||
@@ -651,6 +651,14 @@ static int vb2_dc_map_dmabuf(void *mem_priv) | |||
651 | 651 | ||
652 | /* checking if dmabuf is big enough to store contiguous chunk */ | 652 | /* checking if dmabuf is big enough to store contiguous chunk */ |
653 | contig_size = vb2_dc_get_contiguous_size(sgt); | 653 | contig_size = vb2_dc_get_contiguous_size(sgt); |
654 | |||
655 | /* HACK: In order to allow TILER-2D buffers, which are always | ||
656 | * contiguous, lets check the sgt size, and it is of one LINUX PAGE | ||
657 | * size, assume it is TILER2D and assign buf size to contig_size | ||
658 | */ | ||
659 | if (contig_size == 4096) | ||
660 | contig_size = buf->size; | ||
661 | |||
654 | if (contig_size < buf->size) { | 662 | if (contig_size < buf->size) { |
655 | pr_err("contiguous chunk is too small %lu/%lu b\n", | 663 | pr_err("contiguous chunk is too small %lu/%lu b\n", |
656 | contig_size, buf->size); | 664 | contig_size, buf->size); |
diff --git a/drivers/misc/ti-ec/earlycam.c b/drivers/misc/ti-ec/earlycam.c index abed840a35c6..3cf82ef55c9e 100644 --- a/drivers/misc/ti-ec/earlycam.c +++ b/drivers/misc/ti-ec/earlycam.c | |||
@@ -60,7 +60,7 @@ static int main_fn(void *); | |||
60 | static int init_mmap(struct file *fp); | 60 | static int init_mmap(struct file *fp); |
61 | static void earlycam_isr(void *arg, unsigned int irqstatus); | 61 | static void earlycam_isr(void *arg, unsigned int irqstatus); |
62 | 62 | ||
63 | int thread_init(void) | 63 | static int thread_init(void) |
64 | { | 64 | { |
65 | char our_thread[16] = "earlycam_thread"; | 65 | char our_thread[16] = "earlycam_thread"; |
66 | 66 | ||
@@ -73,7 +73,7 @@ int thread_init(void) | |||
73 | return 0; | 73 | return 0; |
74 | } | 74 | } |
75 | 75 | ||
76 | int display_init() | 76 | static int display_init(void) |
77 | { | 77 | { |
78 | int ret = 0, i; | 78 | int ret = 0, i; |
79 | struct omap_dss_device *dssdev = NULL; | 79 | struct omap_dss_device *dssdev = NULL; |
@@ -118,7 +118,7 @@ err_dss_init: | |||
118 | return ret; | 118 | return ret; |
119 | } | 119 | } |
120 | 120 | ||
121 | int display_disable(struct earlycam_setup_dispc_data data) | 121 | static int display_disable(struct earlycam_setup_dispc_data data) |
122 | { | 122 | { |
123 | struct omap_overlay *ovl; | 123 | struct omap_overlay *ovl; |
124 | ovl = earlycam_dev->overlays[data.ovls[0].cfg.ix]; | 124 | ovl = earlycam_dev->overlays[data.ovls[0].cfg.ix]; |
@@ -154,7 +154,7 @@ static void earlycam_isr(void *arg, unsigned int irqstatus) | |||
154 | } | 154 | } |
155 | } | 155 | } |
156 | 156 | ||
157 | int display_queue(struct earlycam_setup_dispc_data data) | 157 | static int display_queue(struct earlycam_setup_dispc_data data) |
158 | { | 158 | { |
159 | int ret = 0; | 159 | int ret = 0; |
160 | int retry; | 160 | int retry; |
@@ -235,7 +235,7 @@ int display_queue(struct earlycam_setup_dispc_data data) | |||
235 | return ret; | 235 | return ret; |
236 | } | 236 | } |
237 | 237 | ||
238 | int init_mmap(struct file *fp) | 238 | static int init_mmap(struct file *fp) |
239 | { | 239 | { |
240 | int i; | 240 | int i; |
241 | struct v4l2_requestbuffers req = {0}; | 241 | struct v4l2_requestbuffers req = {0}; |
@@ -263,7 +263,7 @@ int init_mmap(struct file *fp) | |||
263 | return 0; | 263 | return 0; |
264 | } | 264 | } |
265 | 265 | ||
266 | int capture_image(struct file *fp, int init) | 266 | static int capture_image(struct file *fp, int init) |
267 | { | 267 | { |
268 | struct v4l2_buffer buf = {0}; | 268 | struct v4l2_buffer buf = {0}; |
269 | int i; | 269 | int i; |
@@ -321,7 +321,6 @@ int capture_image(struct file *fp, int init) | |||
321 | 321 | ||
322 | int main_fn(void *arg) | 322 | int main_fn(void *arg) |
323 | { | 323 | { |
324 | int i; | ||
325 | int ret; | 324 | int ret; |
326 | int cam_init = 1; | 325 | int cam_init = 1; |
327 | int val; | 326 | int val; |
@@ -329,16 +328,6 @@ int main_fn(void *arg) | |||
329 | struct dentry dtr; | 328 | struct dentry dtr; |
330 | struct file fp; | 329 | struct file fp; |
331 | 330 | ||
332 | /* | ||
333 | * Creates a file pointer to the VIP video device | ||
334 | * This is hardcoded to open up the first instance | ||
335 | * of the VIP which should be registered as /dev/video1 | ||
336 | * since the VPE module will be registered as /dev/video0 | ||
337 | */ | ||
338 | in.i_rdev = MKDEV(VIDEO_MAJOR, 1); | ||
339 | dtr.d_inode = ∈ | ||
340 | fp.f_path.dentry = &dtr; | ||
341 | |||
342 | /* need base address for in-page offset */ | 331 | /* need base address for in-page offset */ |
343 | struct earlycam_setup_dispc_data comp = { | 332 | struct earlycam_setup_dispc_data comp = { |
344 | .num_mgrs = 1, | 333 | .num_mgrs = 1, |
@@ -360,6 +349,16 @@ int main_fn(void *arg) | |||
360 | .ovls[0].ba = (u32) dma_addr_global_complete[buffer_index], | 349 | .ovls[0].ba = (u32) dma_addr_global_complete[buffer_index], |
361 | }; | 350 | }; |
362 | 351 | ||
352 | /* | ||
353 | * Creates a file pointer to the VIP video device | ||
354 | * This is hardcoded to open up the first instance | ||
355 | * of the VIP which should be registered as /dev/video1 | ||
356 | * since the VPE module will be registered as /dev/video0 | ||
357 | */ | ||
358 | in.i_rdev = MKDEV(VIDEO_MAJOR, 1); | ||
359 | dtr.d_inode = ∈ | ||
360 | fp.f_path.dentry = &dtr; | ||
361 | |||
363 | ret = display_init(); | 362 | ret = display_init(); |
364 | if (ret) { | 363 | if (ret) { |
365 | pr_err("display_init failed with error %d", ret); | 364 | pr_err("display_init failed with error %d", ret); |
@@ -369,12 +368,11 @@ int main_fn(void *arg) | |||
369 | cam_init = 2; | 368 | cam_init = 2; |
370 | 369 | ||
371 | while (1) { | 370 | while (1) { |
372 | while ((val = | 371 | |
373 | gpio_get_value_cansleep( | 372 | do { |
374 | earlycam_dev->reverse_gpio)) == | ||
375 | 1) { | ||
376 | /* Spin inside this loop, sleeping for 100 mS | 373 | /* Spin inside this loop, sleeping for 100 mS |
377 | * everytime until the user presses the gpio. | 374 | * everytime until the user presses the gpio OR |
375 | * in case there was an error reading the value. | ||
378 | * This should be replaced by interrupt based | 376 | * This should be replaced by interrupt based |
379 | * mechanism to avoid waking up the cpu | 377 | * mechanism to avoid waking up the cpu |
380 | * frequently | 378 | * frequently |
@@ -397,7 +395,9 @@ int main_fn(void *arg) | |||
397 | once = 1; | 395 | once = 1; |
398 | } | 396 | } |
399 | msleep(100); | 397 | msleep(100); |
400 | } | 398 | val = gpio_get_value_cansleep |
399 | (earlycam_dev->reverse_gpio); | ||
400 | } while (val == 1 || val < 0); | ||
401 | 401 | ||
402 | /* So we got a gpio press, start by initializing camera first */ | 402 | /* So we got a gpio press, start by initializing camera first */ |
403 | if (cam_init == 2) { | 403 | if (cam_init == 2) { |
diff --git a/drivers/misc/ti-st/tty_hci.c b/drivers/misc/ti-st/tty_hci.c index 0c5cf9399769..ca24acaa7f8c 100644 --- a/drivers/misc/ti-st/tty_hci.c +++ b/drivers/misc/ti-st/tty_hci.c | |||
@@ -133,7 +133,7 @@ static struct st_proto_s ti_st_proto[MAX_BT_CHNL_IDS] = { | |||
133 | * Returns 0 - on success | 133 | * Returns 0 - on success |
134 | * else suitable error code | 134 | * else suitable error code |
135 | */ | 135 | */ |
136 | int hci_tty_open(struct inode *inod, struct file *file) | 136 | static int hci_tty_open(struct inode *inod, struct file *file) |
137 | { | 137 | { |
138 | int i = 0, err = 0; | 138 | int i = 0, err = 0; |
139 | unsigned long timeleft; | 139 | unsigned long timeleft; |
@@ -229,7 +229,7 @@ error: | |||
229 | * Returns 0 - on success | 229 | * Returns 0 - on success |
230 | * else suitable error code | 230 | * else suitable error code |
231 | */ | 231 | */ |
232 | int hci_tty_release(struct inode *inod, struct file *file) | 232 | static int hci_tty_release(struct inode *inod, struct file *file) |
233 | { | 233 | { |
234 | int err, i; | 234 | int err, i; |
235 | struct ti_st *hst = file->private_data; | 235 | struct ti_st *hst = file->private_data; |
@@ -259,7 +259,7 @@ int hci_tty_release(struct inode *inod, struct file *file) | |||
259 | * Returns Size of packet received - on success | 259 | * Returns Size of packet received - on success |
260 | * else suitable error code | 260 | * else suitable error code |
261 | */ | 261 | */ |
262 | ssize_t hci_tty_read(struct file *file, char __user *data, size_t size, | 262 | static ssize_t hci_tty_read(struct file *file, char __user *data, size_t size, |
263 | loff_t *offset) | 263 | loff_t *offset) |
264 | { | 264 | { |
265 | int len = 0, tout; | 265 | int len = 0, tout; |
@@ -343,7 +343,7 @@ ssize_t hci_tty_read(struct file *file, char __user *data, size_t size, | |||
343 | * Returns Size of packet on success | 343 | * Returns Size of packet on success |
344 | * else suitable error code | 344 | * else suitable error code |
345 | */ | 345 | */ |
346 | ssize_t hci_tty_write(struct file *file, const char __user *data, | 346 | static ssize_t hci_tty_write(struct file *file, const char __user *data, |
347 | size_t size, loff_t *offset) | 347 | size_t size, loff_t *offset) |
348 | { | 348 | { |
349 | struct ti_st *hst = file->private_data; | 349 | struct ti_st *hst = file->private_data; |
diff --git a/drivers/mmc/card/block.c b/drivers/mmc/card/block.c index 3e3557694e55..1b75d8fd1657 100644 --- a/drivers/mmc/card/block.c +++ b/drivers/mmc/card/block.c | |||
@@ -58,6 +58,8 @@ MODULE_ALIAS("mmc:block"); | |||
58 | #define INAND_CMD38_ARG_SECTRIM1 0x81 | 58 | #define INAND_CMD38_ARG_SECTRIM1 0x81 |
59 | #define INAND_CMD38_ARG_SECTRIM2 0x88 | 59 | #define INAND_CMD38_ARG_SECTRIM2 0x88 |
60 | #define MMC_BLK_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */ | 60 | #define MMC_BLK_TIMEOUT_MS (10 * 60 * 1000) /* 10 minute timeout */ |
61 | #define MMC_SANITIZE_REQ_TIMEOUT 240000 | ||
62 | #define MMC_EXTRACT_INDEX_FROM_ARG(x) ((x & 0x00FF0000) >> 16) | ||
61 | 63 | ||
62 | static DEFINE_MUTEX(block_mutex); | 64 | static DEFINE_MUTEX(block_mutex); |
63 | 65 | ||
@@ -390,6 +392,35 @@ static int ioctl_rpmb_card_status_poll(struct mmc_card *card, u32 *status, | |||
390 | return err; | 392 | return err; |
391 | } | 393 | } |
392 | 394 | ||
395 | static int ioctl_do_sanitize(struct mmc_card *card) | ||
396 | { | ||
397 | int err; | ||
398 | |||
399 | if (!(mmc_can_sanitize(card) && | ||
400 | (card->host->caps2 & MMC_CAP2_SANITIZE))) { | ||
401 | pr_warn("%s: %s - SANITIZE is not supported\n", | ||
402 | mmc_hostname(card->host), __func__); | ||
403 | err = -EOPNOTSUPP; | ||
404 | goto out; | ||
405 | } | ||
406 | |||
407 | pr_debug("%s: %s - SANITIZE IN PROGRESS...\n", | ||
408 | mmc_hostname(card->host), __func__); | ||
409 | |||
410 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, | ||
411 | EXT_CSD_SANITIZE_START, 1, | ||
412 | MMC_SANITIZE_REQ_TIMEOUT); | ||
413 | |||
414 | if (err) | ||
415 | pr_err("%s: %s - EXT_CSD_SANITIZE_START failed. err=%d\n", | ||
416 | mmc_hostname(card->host), __func__, err); | ||
417 | |||
418 | pr_debug("%s: %s - SANITIZE COMPLETED\n", mmc_hostname(card->host), | ||
419 | __func__); | ||
420 | out: | ||
421 | return err; | ||
422 | } | ||
423 | |||
393 | static int mmc_blk_ioctl_cmd(struct block_device *bdev, | 424 | static int mmc_blk_ioctl_cmd(struct block_device *bdev, |
394 | struct mmc_ioc_cmd __user *ic_ptr) | 425 | struct mmc_ioc_cmd __user *ic_ptr) |
395 | { | 426 | { |
@@ -492,6 +523,17 @@ static int mmc_blk_ioctl_cmd(struct block_device *bdev, | |||
492 | goto cmd_rel_host; | 523 | goto cmd_rel_host; |
493 | } | 524 | } |
494 | 525 | ||
526 | if ((MMC_EXTRACT_INDEX_FROM_ARG(cmd.arg) == EXT_CSD_SANITIZE_START) && | ||
527 | (cmd.opcode == MMC_SWITCH)) { | ||
528 | err = ioctl_do_sanitize(card); | ||
529 | |||
530 | if (err) | ||
531 | pr_err("%s: ioctl_do_sanitize() failed. err = %d", | ||
532 | __func__, err); | ||
533 | |||
534 | goto cmd_rel_host; | ||
535 | } | ||
536 | |||
495 | mmc_wait_for_req(card->host, &mrq); | 537 | mmc_wait_for_req(card->host, &mrq); |
496 | 538 | ||
497 | if (cmd.error) { | 539 | if (cmd.error) { |
@@ -925,10 +967,10 @@ static int mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, | |||
925 | { | 967 | { |
926 | struct mmc_blk_data *md = mq->data; | 968 | struct mmc_blk_data *md = mq->data; |
927 | struct mmc_card *card = md->queue.card; | 969 | struct mmc_card *card = md->queue.card; |
928 | unsigned int from, nr, arg, trim_arg, erase_arg; | 970 | unsigned int from, nr, arg; |
929 | int err = 0, type = MMC_BLK_SECDISCARD; | 971 | int err = 0, type = MMC_BLK_SECDISCARD; |
930 | 972 | ||
931 | if (!(mmc_can_secure_erase_trim(card) || mmc_can_sanitize(card))) { | 973 | if (!(mmc_can_secure_erase_trim(card))) { |
932 | err = -EOPNOTSUPP; | 974 | err = -EOPNOTSUPP; |
933 | goto out; | 975 | goto out; |
934 | } | 976 | } |
@@ -936,23 +978,11 @@ static int mmc_blk_issue_secdiscard_rq(struct mmc_queue *mq, | |||
936 | from = blk_rq_pos(req); | 978 | from = blk_rq_pos(req); |
937 | nr = blk_rq_sectors(req); | 979 | nr = blk_rq_sectors(req); |
938 | 980 | ||
939 | /* The sanitize operation is supported at v4.5 only */ | 981 | if (mmc_can_trim(card) && !mmc_erase_group_aligned(card, from, nr)) |
940 | if (mmc_can_sanitize(card)) { | 982 | arg = MMC_SECURE_TRIM1_ARG; |
941 | erase_arg = MMC_ERASE_ARG; | 983 | else |
942 | trim_arg = MMC_TRIM_ARG; | 984 | arg = MMC_SECURE_ERASE_ARG; |
943 | } else { | ||
944 | erase_arg = MMC_SECURE_ERASE_ARG; | ||
945 | trim_arg = MMC_SECURE_TRIM1_ARG; | ||
946 | } | ||
947 | 985 | ||
948 | if (mmc_erase_group_aligned(card, from, nr)) | ||
949 | arg = erase_arg; | ||
950 | else if (mmc_can_trim(card)) | ||
951 | arg = trim_arg; | ||
952 | else { | ||
953 | err = -EINVAL; | ||
954 | goto out; | ||
955 | } | ||
956 | retry: | 986 | retry: |
957 | if (card->quirks & MMC_QUIRK_INAND_CMD38) { | 987 | if (card->quirks & MMC_QUIRK_INAND_CMD38) { |
958 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, | 988 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, |
@@ -988,9 +1018,6 @@ retry: | |||
988 | goto out; | 1018 | goto out; |
989 | } | 1019 | } |
990 | 1020 | ||
991 | if (mmc_can_sanitize(card)) | ||
992 | err = mmc_switch(card, EXT_CSD_CMD_SET_NORMAL, | ||
993 | EXT_CSD_SANITIZE_START, 1, 0); | ||
994 | out_retry: | 1021 | out_retry: |
995 | if (err && !mmc_blk_reset(md, card->host, type)) | 1022 | if (err && !mmc_blk_reset(md, card->host, type)) |
996 | goto retry; | 1023 | goto retry; |
diff --git a/drivers/mmc/card/queue.c b/drivers/mmc/card/queue.c index 71b8d7bcdf79..14e36d6a28f6 100644 --- a/drivers/mmc/card/queue.c +++ b/drivers/mmc/card/queue.c | |||
@@ -148,7 +148,7 @@ static void mmc_queue_setup_discard(struct request_queue *q, | |||
148 | /* granularity must not be greater than max. discard */ | 148 | /* granularity must not be greater than max. discard */ |
149 | if (card->pref_erase > max_discard) | 149 | if (card->pref_erase > max_discard) |
150 | q->limits.discard_granularity = 0; | 150 | q->limits.discard_granularity = 0; |
151 | if (mmc_can_secure_erase_trim(card) || mmc_can_sanitize(card)) | 151 | if (mmc_can_secure_erase_trim(card)) |
152 | queue_flag_set_unlocked(QUEUE_FLAG_SECDISCARD, q); | 152 | queue_flag_set_unlocked(QUEUE_FLAG_SECDISCARD, q); |
153 | } | 153 | } |
154 | 154 | ||
diff --git a/drivers/mmc/core/core.c b/drivers/mmc/core/core.c index 039503d53454..1cd78b8d6ab7 100644 --- a/drivers/mmc/core/core.c +++ b/drivers/mmc/core/core.c | |||
@@ -347,6 +347,24 @@ static void mmc_wait_for_req_done(struct mmc_host *host, | |||
347 | wait_for_completion(&mrq->completion); | 347 | wait_for_completion(&mrq->completion); |
348 | 348 | ||
349 | cmd = mrq->cmd; | 349 | cmd = mrq->cmd; |
350 | |||
351 | /* | ||
352 | * If host has timed out waiting for the sanitize | ||
353 | * to complete, card might be still in programming state | ||
354 | * so let's try to bring the card out of programming | ||
355 | * state. | ||
356 | */ | ||
357 | if (cmd->sanitize_busy && cmd->error == -ETIMEDOUT) { | ||
358 | if (!mmc_interrupt_hpi(host->card)) { | ||
359 | pr_warning("%s: %s: Interrupted sanitize\n", | ||
360 | mmc_hostname(host), __func__); | ||
361 | cmd->error = 0; | ||
362 | break; | ||
363 | } else { | ||
364 | pr_err("%s: %s: Failed to interrupt sanitize\n", | ||
365 | mmc_hostname(host), __func__); | ||
366 | } | ||
367 | } | ||
350 | if (!cmd->error || !cmd->retries || | 368 | if (!cmd->error || !cmd->retries || |
351 | mmc_card_removed(host->card)) | 369 | mmc_card_removed(host->card)) |
352 | break; | 370 | break; |
diff --git a/drivers/mmc/core/mmc_ops.c b/drivers/mmc/core/mmc_ops.c index 6d8f7012d73a..7b9fc225301a 100644 --- a/drivers/mmc/core/mmc_ops.c +++ b/drivers/mmc/core/mmc_ops.c | |||
@@ -430,6 +430,8 @@ int __mmc_switch(struct mmc_card *card, u8 set, u8 index, u8 value, | |||
430 | 430 | ||
431 | 431 | ||
432 | cmd.cmd_timeout_ms = timeout_ms; | 432 | cmd.cmd_timeout_ms = timeout_ms; |
433 | if (index == EXT_CSD_SANITIZE_START) | ||
434 | cmd.sanitize_busy = true; | ||
433 | 435 | ||
434 | err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); | 436 | err = mmc_wait_for_cmd(card->host, &cmd, MMC_CMD_RETRIES); |
435 | if (err) | 437 | if (err) |
diff --git a/drivers/mmc/host/omap_hsmmc.c b/drivers/mmc/host/omap_hsmmc.c index 6a1c7c41e3da..aa0440817c50 100644 --- a/drivers/mmc/host/omap_hsmmc.c +++ b/drivers/mmc/host/omap_hsmmc.c | |||
@@ -44,6 +44,7 @@ | |||
44 | /* OMAP HSMMC Host Controller Registers */ | 44 | /* OMAP HSMMC Host Controller Registers */ |
45 | #define OMAP_HSMMC_SYSSTATUS 0x0014 | 45 | #define OMAP_HSMMC_SYSSTATUS 0x0014 |
46 | #define OMAP_HSMMC_CON 0x002C | 46 | #define OMAP_HSMMC_CON 0x002C |
47 | #define OMAP_HSMMC_SDMASA 0x0100 | ||
47 | #define OMAP_HSMMC_BLK 0x0104 | 48 | #define OMAP_HSMMC_BLK 0x0104 |
48 | #define OMAP_HSMMC_ARG 0x0108 | 49 | #define OMAP_HSMMC_ARG 0x0108 |
49 | #define OMAP_HSMMC_CMD 0x010C | 50 | #define OMAP_HSMMC_CMD 0x010C |
@@ -57,7 +58,9 @@ | |||
57 | #define OMAP_HSMMC_STAT 0x0130 | 58 | #define OMAP_HSMMC_STAT 0x0130 |
58 | #define OMAP_HSMMC_IE 0x0134 | 59 | #define OMAP_HSMMC_IE 0x0134 |
59 | #define OMAP_HSMMC_ISE 0x0138 | 60 | #define OMAP_HSMMC_ISE 0x0138 |
61 | #define OMAP_HSMMC_AC12 0x013C | ||
60 | #define OMAP_HSMMC_CAPA 0x0140 | 62 | #define OMAP_HSMMC_CAPA 0x0140 |
63 | #define OMAP_HSMMC_REV 0x01FC | ||
61 | 64 | ||
62 | #define VS18 (1 << 26) | 65 | #define VS18 (1 << 26) |
63 | #define VS30 (1 << 25) | 66 | #define VS30 (1 << 25) |
@@ -79,6 +82,8 @@ | |||
79 | #define DTO_MASK 0x000F0000 | 82 | #define DTO_MASK 0x000F0000 |
80 | #define DTO_SHIFT 16 | 83 | #define DTO_SHIFT 16 |
81 | #define INIT_STREAM (1 << 1) | 84 | #define INIT_STREAM (1 << 1) |
85 | #define ACEN_ACMD12 (1 << 2) | ||
86 | #define ACEN_ACMD23 (2 << 2) | ||
82 | #define DP_SELECT (1 << 21) | 87 | #define DP_SELECT (1 << 21) |
83 | #define DDIR (1 << 4) | 88 | #define DDIR (1 << 4) |
84 | #define DMAE 0x1 | 89 | #define DMAE 0x1 |
@@ -110,6 +115,7 @@ | |||
110 | #define DTO_EN (1 << 20) | 115 | #define DTO_EN (1 << 20) |
111 | #define DCRC_EN (1 << 21) | 116 | #define DCRC_EN (1 << 21) |
112 | #define DEB_EN (1 << 22) | 117 | #define DEB_EN (1 << 22) |
118 | #define ACE_EN (1 << 24) | ||
113 | #define CERR_EN (1 << 28) | 119 | #define CERR_EN (1 << 28) |
114 | #define BADA_EN (1 << 29) | 120 | #define BADA_EN (1 << 29) |
115 | 121 | ||
@@ -117,12 +123,26 @@ | |||
117 | DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \ | 123 | DTO_EN | CIE_EN | CEB_EN | CCRC_EN | CTO_EN | \ |
118 | BRR_EN | BWR_EN | TC_EN | CC_EN) | 124 | BRR_EN | BWR_EN | TC_EN | CC_EN) |
119 | 125 | ||
126 | #define CNI (1 << 7) | ||
127 | #define ACIE (1 << 4) | ||
128 | #define ACEB (1 << 3) | ||
129 | #define ACCE (1 << 2) | ||
130 | #define ACTO (1 << 1) | ||
131 | #define ACNE (1 << 0) | ||
132 | |||
120 | #define MMC_AUTOSUSPEND_DELAY 100 | 133 | #define MMC_AUTOSUSPEND_DELAY 100 |
121 | #define MMC_TIMEOUT_MS 20 | 134 | #define MMC_TIMEOUT_MS 20 |
122 | #define OMAP_MMC_MIN_CLOCK 400000 | 135 | #define OMAP_MMC_MIN_CLOCK 400000 |
123 | #define OMAP_MMC_MAX_CLOCK 52000000 | 136 | #define OMAP_MMC_MAX_CLOCK 52000000 |
124 | #define DRIVER_NAME "omap_hsmmc" | 137 | #define DRIVER_NAME "omap_hsmmc" |
125 | 138 | ||
139 | #define AUTO_CMD12 (1 << 0) /* Auto CMD12 support */ | ||
140 | #define AUTO_CMD23 (1 << 1) /* Auto CMD23 support */ | ||
141 | |||
142 | #define OMAP_HSMMC_REV_SHIFT 24 | ||
143 | /* HSMMC controller revision on OMAP5, DRA7 */ | ||
144 | #define OMAP_HSMMC_REV_33 0x33 | ||
145 | |||
126 | /* | 146 | /* |
127 | * One controller can have multiple slots, like on some omap boards using | 147 | * One controller can have multiple slots, like on some omap boards using |
128 | * omap.c controller driver. Luckily this is not currently done on any known | 148 | * omap.c controller driver. Luckily this is not currently done on any known |
@@ -180,11 +200,20 @@ struct omap_hsmmc_host { | |||
180 | int reqs_blocked; | 200 | int reqs_blocked; |
181 | int use_reg; | 201 | int use_reg; |
182 | int req_in_progress; | 202 | int req_in_progress; |
203 | unsigned long clk_rate; | ||
204 | unsigned int flags; | ||
183 | struct omap_hsmmc_next next_data; | 205 | struct omap_hsmmc_next next_data; |
184 | 206 | ||
185 | struct omap_mmc_platform_data *pdata; | 207 | struct omap_mmc_platform_data *pdata; |
186 | }; | 208 | }; |
187 | 209 | ||
210 | static int | ||
211 | omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req); | ||
212 | |||
213 | static void set_data_timeout(struct omap_hsmmc_host *host, | ||
214 | unsigned int timeout_ns, | ||
215 | unsigned int timeout_clks); | ||
216 | |||
188 | static int omap_hsmmc_card_detect(struct device *dev, int slot) | 217 | static int omap_hsmmc_card_detect(struct device *dev, int slot) |
189 | { | 218 | { |
190 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); | 219 | struct omap_hsmmc_host *host = dev_get_drvdata(dev); |
@@ -765,7 +794,7 @@ static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); | |||
765 | */ | 794 | */ |
766 | static void | 795 | static void |
767 | omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, | 796 | omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, |
768 | struct mmc_data *data) | 797 | struct mmc_data *data, bool autocmd12) |
769 | { | 798 | { |
770 | int cmdreg = 0, resptype = 0, cmdtype = 0; | 799 | int cmdreg = 0, resptype = 0, cmdtype = 0; |
771 | 800 | ||
@@ -795,6 +824,13 @@ omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, | |||
795 | cmdtype = 0x3; | 824 | cmdtype = 0x3; |
796 | 825 | ||
797 | cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); | 826 | cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); |
827 | if ((host->flags & AUTO_CMD23) && mmc_op_multi(cmd->opcode) && | ||
828 | host->mrq->sbc) { | ||
829 | cmdreg |= ACEN_ACMD23; | ||
830 | OMAP_HSMMC_WRITE(host->base, SDMASA, host->mrq->sbc->arg); | ||
831 | } else if ((host->flags & AUTO_CMD12) && mmc_op_multi(cmd->opcode) && | ||
832 | autocmd12) | ||
833 | cmdreg |= ACEN_ACMD12; | ||
798 | 834 | ||
799 | if (data) { | 835 | if (data) { |
800 | cmdreg |= DP_SELECT | MSBS | BCE; | 836 | cmdreg |= DP_SELECT | MSBS | BCE; |
@@ -873,11 +909,38 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) | |||
873 | else | 909 | else |
874 | data->bytes_xfered = 0; | 910 | data->bytes_xfered = 0; |
875 | 911 | ||
876 | if (!data->stop) { | 912 | if (data->stop && (data->error || (!(host->flags & AUTO_CMD12) && |
913 | !host->mrq->sbc))) { | ||
914 | /* | ||
915 | * If there is any error or open-end read/write with autocmd12 | ||
916 | * disabled | ||
917 | */ | ||
918 | omap_hsmmc_start_command(host, data->stop, NULL, 0); | ||
919 | } else { | ||
920 | /* status update for autocmd12 of open-end read/write */ | ||
921 | if (data->stop && !host->mrq->sbc) | ||
922 | data->stop->resp[0] = OMAP_HSMMC_READ(host->base, | ||
923 | RSP76); | ||
877 | omap_hsmmc_request_done(host, data->mrq); | 924 | omap_hsmmc_request_done(host, data->mrq); |
878 | return; | ||
879 | } | 925 | } |
880 | omap_hsmmc_start_command(host, data->stop, NULL); | 926 | |
927 | return; | ||
928 | } | ||
929 | |||
930 | static void omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host) | ||
931 | { | ||
932 | struct mmc_request *req; | ||
933 | struct dma_chan *chan; | ||
934 | req = host->mrq; | ||
935 | |||
936 | if (!req->data) | ||
937 | return; | ||
938 | OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) | ||
939 | | (req->data->blocks << 16)); | ||
940 | set_data_timeout(host, req->data->timeout_ns, | ||
941 | req->data->timeout_clks); | ||
942 | chan = omap_hsmmc_get_dma_chan(host, req->data); | ||
943 | dma_async_issue_pending(chan); | ||
881 | } | 944 | } |
882 | 945 | ||
883 | /* | 946 | /* |
@@ -886,6 +949,18 @@ omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) | |||
886 | static void | 949 | static void |
887 | omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) | 950 | omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) |
888 | { | 951 | { |
952 | struct mmc_request *req; | ||
953 | req = host->mrq; | ||
954 | |||
955 | if (host->mrq->sbc && (host->cmd == host->mrq->sbc) && | ||
956 | !host->mrq->sbc->error && !(host->flags & AUTO_CMD23)) { | ||
957 | host->cmd = NULL; | ||
958 | omap_hsmmc_start_dma_transfer(host); | ||
959 | omap_hsmmc_start_command(host, host->mrq->cmd, | ||
960 | host->mrq->data, 0); | ||
961 | return; | ||
962 | } | ||
963 | |||
889 | host->cmd = NULL; | 964 | host->cmd = NULL; |
890 | 965 | ||
891 | if (cmd->flags & MMC_RSP_PRESENT) { | 966 | if (cmd->flags & MMC_RSP_PRESENT) { |
@@ -1025,6 +1100,7 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | |||
1025 | { | 1100 | { |
1026 | struct mmc_data *data; | 1101 | struct mmc_data *data; |
1027 | int end_cmd = 0, end_trans = 0; | 1102 | int end_cmd = 0, end_trans = 0; |
1103 | int error = 0; | ||
1028 | 1104 | ||
1029 | data = host->data; | 1105 | data = host->data; |
1030 | dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); | 1106 | dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); |
@@ -1039,6 +1115,29 @@ static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) | |||
1039 | else if (status & (CCRC_EN | DCRC_EN)) | 1115 | else if (status & (CCRC_EN | DCRC_EN)) |
1040 | hsmmc_command_incomplete(host, -EILSEQ, end_cmd); | 1116 | hsmmc_command_incomplete(host, -EILSEQ, end_cmd); |
1041 | 1117 | ||
1118 | if (status & ACE_EN) { | ||
1119 | u32 ac12; | ||
1120 | ac12 = OMAP_HSMMC_READ(host->base, AC12); | ||
1121 | if (!(ac12 & ACNE) && host->mrq->sbc) { | ||
1122 | end_cmd = 1; | ||
1123 | if (ac12 & ACTO) | ||
1124 | error = -ETIMEDOUT; | ||
1125 | else if (ac12 & (ACCE | ACEB | ACIE)) | ||
1126 | error = -EILSEQ; | ||
1127 | host->mrq->sbc->error = error; | ||
1128 | hsmmc_command_incomplete(host, error, end_cmd); | ||
1129 | } | ||
1130 | if (!(ac12 & ACNE) && !host->mrq->sbc && | ||
1131 | host->mrq->data) { | ||
1132 | end_trans = 1; | ||
1133 | if (ac12 & ACTO) | ||
1134 | host->mrq->data->error = -ETIMEDOUT; | ||
1135 | else if (ac12 & (ACCE | ACEB | ACIE)) | ||
1136 | host->mrq->data->error = -EILSEQ; | ||
1137 | omap_hsmmc_reset_controller_fsm(host, SRC); | ||
1138 | } | ||
1139 | dev_dbg(mmc_dev(host->mmc), "AC12 err: 0x%x\n", ac12); | ||
1140 | } | ||
1042 | if (host->data || host->response_busy) { | 1141 | if (host->data || host->response_busy) { |
1043 | end_trans = !end_cmd; | 1142 | end_trans = !end_cmd; |
1044 | host->response_busy = 0; | 1143 | host->response_busy = 0; |
@@ -1275,7 +1374,7 @@ static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, | |||
1275 | /* | 1374 | /* |
1276 | * Routine to configure and start DMA for the MMC card | 1375 | * Routine to configure and start DMA for the MMC card |
1277 | */ | 1376 | */ |
1278 | static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | 1377 | static int omap_hsmmc_setup_dma_transfer(struct omap_hsmmc_host *host, |
1279 | struct mmc_request *req) | 1378 | struct mmc_request *req) |
1280 | { | 1379 | { |
1281 | struct dma_slave_config cfg; | 1380 | struct dma_slave_config cfg; |
@@ -1334,8 +1433,6 @@ static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, | |||
1334 | 1433 | ||
1335 | host->dma_ch = 1; | 1434 | host->dma_ch = 1; |
1336 | 1435 | ||
1337 | dma_async_issue_pending(chan); | ||
1338 | |||
1339 | return 0; | 1436 | return 0; |
1340 | } | 1437 | } |
1341 | 1438 | ||
@@ -1351,7 +1448,7 @@ static void set_data_timeout(struct omap_hsmmc_host *host, | |||
1351 | if (clkd == 0) | 1448 | if (clkd == 0) |
1352 | clkd = 1; | 1449 | clkd = 1; |
1353 | 1450 | ||
1354 | cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); | 1451 | cycle_ns = 1000000000 / (host->clk_rate / clkd); |
1355 | timeout = timeout_ns / cycle_ns; | 1452 | timeout = timeout_ns / cycle_ns; |
1356 | timeout += timeout_clks; | 1453 | timeout += timeout_clks; |
1357 | if (timeout) { | 1454 | if (timeout) { |
@@ -1396,12 +1493,8 @@ omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) | |||
1396 | return 0; | 1493 | return 0; |
1397 | } | 1494 | } |
1398 | 1495 | ||
1399 | OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) | ||
1400 | | (req->data->blocks << 16)); | ||
1401 | set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); | ||
1402 | |||
1403 | if (host->use_dma) { | 1496 | if (host->use_dma) { |
1404 | ret = omap_hsmmc_start_dma_transfer(host, req); | 1497 | ret = omap_hsmmc_setup_dma_transfer(host, req); |
1405 | if (ret != 0) { | 1498 | if (ret != 0) { |
1406 | dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); | 1499 | dev_err(mmc_dev(host->mmc), "MMC start dma failure\n"); |
1407 | return ret; | 1500 | return ret; |
@@ -1475,6 +1568,7 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | |||
1475 | host->reqs_blocked = 0; | 1568 | host->reqs_blocked = 0; |
1476 | WARN_ON(host->mrq != NULL); | 1569 | WARN_ON(host->mrq != NULL); |
1477 | host->mrq = req; | 1570 | host->mrq = req; |
1571 | host->clk_rate = clk_get_rate(host->fclk); | ||
1478 | err = omap_hsmmc_prepare_data(host, req); | 1572 | err = omap_hsmmc_prepare_data(host, req); |
1479 | if (err) { | 1573 | if (err) { |
1480 | req->cmd->error = err; | 1574 | req->cmd->error = err; |
@@ -1484,8 +1578,12 @@ static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) | |||
1484 | mmc_request_done(mmc, req); | 1578 | mmc_request_done(mmc, req); |
1485 | return; | 1579 | return; |
1486 | } | 1580 | } |
1487 | 1581 | if (req->sbc && !(host->flags & AUTO_CMD23)) { | |
1488 | omap_hsmmc_start_command(host, req->cmd, req->data); | 1582 | omap_hsmmc_start_command(host, req->sbc, NULL, 0); |
1583 | return; | ||
1584 | } | ||
1585 | omap_hsmmc_start_dma_transfer(host); | ||
1586 | omap_hsmmc_start_command(host, req->cmd, req->data, 1); | ||
1489 | } | 1587 | } |
1490 | 1588 | ||
1491 | /* Routine to configure clock values. Exposed API to core */ | 1589 | /* Routine to configure clock values. Exposed API to core */ |
@@ -1782,6 +1880,7 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1782 | unsigned tx_req, rx_req; | 1880 | unsigned tx_req, rx_req; |
1783 | struct dmaengine_chan_caps *dma_chan_caps; | 1881 | struct dmaengine_chan_caps *dma_chan_caps; |
1784 | struct pinctrl *pinctrl; | 1882 | struct pinctrl *pinctrl; |
1883 | u32 revision; | ||
1785 | 1884 | ||
1786 | match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); | 1885 | match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); |
1787 | if (match) { | 1886 | if (match) { |
@@ -1977,6 +2076,12 @@ static int omap_hsmmc_probe(struct platform_device *pdev) | |||
1977 | host->use_reg = 1; | 2076 | host->use_reg = 1; |
1978 | } | 2077 | } |
1979 | 2078 | ||
2079 | revision = OMAP_HSMMC_READ(host->base, REV); | ||
2080 | if ((revision >> OMAP_HSMMC_REV_SHIFT) >= OMAP_HSMMC_REV_33) { | ||
2081 | mmc->caps |= MMC_CAP_CMD23; | ||
2082 | host->flags |= AUTO_CMD23 | AUTO_CMD12; | ||
2083 | } | ||
2084 | |||
1980 | mmc->ocr_avail = mmc_slot(host).ocr_mask; | 2085 | mmc->ocr_avail = mmc_slot(host).ocr_mask; |
1981 | 2086 | ||
1982 | /* Request IRQ for card detect */ | 2087 | /* Request IRQ for card detect */ |
diff --git a/drivers/mtd/onenand/omap2.c b/drivers/mtd/onenand/omap2.c index 065f3fe02a2f..b63b95d878b6 100644 --- a/drivers/mtd/onenand/omap2.c +++ b/drivers/mtd/onenand/omap2.c | |||
@@ -589,7 +589,7 @@ static int __adjust_timing(struct device *dev, void *data) | |||
589 | return ret; | 589 | return ret; |
590 | } | 590 | } |
591 | 591 | ||
592 | int omap2_onenand_rephase(void) | 592 | static int omap2_onenand_rephase(void) |
593 | { | 593 | { |
594 | return driver_for_each_device(&omap2_onenand_driver.driver, NULL, | 594 | return driver_for_each_device(&omap2_onenand_driver.driver, NULL, |
595 | NULL, __adjust_timing); | 595 | NULL, __adjust_timing); |
diff --git a/drivers/net/can/c_can/c_can_platform.c b/drivers/net/can/c_can/c_can_platform.c index 84c1e915eb9e..37323b5b52af 100644 --- a/drivers/net/can/c_can/c_can_platform.c +++ b/drivers/net/can/c_can/c_can_platform.c | |||
@@ -92,7 +92,7 @@ static void c_can_hw_raminit_dra7(const struct c_can_priv *priv, bool enable) | |||
92 | { | 92 | { |
93 | u32 start_set, start_clr; | 93 | u32 start_set, start_clr; |
94 | DEFINE_SPINLOCK(raminit_lock); | 94 | DEFINE_SPINLOCK(raminit_lock); |
95 | unsigned long flags; | 95 | unsigned long flags = 0; |
96 | 96 | ||
97 | start_set = start_clr = readl(priv->raminit_ctrlreg); | 97 | start_set = start_clr = readl(priv->raminit_ctrlreg); |
98 | start_set |= CAN_RAMINIT_BIT_MASK(priv->raminit_bits.start); | 98 | start_set |= CAN_RAMINIT_BIT_MASK(priv->raminit_bits.start); |
diff --git a/drivers/regulator/ti-avs-class0-regulator.c b/drivers/regulator/ti-avs-class0-regulator.c index 3ccba8a3bf90..efbfe19cb54d 100644 --- a/drivers/regulator/ti-avs-class0-regulator.c +++ b/drivers/regulator/ti-avs-class0-regulator.c | |||
@@ -261,6 +261,13 @@ static int tiavs_class0_probe(struct platform_device *pdev) | |||
261 | readl(base + efuse_offset) : | 261 | readl(base + efuse_offset) : |
262 | readw(base + efuse_offset) * 1000; | 262 | readw(base + efuse_offset) * 1000; |
263 | 263 | ||
264 | /* Handle efuse == 0 Case */ | ||
265 | if (data->volt_set_table[i] == 0) { | ||
266 | dev_err(&pdev->dev, "efuse=0 @ 0x%08x reverting to device tree bindings volt_table=%d\n", | ||
267 | (base + efuse_offset), volt_table[i]); | ||
268 | data->volt_set_table[i] = volt_table[i]; | ||
269 | } | ||
270 | |||
264 | /* Find min/max for the voltage sets */ | 271 | /* Find min/max for the voltage sets */ |
265 | if (min_uV > volt_table[i]) | 272 | if (min_uV > volt_table[i]) |
266 | min_uV = volt_table[i]; | 273 | min_uV = volt_table[i]; |
diff --git a/drivers/remoteproc/Kconfig b/drivers/remoteproc/Kconfig index 9bcbd3a54c8c..89e7e53dedb6 100644 --- a/drivers/remoteproc/Kconfig +++ b/drivers/remoteproc/Kconfig | |||
@@ -116,6 +116,18 @@ config OMAP_REMOTEPROC_DSP2 | |||
116 | audio or any other algorithm (by DSP) or just want a bare minimum | 116 | audio or any other algorithm (by DSP) or just want a bare minimum |
117 | kernel. | 117 | kernel. |
118 | 118 | ||
119 | config OMAP_REMOTEPROC_WATCHDOG | ||
120 | bool "OMAP remoteproc watchdog timer" | ||
121 | depends on OMAP_REMOTEPROC_IPU || OMAP_REMOTEPROC_DSP || OMAP_REMOTEPROC_IPU1 || OMAP_REMOTEPROC_DSP2 | ||
122 | default n | ||
123 | help | ||
124 | Say Y here to enable watchdog timer for remote processors. | ||
125 | |||
126 | This option controls the watchdog functionality for the remote | ||
127 | processors in OMAP. Dedicated timers are used by the remote | ||
128 | processors and triggers the timer interrupt upon a watchdog | ||
129 | detection. | ||
130 | |||
119 | config STE_MODEM_RPROC | 131 | config STE_MODEM_RPROC |
120 | tristate "STE-Modem remoteproc support" | 132 | tristate "STE-Modem remoteproc support" |
121 | depends on HAS_DMA | 133 | depends on HAS_DMA |
diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index fdba982cb4a0..efc89ccea973 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c | |||
@@ -74,8 +74,12 @@ static int omap_rproc_mbox_callback(struct notifier_block *this, | |||
74 | 74 | ||
75 | switch (msg_data) { | 75 | switch (msg_data) { |
76 | case RP_MBOX_CRASH: | 76 | case RP_MBOX_CRASH: |
77 | /* just log this for now. later, we'll also do recovery */ | 77 | /* |
78 | * remoteproc detected an exception, notify the rproc core. | ||
79 | * The remoteproc core will handle the recovery. | ||
80 | */ | ||
78 | dev_err(dev, "omap rproc %s crashed\n", name); | 81 | dev_err(dev, "omap rproc %s crashed\n", name); |
82 | rproc_report_crash(oproc->rproc, RPROC_EXCEPTION); | ||
79 | break; | 83 | break; |
80 | case RP_MBOX_ECHO_REPLY: | 84 | case RP_MBOX_ECHO_REPLY: |
81 | dev_info(dev, "received echo reply from %s\n", name); | 85 | dev_info(dev, "received echo reply from %s\n", name); |
@@ -234,6 +238,7 @@ static int omap_rproc_probe(struct platform_device *pdev) | |||
234 | oproc = rproc->priv; | 238 | oproc = rproc->priv; |
235 | oproc->rproc = rproc; | 239 | oproc->rproc = rproc; |
236 | 240 | ||
241 | pdata->report_watchdog = rproc_report_crash; | ||
237 | platform_set_drvdata(pdev, rproc); | 242 | platform_set_drvdata(pdev, rproc); |
238 | 243 | ||
239 | ret = rproc_add(rproc); | 244 | ret = rproc_add(rproc); |
diff --git a/drivers/remoteproc/remoteproc_core.c b/drivers/remoteproc/remoteproc_core.c index 486776e9f8b2..e00c09ea460e 100644 --- a/drivers/remoteproc/remoteproc_core.c +++ b/drivers/remoteproc/remoteproc_core.c | |||
@@ -41,6 +41,7 @@ | |||
41 | #include <linux/virtio_ids.h> | 41 | #include <linux/virtio_ids.h> |
42 | #include <linux/virtio_ring.h> | 42 | #include <linux/virtio_ring.h> |
43 | #include <linux/platform_device.h> | 43 | #include <linux/platform_device.h> |
44 | #include <linux/vmalloc.h> | ||
44 | #include <asm/byteorder.h> | 45 | #include <asm/byteorder.h> |
45 | 46 | ||
46 | #include "remoteproc_internal.h" | 47 | #include "remoteproc_internal.h" |
@@ -55,6 +56,8 @@ static DEFINE_IDA(rproc_dev_index); | |||
55 | 56 | ||
56 | static const char * const rproc_crash_names[] = { | 57 | static const char * const rproc_crash_names[] = { |
57 | [RPROC_MMUFAULT] = "mmufault", | 58 | [RPROC_MMUFAULT] = "mmufault", |
59 | [RPROC_WATCHDOG] = "watchdog", | ||
60 | [RPROC_EXCEPTION] = "device exception", | ||
58 | }; | 61 | }; |
59 | 62 | ||
60 | /* translate rproc_crash_type to string */ | 63 | /* translate rproc_crash_type to string */ |
@@ -423,6 +426,103 @@ free_rvdev: | |||
423 | } | 426 | } |
424 | 427 | ||
425 | /** | 428 | /** |
429 | * rproc_handle_last_trace() - setup a buffer to capture the trace snapshot | ||
430 | * before recovery | ||
431 | * @rproc: the remote processor | ||
432 | * @trace: the trace resource descriptor | ||
433 | * @count: the index of the trace under process | ||
434 | * | ||
435 | * The last trace is allocated and the contents of the trace buffer are | ||
436 | * copied during a recovery cleanup. Once, the contents get copied, the | ||
437 | * trace buffers are cleaned up for re-use. | ||
438 | * | ||
439 | * It might also happen that the remoteproc binary changes between the | ||
440 | * time that it was loaded and the time that it crashed. In this case, | ||
441 | * the trace descriptors might have changed too. The last traces are | ||
442 | * re-built as required in this case. | ||
443 | * | ||
444 | * Returns 0 on success, or an appropriate error code otherwise | ||
445 | */ | ||
446 | static int rproc_handle_last_trace(struct rproc *rproc, | ||
447 | struct rproc_mem_entry *trace, int count) | ||
448 | { | ||
449 | struct rproc_mem_entry *trace_last, *tmp_trace; | ||
450 | struct device *dev = &rproc->dev; | ||
451 | char name[15]; | ||
452 | int i = 0; | ||
453 | bool new_trace = false; | ||
454 | |||
455 | if (!rproc || !trace) | ||
456 | return -EINVAL; | ||
457 | |||
458 | /* we need a new trace in this case */ | ||
459 | if (count > rproc->num_last_traces) { | ||
460 | new_trace = true; | ||
461 | /* | ||
462 | * make sure snprintf always null terminates, even if truncating | ||
463 | */ | ||
464 | snprintf(name, sizeof(name), "trace%d_last", (count - 1)); | ||
465 | trace_last = kzalloc(sizeof(*trace_last), GFP_KERNEL); | ||
466 | if (!trace_last) { | ||
467 | dev_err(dev, "kzalloc failed for trace%d_last\n", | ||
468 | count); | ||
469 | return -ENOMEM; | ||
470 | } | ||
471 | } else { | ||
472 | /* try to reuse buffers here */ | ||
473 | list_for_each_entry_safe(trace_last, tmp_trace, | ||
474 | &rproc->last_traces, node) { | ||
475 | if (++i == count) | ||
476 | break; | ||
477 | } | ||
478 | |||
479 | /* if we can reuse the trace, copy buffer and exit */ | ||
480 | if (trace_last->len == trace->len) | ||
481 | goto copy_and_exit; | ||
482 | |||
483 | /* can reuse the trace struct but not the buffer */ | ||
484 | vfree(trace_last->va); | ||
485 | trace_last->va = NULL; | ||
486 | trace_last->len = 0; | ||
487 | } | ||
488 | |||
489 | trace_last->len = trace->len; | ||
490 | trace_last->va = vmalloc(sizeof(u32) * trace_last->len); | ||
491 | if (!trace_last->va) { | ||
492 | dev_err(dev, "vmalloc failed for trace%d_last\n", count); | ||
493 | if (!new_trace) { | ||
494 | list_del(&trace_last->node); | ||
495 | rproc->num_last_traces--; | ||
496 | } | ||
497 | kfree(trace_last); | ||
498 | return -ENOMEM; | ||
499 | } | ||
500 | |||
501 | /* create the debugfs entry */ | ||
502 | if (new_trace) { | ||
503 | trace_last->priv = rproc_create_trace_file(name, rproc, | ||
504 | trace_last); | ||
505 | if (!trace_last->priv) { | ||
506 | dev_err(dev, "trace%d_last create debugfs failed\n", | ||
507 | count); | ||
508 | vfree(trace_last->va); | ||
509 | kfree(trace_last); | ||
510 | return -EINVAL; | ||
511 | } | ||
512 | |||
513 | /* add it to the trace list */ | ||
514 | list_add_tail(&trace_last->node, &rproc->last_traces); | ||
515 | rproc->num_last_traces++; | ||
516 | } | ||
517 | |||
518 | copy_and_exit: | ||
519 | /* copy the trace to last trace */ | ||
520 | memcpy(trace_last->va, trace->va, trace->len); | ||
521 | |||
522 | return 0; | ||
523 | } | ||
524 | |||
525 | /** | ||
426 | * rproc_handle_trace() - handle a shared trace buffer resource | 526 | * rproc_handle_trace() - handle a shared trace buffer resource |
427 | * @rproc: the remote processor | 527 | * @rproc: the remote processor |
428 | * @rsc: the trace resource descriptor | 528 | * @rsc: the trace resource descriptor |
@@ -883,6 +983,18 @@ rproc_handle_fw_version(struct rproc *rproc, const char *version, int versz) | |||
883 | } | 983 | } |
884 | 984 | ||
885 | /** | 985 | /** |
986 | * rproc_free_last_trace() - helper function to cleanup a last trace entry | ||
987 | * @trace: the last trace element to be cleaned up | ||
988 | */ | ||
989 | static void rproc_free_last_trace(struct rproc_mem_entry *trace) | ||
990 | { | ||
991 | rproc_remove_trace_file(trace->priv); | ||
992 | list_del(&trace->node); | ||
993 | vfree(trace->va); | ||
994 | kfree(trace); | ||
995 | } | ||
996 | |||
997 | /** | ||
886 | * rproc_resource_cleanup() - clean up and free all acquired resources | 998 | * rproc_resource_cleanup() - clean up and free all acquired resources |
887 | * @rproc: rproc handle | 999 | * @rproc: rproc handle |
888 | * | 1000 | * |
@@ -893,14 +1005,32 @@ static void rproc_resource_cleanup(struct rproc *rproc) | |||
893 | { | 1005 | { |
894 | struct rproc_mem_entry *entry, *tmp; | 1006 | struct rproc_mem_entry *entry, *tmp; |
895 | struct device *dev = &rproc->dev; | 1007 | struct device *dev = &rproc->dev; |
1008 | int count = 0, i = rproc->num_traces; | ||
896 | 1009 | ||
897 | /* clean up debugfs trace entries */ | 1010 | /* clean up debugfs trace entries */ |
898 | list_for_each_entry_safe(entry, tmp, &rproc->traces, node) { | 1011 | list_for_each_entry_safe(entry, tmp, &rproc->traces, node) { |
1012 | /* handle last trace here */ | ||
1013 | if (rproc->state == RPROC_CRASHED) | ||
1014 | rproc_handle_last_trace(rproc, entry, ++count); | ||
1015 | |||
899 | rproc_remove_trace_file(entry->priv); | 1016 | rproc_remove_trace_file(entry->priv); |
900 | rproc->num_traces--; | ||
901 | list_del(&entry->node); | 1017 | list_del(&entry->node); |
902 | kfree(entry); | 1018 | kfree(entry); |
903 | } | 1019 | } |
1020 | rproc->num_traces = 0; | ||
1021 | |||
1022 | /* | ||
1023 | * clean up debugfs last trace entries. This either deletes all last | ||
1024 | * trace entries during cleanup or just the remaining entries, if any, | ||
1025 | * in case of a crash. | ||
1026 | */ | ||
1027 | list_for_each_entry_safe(entry, tmp, &rproc->last_traces, node) { | ||
1028 | /* skip the valid traces */ | ||
1029 | if ((i--) && (rproc->state == RPROC_CRASHED)) | ||
1030 | continue; | ||
1031 | rproc_free_last_trace(entry); | ||
1032 | rproc->num_last_traces--; | ||
1033 | } | ||
904 | 1034 | ||
905 | /* clean up iommu mapping entries */ | 1035 | /* clean up iommu mapping entries */ |
906 | list_for_each_entry_safe(entry, tmp, &rproc->mappings, node) { | 1036 | list_for_each_entry_safe(entry, tmp, &rproc->mappings, node) { |
@@ -1410,9 +1540,16 @@ EXPORT_SYMBOL(rproc_add); | |||
1410 | static void rproc_type_release(struct device *dev) | 1540 | static void rproc_type_release(struct device *dev) |
1411 | { | 1541 | { |
1412 | struct rproc *rproc = container_of(dev, struct rproc, dev); | 1542 | struct rproc *rproc = container_of(dev, struct rproc, dev); |
1543 | struct rproc_mem_entry *entry, *tmp; | ||
1413 | 1544 | ||
1414 | dev_info(&rproc->dev, "releasing %s\n", rproc->name); | 1545 | dev_info(&rproc->dev, "releasing %s\n", rproc->name); |
1415 | 1546 | ||
1547 | /* clean up debugfs last trace entries */ | ||
1548 | list_for_each_entry_safe(entry, tmp, &rproc->last_traces, node) { | ||
1549 | rproc_free_last_trace(entry); | ||
1550 | rproc->num_last_traces--; | ||
1551 | } | ||
1552 | |||
1416 | rproc_delete_debug_dir(rproc); | 1553 | rproc_delete_debug_dir(rproc); |
1417 | 1554 | ||
1418 | idr_remove_all(&rproc->notifyids); | 1555 | idr_remove_all(&rproc->notifyids); |
@@ -1518,6 +1655,7 @@ struct rproc *rproc_alloc(struct device *dev, const char *name, | |||
1518 | INIT_LIST_HEAD(&rproc->carveouts); | 1655 | INIT_LIST_HEAD(&rproc->carveouts); |
1519 | INIT_LIST_HEAD(&rproc->mappings); | 1656 | INIT_LIST_HEAD(&rproc->mappings); |
1520 | INIT_LIST_HEAD(&rproc->traces); | 1657 | INIT_LIST_HEAD(&rproc->traces); |
1658 | INIT_LIST_HEAD(&rproc->last_traces); | ||
1521 | INIT_LIST_HEAD(&rproc->rvdevs); | 1659 | INIT_LIST_HEAD(&rproc->rvdevs); |
1522 | 1660 | ||
1523 | INIT_WORK(&rproc->crash_handler, rproc_crash_handler_work); | 1661 | INIT_WORK(&rproc->crash_handler, rproc_crash_handler_work); |
diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c index 0ae155be9c89..8a5ee1a9a9fa 100644 --- a/drivers/video/backlight/generic_bl.c +++ b/drivers/video/backlight/generic_bl.c | |||
@@ -58,7 +58,7 @@ static int genericbl_get_intensity(struct backlight_device *bd) | |||
58 | * Called when the battery is low to limit the backlight intensity. | 58 | * Called when the battery is low to limit the backlight intensity. |
59 | * If limit==0 clear any limit, otherwise limit the intensity | 59 | * If limit==0 clear any limit, otherwise limit the intensity |
60 | */ | 60 | */ |
61 | void genericbl_limit_intensity(int limit) | 61 | static void genericbl_limit_intensity(int limit) |
62 | { | 62 | { |
63 | struct backlight_device *bd = generic_backlight_device; | 63 | struct backlight_device *bd = generic_backlight_device; |
64 | 64 | ||
diff --git a/drivers/video/omap2/displays/panel-tfcs9700.c b/drivers/video/omap2/displays/panel-tfcs9700.c index f746c2d92dc2..a17c723f1654 100644 --- a/drivers/video/omap2/displays/panel-tfcs9700.c +++ b/drivers/video/omap2/displays/panel-tfcs9700.c | |||
@@ -399,7 +399,7 @@ static struct omap_dss_driver tfc_s9700_driver = { | |||
399 | }, | 399 | }, |
400 | }; | 400 | }; |
401 | 401 | ||
402 | struct regmap_config tlc59108_regmap_config = { | 402 | static struct regmap_config tlc59108_regmap_config = { |
403 | .reg_bits = 8, | 403 | .reg_bits = 8, |
404 | .val_bits = 8, | 404 | .val_bits = 8, |
405 | }; | 405 | }; |
diff --git a/drivers/video/omap2/dss/hdmi.c b/drivers/video/omap2/dss/hdmi.c index 08135fc9e4fc..2c4b1fb3709d 100644 --- a/drivers/video/omap2/dss/hdmi.c +++ b/drivers/video/omap2/dss/hdmi.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <linux/i2c.h> | 43 | #include <linux/i2c.h> |
44 | #include <linux/i2c-algo-bit.h> | 44 | #include <linux/i2c-algo-bit.h> |
45 | 45 | ||
46 | #include <mach-omap2/soc.h> | ||
46 | #include "ti_hdmi_4xxx_ip.h" | 47 | #include "ti_hdmi_4xxx_ip.h" |
47 | #include "ti_hdmi.h" | 48 | #include "ti_hdmi.h" |
48 | #include "dss.h" | 49 | #include "dss.h" |
@@ -2021,7 +2022,8 @@ static void init_sel_i2c_hdmi(void) | |||
2021 | void __iomem *clk_base = ioremap(0x4A009000, SZ_4K); | 2022 | void __iomem *clk_base = ioremap(0x4A009000, SZ_4K); |
2022 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); | 2023 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); |
2023 | 2024 | ||
2024 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx) | 2025 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx || |
2026 | soc_is_dra72x()) | ||
2025 | goto err; | 2027 | goto err; |
2026 | 2028 | ||
2027 | if (!clk_base || !mcasp8_base) | 2029 | if (!clk_base || !mcasp8_base) |
@@ -2057,7 +2059,8 @@ void sel_i2c(void) | |||
2057 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); | 2059 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); |
2058 | void __iomem *core_base = ioremap(0x4a003400, SZ_1K); | 2060 | void __iomem *core_base = ioremap(0x4a003400, SZ_1K); |
2059 | 2061 | ||
2060 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx) | 2062 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx || |
2063 | soc_is_dra72x()) | ||
2061 | goto err; | 2064 | goto err; |
2062 | 2065 | ||
2063 | /* set CM_L4PER2_CLKSTCTRL to sw supervised wkup */ | 2066 | /* set CM_L4PER2_CLKSTCTRL to sw supervised wkup */ |
@@ -2095,7 +2098,8 @@ void sel_hdmi(void) | |||
2095 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); | 2098 | void __iomem *mcasp8_base = ioremap(0x4847C000, SZ_1K); |
2096 | void __iomem *core_base = ioremap(0x4a003400, SZ_1K); | 2099 | void __iomem *core_base = ioremap(0x4a003400, SZ_1K); |
2097 | 2100 | ||
2098 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx) | 2101 | if (omapdss_get_version() != OMAPDSS_VER_DRA7xx || |
2102 | soc_is_dra72x()) | ||
2099 | goto err; | 2103 | goto err; |
2100 | 2104 | ||
2101 | /* drive MCASP8_PDOUT to high to select HDMI*/ | 2105 | /* drive MCASP8_PDOUT to high to select HDMI*/ |
diff --git a/drivers/video/omap2/omapfb/omapfb-main.c b/drivers/video/omap2/omapfb/omapfb-main.c index e8471f7fb5ec..fa3ef081d1a0 100644 --- a/drivers/video/omap2/omapfb/omapfb-main.c +++ b/drivers/video/omap2/omapfb/omapfb-main.c | |||
@@ -814,7 +814,7 @@ int check_fb_var(struct fb_info *fbi, struct fb_var_screeninfo *var) | |||
814 | } | 814 | } |
815 | 815 | ||
816 | 816 | ||
817 | bool check_fb_scale(struct omap_dss_device *dssdev) | 817 | static bool check_fb_scale(struct omap_dss_device *dssdev) |
818 | { | 818 | { |
819 | u16 fb_w, fb_h , pn_w , pn_h; | 819 | u16 fb_w, fb_h , pn_w , pn_h; |
820 | struct omap_dss_driver *dssdrv; | 820 | struct omap_dss_driver *dssdrv; |
@@ -1757,10 +1757,10 @@ static int omapfb_allocate_all_fbs(struct omapfb2_device *fbdev) | |||
1757 | rg = ofbi->region; | 1757 | rg = ofbi->region; |
1758 | 1758 | ||
1759 | DBG("region%d phys %08x virt %p size=%lu\n", | 1759 | DBG("region%d phys %08x virt %p size=%lu\n", |
1760 | i, | 1760 | i, |
1761 | rg->paddr, | 1761 | rg->paddr, |
1762 | rg->vaddr, | 1762 | rg->vaddr, |
1763 | rg->size); | 1763 | rg->size); |
1764 | } | 1764 | } |
1765 | 1765 | ||
1766 | return 0; | 1766 | return 0; |
@@ -2059,7 +2059,7 @@ static int omapfb_create_framebuffers(struct omapfb2_device *fbdev) | |||
2059 | 2059 | ||
2060 | fbdev->num_fbs = 0; | 2060 | fbdev->num_fbs = 0; |
2061 | 2061 | ||
2062 | DBG("create %d framebuffers\n", CONFIG_FB_OMAP2_NUM_FBS); | 2062 | DBG("create %d framebuffers\n", CONFIG_FB_OMAP2_NUM_FBS); |
2063 | 2063 | ||
2064 | /* allocate fb_infos */ | 2064 | /* allocate fb_infos */ |
2065 | for (i = 0; i < CONFIG_FB_OMAP2_NUM_FBS; i++) { | 2065 | for (i = 0; i < CONFIG_FB_OMAP2_NUM_FBS; i++) { |
@@ -2104,7 +2104,7 @@ static int omapfb_create_framebuffers(struct omapfb2_device *fbdev) | |||
2104 | struct omap_overlay_manager *mgr = fbdev->managers[i]; | 2104 | struct omap_overlay_manager *mgr = fbdev->managers[i]; |
2105 | ofbi->overlays[0] = fbdev->overlays[i]; | 2105 | ofbi->overlays[0] = fbdev->overlays[i]; |
2106 | ofbi->num_overlays = 1; | 2106 | ofbi->num_overlays = 1; |
2107 | if (mgr->output) { | 2107 | if (mgr && mgr->output) { |
2108 | ofbi->overlays[0]->unset_manager(ofbi->overlays[0]); | 2108 | ofbi->overlays[0]->unset_manager(ofbi->overlays[0]); |
2109 | ofbi->overlays[0]->set_manager(ofbi->overlays[0], mgr); | 2109 | ofbi->overlays[0]->set_manager(ofbi->overlays[0], mgr); |
2110 | DBG("ofbi%d assigned dev %s", | 2110 | DBG("ofbi%d assigned dev %s", |
@@ -2568,17 +2568,19 @@ static int omapfb_init_connections(struct omapfb2_device *fbdev, | |||
2568 | 2568 | ||
2569 | for (i = 0; i < fbdev->num_displays; ++i) { | 2569 | for (i = 0; i < fbdev->num_displays; ++i) { |
2570 | struct omap_dss_device *dssdev = fbdev->displays[i].dssdev; | 2570 | struct omap_dss_device *dssdev = fbdev->displays[i].dssdev; |
2571 | struct omap_dss_output *out = dssdev->output; | 2571 | if (dssdev) { |
2572 | struct omap_dss_output *out = dssdev->output; | ||
2572 | 2573 | ||
2573 | mgr = omap_dss_get_overlay_manager(dssdev->channel); | 2574 | mgr = omap_dss_get_overlay_manager(dssdev->channel); |
2574 | 2575 | ||
2575 | if (!mgr || !out) | 2576 | if (!mgr || !out) |
2576 | continue; | 2577 | continue; |
2577 | 2578 | ||
2578 | if (mgr->output) | 2579 | if (mgr->output) |
2579 | mgr->unset_output(mgr); | 2580 | mgr->unset_output(mgr); |
2580 | 2581 | ||
2581 | mgr->set_output(mgr, out); | 2582 | mgr->set_output(mgr, out); |
2583 | } | ||
2582 | } | 2584 | } |
2583 | 2585 | ||
2584 | mgr = def_dssdev->output->manager; | 2586 | mgr = def_dssdev->output->manager; |
@@ -2589,6 +2591,7 @@ static int omapfb_init_connections(struct omapfb2_device *fbdev, | |||
2589 | } | 2591 | } |
2590 | 2592 | ||
2591 | for (i = 0; i < fbdev->num_overlays; i++) { | 2593 | for (i = 0; i < fbdev->num_overlays; i++) { |
2594 | |||
2592 | struct omap_overlay *ovl = fbdev->overlays[i]; | 2595 | struct omap_overlay *ovl = fbdev->overlays[i]; |
2593 | 2596 | ||
2594 | if (ovl->manager) | 2597 | if (ovl->manager) |
@@ -2655,12 +2658,14 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2655 | struct omapfb2_device *fbdev = NULL; | 2658 | struct omapfb2_device *fbdev = NULL; |
2656 | int r = 0; | 2659 | int r = 0; |
2657 | int i; | 2660 | int i; |
2658 | struct omap_dss_device *def_display; | 2661 | struct omap_dss_device *init_displays[3]; |
2659 | struct omap_dss_device *dssdev; | 2662 | struct omap_dss_device *dssdev = NULL; |
2660 | u16 fb_ov_start_ix = 0; | 2663 | u16 fb_ov_start_ix = 0; |
2664 | const char *def_disp = omapdss_get_default_display_name(); | ||
2661 | 2665 | ||
2662 | DBG("omapfb_probe\n"); | 2666 | DBG("omapfb_probe\n"); |
2663 | 2667 | ||
2668 | memset(init_displays, 0, sizeof(init_displays)); | ||
2664 | if (pdev->num_resources != 0) { | 2669 | if (pdev->num_resources != 0) { |
2665 | dev_err(&pdev->dev, "probed for an unknown device\n"); | 2670 | dev_err(&pdev->dev, "probed for an unknown device\n"); |
2666 | r = -ENODEV; | 2671 | r = -ENODEV; |
@@ -2690,7 +2695,6 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2690 | platform_set_drvdata(pdev, fbdev); | 2695 | platform_set_drvdata(pdev, fbdev); |
2691 | 2696 | ||
2692 | fbdev->num_displays = 0; | 2697 | fbdev->num_displays = 0; |
2693 | dssdev = NULL; | ||
2694 | for_each_dss_dev(dssdev) { | 2698 | for_each_dss_dev(dssdev) { |
2695 | struct omapfb_display_data *d; | 2699 | struct omapfb_display_data *d; |
2696 | 2700 | ||
@@ -2703,12 +2707,47 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2703 | continue; | 2707 | continue; |
2704 | } | 2708 | } |
2705 | 2709 | ||
2706 | d = &fbdev->displays[fbdev->num_displays++]; | 2710 | d = &fbdev->displays[dssdev->display_id]; |
2707 | d->dssdev = dssdev; | 2711 | d->dssdev = dssdev; |
2708 | if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) | 2712 | if (dssdev->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE) |
2709 | d->update_mode = OMAPFB_MANUAL_UPDATE; | 2713 | d->update_mode = OMAPFB_MANUAL_UPDATE; |
2710 | else | 2714 | else |
2711 | d->update_mode = OMAPFB_AUTO_UPDATE; | 2715 | d->update_mode = OMAPFB_AUTO_UPDATE; |
2716 | |||
2717 | /* select the displays that need to be intialized at boot up | ||
2718 | * 1. display_id[0] is the default display | ||
2719 | * 2. display_id[1] is set to HDMI due to limitations in HWC | ||
2720 | * 3. HDMI can either be primary or external attachable display | ||
2721 | * 4. LCD/FPDLINK can be either primary and/or secondary | ||
2722 | * attached displays. | ||
2723 | */ | ||
2724 | switch (dssdev->display_id) { | ||
2725 | case 0: | ||
2726 | init_displays[dssdev->display_id] = dssdev; | ||
2727 | break; | ||
2728 | case 1: | ||
2729 | case 2: | ||
2730 | case 3: | ||
2731 | if (!def_disp) { | ||
2732 | if (strcmp("lcd", dssdev->name) == 0 || | ||
2733 | strcmp("fpdlink", dssdev->name) == 0) | ||
2734 | init_displays[dssdev->display_id-1] = dssdev; | ||
2735 | break; | ||
2736 | } else | ||
2737 | dev_err(&pdev->dev, | ||
2738 | "default display set to %s\n", | ||
2739 | def_disp); | ||
2740 | default: | ||
2741 | dev_err(&pdev->dev, | ||
2742 | "ignoring from initialization display[%d]=%s\n", | ||
2743 | dssdev->display_id, dssdev->name); | ||
2744 | break; | ||
2745 | } | ||
2746 | fbdev->num_displays++; | ||
2747 | dev_err(&pdev->dev, " display(%d) = %s, driver_name = %s\n", | ||
2748 | dssdev->display_id, | ||
2749 | dssdev->name, | ||
2750 | dssdev->driver->driver.name); | ||
2712 | } | 2751 | } |
2713 | 2752 | ||
2714 | if (fbdev->num_displays == 0) { | 2753 | if (fbdev->num_displays == 0) { |
@@ -2719,34 +2758,26 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2719 | fbdev->num_overlays = omap_dss_get_num_overlays(); | 2758 | fbdev->num_overlays = omap_dss_get_num_overlays(); |
2720 | for (i = 0; i < fbdev->num_overlays; i++) | 2759 | for (i = 0; i < fbdev->num_overlays; i++) |
2721 | fbdev->overlays[i] = omap_dss_get_overlay(i); | 2760 | fbdev->overlays[i] = omap_dss_get_overlay(i); |
2761 | |||
2722 | fbdev->num_managers = omap_dss_get_num_overlay_managers(); | 2762 | fbdev->num_managers = omap_dss_get_num_overlay_managers(); |
2723 | for (i = 0; i < fbdev->num_managers; i++) | 2763 | for (i = 0; i < fbdev->num_managers; i++) |
2724 | fbdev->managers[i] = omap_dss_get_overlay_manager(i); | 2764 | if (fbdev->displays[i].dssdev) { |
2725 | 2765 | fbdev->managers[i] = | |
2726 | def_display = NULL; | 2766 | omap_dss_get_overlay_manager(fbdev->displays[i].dssdev->channel); |
2727 | 2767 | dev_err(fbdev->dev, "fbdev->mgr[%d] = %s, display_id[%d]=%s, channel=%d\n", | |
2728 | for (i = 0; i < fbdev->num_displays; ++i) { | 2768 | i, fbdev->managers[i]->name, |
2729 | struct omap_dss_device *dssdev; | 2769 | fbdev->displays[i].dssdev->display_id, |
2730 | const char *def_name; | 2770 | fbdev->displays[i].dssdev->name, |
2731 | 2771 | fbdev->displays[i].dssdev->channel); | |
2732 | def_name = omapdss_get_default_display_name(); | ||
2733 | |||
2734 | dssdev = fbdev->displays[i].dssdev; | ||
2735 | |||
2736 | if (def_name == NULL || | ||
2737 | (dssdev->name && strcmp(def_name, dssdev->name) == 0)) { | ||
2738 | def_display = dssdev; | ||
2739 | break; | ||
2740 | } | 2772 | } |
2741 | } | ||
2742 | 2773 | ||
2743 | if (def_display == NULL) { | 2774 | if (init_displays[0] == NULL) { |
2744 | dev_err(fbdev->dev, "failed to find default display\n"); | 2775 | dev_err(fbdev->dev, "failed to find default display\n"); |
2745 | r = -EINVAL; | 2776 | r = -EINVAL; |
2746 | goto cleanup; | 2777 | goto cleanup; |
2747 | } | 2778 | } |
2748 | 2779 | ||
2749 | r = omapfb_init_connections(fbdev, def_display); | 2780 | r = omapfb_init_connections(fbdev, init_displays[0]); |
2750 | if (r) { | 2781 | if (r) { |
2751 | dev_err(fbdev->dev, "failed to init overlay connections\n"); | 2782 | dev_err(fbdev->dev, "failed to init overlay connections\n"); |
2752 | goto cleanup; | 2783 | goto cleanup; |
@@ -2770,15 +2801,17 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2770 | } | 2801 | } |
2771 | 2802 | ||
2772 | for (i = 0; i < fbdev->num_displays; i++) { | 2803 | for (i = 0; i < fbdev->num_displays; i++) { |
2773 | if (!intialize_dev_fb_resolution(i, fbdev->displays[i].dssdev)) | 2804 | if (fbdev->displays[i].dssdev && |
2805 | !intialize_dev_fb_resolution(i, fbdev->displays[i].dssdev)) | ||
2774 | goto cleanup; | 2806 | goto cleanup; |
2775 | } | 2807 | } |
2776 | 2808 | ||
2777 | fbdev->num_overlays = omap_dss_get_num_overlays(); | 2809 | fbdev->num_overlays = omap_dss_get_num_overlays(); |
2778 | if (def_display && check_fb_scale(def_display)) { | 2810 | if (init_displays[0] && check_fb_scale(init_displays[0])) { |
2779 | fb_ov_start_ix = 1; | 2811 | fb_ov_start_ix = 1; |
2780 | fbdev->num_overlays -= 1; | 2812 | fbdev->num_overlays -= 1; |
2781 | } | 2813 | } |
2814 | |||
2782 | for (i = 0; i < fbdev->num_overlays; i++) | 2815 | for (i = 0; i < fbdev->num_overlays; i++) |
2783 | fbdev->overlays[i] = omap_dss_get_overlay(i+fb_ov_start_ix); | 2816 | fbdev->overlays[i] = omap_dss_get_overlay(i+fb_ov_start_ix); |
2784 | r = omapfb_create_framebuffers(fbdev); | 2817 | r = omapfb_create_framebuffers(fbdev); |
@@ -2788,20 +2821,27 @@ static int __init omapfb_probe(struct platform_device *pdev) | |||
2788 | for (i = 0; i < fbdev->num_managers; i++) { | 2821 | for (i = 0; i < fbdev->num_managers; i++) { |
2789 | struct omap_overlay_manager *mgr; | 2822 | struct omap_overlay_manager *mgr; |
2790 | mgr = fbdev->managers[i]; | 2823 | mgr = fbdev->managers[i]; |
2791 | r = mgr->apply(mgr); | 2824 | if (mgr) { |
2792 | if (r) | 2825 | r = mgr->apply(mgr); |
2793 | dev_warn(fbdev->dev, "failed to apply dispc config\n"); | 2826 | if (r) |
2827 | dev_warn(fbdev->dev, "failed to apply dispc config\n"); | ||
2828 | } | ||
2794 | } | 2829 | } |
2795 | 2830 | ||
2796 | DBG("mgr->apply'ed\n"); | 2831 | DBG("mgr->apply'ed\n"); |
2797 | 2832 | ||
2798 | if (def_display) { | 2833 | for (i = 0; i < fbdev->num_displays; i++) { |
2799 | r = omapfb_init_display(fbdev, def_display); | 2834 | if (init_displays[i]) { |
2800 | if (r) { | 2835 | r = omapfb_init_display(fbdev, init_displays[i]); |
2801 | dev_err(fbdev->dev, | 2836 | if (r) { |
2802 | "failed to initialize default " | 2837 | dev_err(fbdev->dev, |
2803 | "display\n"); | 2838 | "failed to initialize default " |
2804 | goto cleanup; | 2839 | "display(%d): %s, err = %d\n", |
2840 | init_displays[i]->display_id, | ||
2841 | init_displays[i]->name, r); | ||
2842 | if (!i) | ||
2843 | goto cleanup; | ||
2844 | } | ||
2805 | } | 2845 | } |
2806 | } | 2846 | } |
2807 | 2847 | ||
diff --git a/include/linux/mmc/core.h b/include/linux/mmc/core.h index 5bf7c2274fcb..9da5dd02bd71 100644 --- a/include/linux/mmc/core.h +++ b/include/linux/mmc/core.h | |||
@@ -93,6 +93,8 @@ struct mmc_command { | |||
93 | */ | 93 | */ |
94 | 94 | ||
95 | unsigned int cmd_timeout_ms; /* in milliseconds */ | 95 | unsigned int cmd_timeout_ms; /* in milliseconds */ |
96 | /* Set this flag only for blocking sanitize request */ | ||
97 | bool sanitize_busy; | ||
96 | 98 | ||
97 | struct mmc_data *data; /* data segment associated with cmd */ | 99 | struct mmc_data *data; /* data segment associated with cmd */ |
98 | struct mmc_request *mrq; /* associated request */ | 100 | struct mmc_request *mrq; /* associated request */ |
diff --git a/include/linux/mmc/host.h b/include/linux/mmc/host.h index 24d8cfd23241..6830b56dce09 100644 --- a/include/linux/mmc/host.h +++ b/include/linux/mmc/host.h | |||
@@ -259,6 +259,7 @@ struct mmc_host { | |||
259 | #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ | 259 | #define MMC_CAP2_HC_ERASE_SZ (1 << 9) /* High-capacity erase size */ |
260 | #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ | 260 | #define MMC_CAP2_CD_ACTIVE_HIGH (1 << 10) /* Card-detect signal active high */ |
261 | #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ | 261 | #define MMC_CAP2_RO_ACTIVE_HIGH (1 << 11) /* Write-protect signal active high */ |
262 | #define MMC_CAP2_SANITIZE (1 << 15) /* Support Sanitize */ | ||
262 | 263 | ||
263 | mmc_pm_flag_t pm_caps; /* supported pm features */ | 264 | mmc_pm_flag_t pm_caps; /* supported pm features */ |
264 | 265 | ||
diff --git a/include/linux/platform_data/remoteproc-omap.h b/include/linux/platform_data/remoteproc-omap.h index ba9dff37662e..1176f0052ee8 100644 --- a/include/linux/platform_data/remoteproc-omap.h +++ b/include/linux/platform_data/remoteproc-omap.h | |||
@@ -17,19 +17,25 @@ | |||
17 | #ifndef _PLAT_REMOTEPROC_H | 17 | #ifndef _PLAT_REMOTEPROC_H |
18 | #define _PLAT_REMOTEPROC_H | 18 | #define _PLAT_REMOTEPROC_H |
19 | 19 | ||
20 | struct rproc; | ||
20 | struct rproc_ops; | 21 | struct rproc_ops; |
21 | struct platform_device; | 22 | struct platform_device; |
23 | enum rproc_crash_type; | ||
22 | 24 | ||
23 | /** | 25 | /** |
24 | * struct omap_rproc_timers_info - timers for the omap rproc | 26 | * struct omap_rproc_timers_info - timers for the omap rproc |
25 | * @name: hwmod name of the timer | 27 | * @name: hwmod name of the timer |
26 | * @id: timer id to use by the remoteproc (only for non-DT and temporary) | 28 | * @id: timer id to use by the remoteproc (only for non-DT and temporary) |
27 | * @odt: timer pointer | 29 | * @odt: timer pointer |
30 | * @is_wdt: flag to indicate a watchdog timer | ||
31 | * 0 - regular timer | ||
32 | * 1 - watchdog timer | ||
28 | */ | 33 | */ |
29 | struct omap_rproc_timers_info { | 34 | struct omap_rproc_timers_info { |
30 | const char *name; | 35 | const char *name; |
31 | int id; | 36 | int id; |
32 | struct omap_dm_timer *odt; | 37 | struct omap_dm_timer *odt; |
38 | int is_wdt; | ||
33 | }; | 39 | }; |
34 | 40 | ||
35 | /** | 41 | /** |
@@ -47,6 +53,7 @@ struct omap_rproc_timers_info { | |||
47 | * @set_bootaddr: omap-specific handler for setting the rproc boot address | 53 | * @set_bootaddr: omap-specific handler for setting the rproc boot address |
48 | * @enable_timers: omap-specific handler for requesting & enabling rproc timers | 54 | * @enable_timers: omap-specific handler for requesting & enabling rproc timers |
49 | * @disable_timers: omap-specific handler for disabling & freeing rproc timers | 55 | * @disable_timers: omap-specific handler for disabling & freeing rproc timers |
56 | * @report_watchdog: handler to invoke upon a watchdog error | ||
50 | */ | 57 | */ |
51 | struct omap_rproc_pdata { | 58 | struct omap_rproc_pdata { |
52 | const char *name; | 59 | const char *name; |
@@ -66,6 +73,9 @@ struct omap_rproc_pdata { | |||
66 | 73 | ||
67 | int (*enable_timers)(struct platform_device *pdev, bool configure); | 74 | int (*enable_timers)(struct platform_device *pdev, bool configure); |
68 | int (*disable_timers)(struct platform_device *pdev, bool configure); | 75 | int (*disable_timers)(struct platform_device *pdev, bool configure); |
76 | |||
77 | void (*report_watchdog)(struct rproc *rproc, | ||
78 | enum rproc_crash_type type); | ||
69 | }; | 79 | }; |
70 | 80 | ||
71 | #if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) | 81 | #if defined(CONFIG_OMAP_REMOTEPROC) || defined(CONFIG_OMAP_REMOTEPROC_MODULE) |
diff --git a/include/linux/remoteproc.h b/include/linux/remoteproc.h index 29760eaa2187..d7a8992eff93 100644 --- a/include/linux/remoteproc.h +++ b/include/linux/remoteproc.h | |||
@@ -401,14 +401,18 @@ enum rproc_state { | |||
401 | /** | 401 | /** |
402 | * enum rproc_crash_type - remote processor crash types | 402 | * enum rproc_crash_type - remote processor crash types |
403 | * @RPROC_MMUFAULT: iommu fault | 403 | * @RPROC_MMUFAULT: iommu fault |
404 | * @RPROC_WATCHDOG: watchdog error | ||
405 | * @RPROC_EXCEPTION: generic device exception | ||
404 | * | 406 | * |
405 | * Each element of the enum is used as an array index. So that, the value of | 407 | * Each element of the enum is used as an array index. So, the value of |
406 | * the elements should be always something sane. | 408 | * the elements should be always something sane. |
407 | * | 409 | * |
408 | * Feel free to add more types when needed. | 410 | * Feel free to add more types when needed. |
409 | */ | 411 | */ |
410 | enum rproc_crash_type { | 412 | enum rproc_crash_type { |
411 | RPROC_MMUFAULT, | 413 | RPROC_MMUFAULT, |
414 | RPROC_WATCHDOG, | ||
415 | RPROC_EXCEPTION, | ||
412 | }; | 416 | }; |
413 | 417 | ||
414 | /** | 418 | /** |
@@ -427,6 +431,8 @@ enum rproc_crash_type { | |||
427 | * @dbg_dir: debugfs directory of this rproc device | 431 | * @dbg_dir: debugfs directory of this rproc device |
428 | * @traces: list of trace buffers | 432 | * @traces: list of trace buffers |
429 | * @num_traces: number of trace buffers | 433 | * @num_traces: number of trace buffers |
434 | * @last_traces: list of last trace buffers | ||
435 | * @num_last_traces: number of last trace buffers | ||
430 | * @carveouts: list of physically contiguous memory allocations | 436 | * @carveouts: list of physically contiguous memory allocations |
431 | * @mappings: list of iommu mappings we initiated, needed on shutdown | 437 | * @mappings: list of iommu mappings we initiated, needed on shutdown |
432 | * @firmware_loading_complete: marks e/o asynchronous firmware loading | 438 | * @firmware_loading_complete: marks e/o asynchronous firmware loading |
@@ -460,6 +466,8 @@ struct rproc { | |||
460 | struct dentry *dbg_dir; | 466 | struct dentry *dbg_dir; |
461 | struct list_head traces; | 467 | struct list_head traces; |
462 | int num_traces; | 468 | int num_traces; |
469 | struct list_head last_traces; | ||
470 | int num_last_traces; | ||
463 | struct list_head carveouts; | 471 | struct list_head carveouts; |
464 | struct list_head mappings; | 472 | struct list_head mappings; |
465 | struct completion firmware_loading_complete; | 473 | struct completion firmware_loading_complete; |
diff --git a/mm/vmscan.c b/mm/vmscan.c index e31d09df9eb3..3c17364ed328 100644 --- a/mm/vmscan.c +++ b/mm/vmscan.c | |||
@@ -166,7 +166,6 @@ static int debug_shrinker_show(struct seq_file *s, void *unused) | |||
166 | 166 | ||
167 | down_read(&shrinker_rwsem); | 167 | down_read(&shrinker_rwsem); |
168 | list_for_each_entry(shrinker, &shrinker_list, list) { | 168 | list_for_each_entry(shrinker, &shrinker_list, list) { |
169 | char name[64]; | ||
170 | int num_objs; | 169 | int num_objs; |
171 | 170 | ||
172 | num_objs = shrinker->shrink(shrinker, &sc); | 171 | num_objs = shrinker->shrink(shrinker, &sc); |