RVC J6plus with TFP410 dts configurationrvc-5.06AO.1.0-rvc

Signed-off-by: Buddy Liong <a0270631@ti.com>

2 files changed, 192 insertions, 1 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index cb8ca2a14281..1e2cb03c9f13 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -533,7 +533,8 @@ dtb-$(CONFIG_SOC_DRA7XX) += \
         dra71-evm-late-attach.dtb \
         dra76-evm-late-attach.dtb \
         dra76-evm-tfp410.dtb \
-        dra76-evm-robust-rvc.dtb
+        dra76-evm-robust-rvc.dtb \
+        dra76-evm-tfp410-robust-rvc.dtb
 dtb-$(CONFIG_ARCH_ORION5X) += \
         orion5x-lacie-d2-network.dtb \
         orion5x-lacie-ethernet-disk-mini-v2.dtb \
diff --git a/arch/arm/boot/dts/dra76-evm-tfp410-robust-rvc.dts b/arch/arm/boot/dts/dra76-evm-tfp410-robust-rvc.dts
new file mode 100644
index 000000000000..161bae063aaa
--- /dev/null
+++ b/arch/arm/boot/dts/dra76-evm-tfp410-robust-rvc.dts
@@ -0,0 +1,190 @@
+/*
+ * Copyright (C) 2016 Texas Instruments Incorporated - http://www.ti.com/
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include "dra76-evm-tfp410.dts"
+
+#define IPU2_LATE_ATTACH
+#define DSP1_LATE_ATTACH
+
+#include "dra7x-late.dtsi"
+
+/*
+ * Reserving memory used by Vision SDK configured at
+ * \vision_sdk\apps\build\tda2xx\mem_segment_definition_linux.xs
+ * Address 0x84000000 - 0x93C03000 is used; reserving 0x10000000 (256MB) for NDK_MEM and
+ *                      SR1_FRAME_BUFFER_MEM covering 0x84000000 - 0x94000000
+ * Address 0xA0000000 - 0xA0530000 of size 0x530000 for SR0, REMOTE_LOG_MEM,
+ *                      LINK_STATS_MEM, SYSTEM_IPC_SHM_MEM, HDVPSS_DESC_MEM,
+ *                      TRACE_BUF, EXC_DATA, and PM_DATA
+ */
+&reserved_mem{
+        rvc_pool1: rvc1@0x84000000 {
+                reg = <0x0 0x84000000 0x0 0x10000000>;
+                status = "okay";
+        };
+
+        rvc_pool2: rvc2@0xA0000000 {
+                reg = <0x0 0xA0000000 0x0 0x530000>;
+                status = "okay";
+        };
+};
+
+
+&ipu2_cma_pool {
+        reg = <0x0 0x99000000 0x0 0x5000000>;
+};
+
+&mbox_ipu2_ipc3x {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+&dsp1_cma_pool {
+        reg = <0x0 0xa1000000 0x0 0x02000000>;
+};
+
+&mbox_dsp1_ipc3x {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Due to address and size changes on ipu2 and dsp1 */
+&ipu1_cma_pool {
+        reg = <0x0 0x9e000000 0x0 0x02000000>;
+};
+
+&dsp2_cma_pool {
+        reg = <0x0 0xa3000000 0x0 0x02000000>;
+};
+
+/* IPC uses mailbox5 and 6 for communication between A15 and remote cores */
+&mailbox5 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+&mailbox6 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* IPC uses mailbox7 and 8 for communication between remote cores */
+&mailbox7 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+&mailbox8 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision is using VIP1 */
+&vip1 {
+        status = "disabled";
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision is using VIN1A */
+&vin1a {
+        status = "disabled";
+};
+
+/* Vision is using VPE */
+&vpe{
+        status = "disabled";
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+&pcf_hdmi {
+        lines-initial-states = <0xffe3>;
+};
+
+&ov_10633 {
+        status = "disabled";
+};
+
+&dispc{
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+&dss {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+        is_shared=<1>;
+};
+
+/* IPU2 OS tick */
+&timer3{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* IPU2 Watchdog */
+&timer4{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision uses timer5 and timer6 for DSP1 */
+&timer5{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision uses timer5 and timer6 for DSP1 */
+&timer6{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* IPU2 Watchdog */
+&timer9{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* DSP1 Watchdog */
+&timer10{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision uses IPU1/IPU2 OS tick */
+&timer11{
+        ti,late-attach;
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* Vision uses TVP5158 for capture */
+&tvp_5158 {
+        status = "disabled";
+};
+
+/* TFP410 is using GPIO3 to enable the adapter */
+&gpio3 {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+};
+
+/* TFP410 adapter is connected to HDMI */
+&hdmi {
+        ti,no-reset-on-init;
+        ti,no-idle-on-init;
+        shared-display-on;
+};