summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat (limited to 'arch/arm/boot/compressed/head-clps7500.S')
-rw-r--r--arch/arm/boot/compressed/head-clps7500.S87
1 files changed, 87 insertions, 0 deletions
diff --git a/arch/arm/boot/compressed/head-clps7500.S b/arch/arm/boot/compressed/head-clps7500.S
new file mode 100644
index 000000000000..4a8a689d15e6
--- /dev/null
+++ b/arch/arm/boot/compressed/head-clps7500.S
@@ -0,0 +1,87 @@
1/*
2 * linux/arch/arm/boot/compressed/head.S
3 *
4 * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
5 */
6
7#include <linux/config.h>
8
9 /* There are three different ways the kernel can be
10 booted on a 7500 system: from Angel (loaded in RAM), from
11 16-bit ROM or from 32-bit Flash. Luckily, a single kernel
12 image does for them all. */
13 /* This branch is taken if the CPU memory width matches the
14 actual device in use. The default at power on is 16 bits
15 so we must be prepared for a mismatch. */
16 .section ".start", "ax"
172:
18 b 1f
19 .word 0xffff
20 .word 0xb632 @ mov r11, #0x03200000
21 .word 0xe3a0
22 .word 0x0000 @ mov r0, #0
23 .word 0xe3a0
24 .word 0x0080 @ strb r0, [r11, #0x80]
25 .word 0xe5cb
26 .word 0xf000 @ mov pc, #0
27 .word 0xe3a0
281:
29 adr r1, 2b
30 teq r1, #0
31 bne .Langel
32 /* This is a direct-from-ROM boot. Copy the kernel into
33 RAM and run it there. */
34 mov r0, #0x30
35 mcr p15, 0, r0, c1, c0, 0
36 mov r0, #0x13
37 msr cpsr_cxsf, r0
38 mov r12, #0x03000000 @ point to LEDs
39 orr r12, r12, #0x00020000
40 orr r12, r12, #0xba00
41 mov r0, #0x5500
42 str r0, [r12]
43 mov r0, #0x10000000
44 orr r0, r0, #0x8000
45 mov r4, r0
46 ldr r2, =_end
472:
48 ldr r3, [r1], #4
49 str r3, [r0], #4
50 teq r0, r2
51 bne 2b
52 mov r0, #0xff00
53 str r0, [r12]
541:
55 mov r12, #0x03000000 @ point to LEDs
56 orr r12, r12, #0x00020000
57 orr r12, r12, #0xba00
58 mov r0, #0xfe00
59 str r0, [r12]
60
61 adr lr, 1f
62 mov r0, #0
63 mov r1, #14 /* MACH_TYPE_CLPS7500 */
64 mov pc, lr
65.Langel:
66#ifdef CONFIG_ANGELBOOT
67 /* Call Angel to switch into SVC mode. */
68 mov r0, #0x17
69 swi 0x123456
70#endif
71 /* Ensure all interrupts are off and MMU disabled */
72 mrs r0, cpsr
73 orr r0, r0, #0xc0
74 msr cpsr_cxsf, r0
75
76 adr lr, 1b
77 orr lr, lr, #0x10000000
78 mov r0, #0x30 @ MMU off
79 mcr p15, 0, r0, c1, c0, 0
80 mov r0, r0
81 mov pc, lr
82
83 .ltorg
84
851:
86/* And the rest */
87#include "head.S"