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Diffstat (limited to 'arch/arm/boot/dts/dra7-evm-common.dtsi')
-rw-r--r--arch/arm/boot/dts/dra7-evm-common.dtsi393
1 files changed, 393 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/dra7-evm-common.dtsi b/arch/arm/boot/dts/dra7-evm-common.dtsi
new file mode 100644
index 000000000000..2bbc04791628
--- /dev/null
+++ b/arch/arm/boot/dts/dra7-evm-common.dtsi
@@ -0,0 +1,393 @@
1/*
2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/clk/ti-dra7-atl.h>
11#include <dt-bindings/input/input.h>
12
13/ {
14 aliases {
15 display0 = &hdmi0;
16 sound0 = &sound0;
17 sound1 = &hdmi;
18 };
19
20 chosen {
21 stdout-path = &uart1;
22 };
23
24 sound0: sound0 {
25 compatible = "simple-audio-card";
26 simple-audio-card,name = "DRA7xx-EVM";
27 simple-audio-card,widgets =
28 "Headphone", "Headphone Jack",
29 "Line", "Line Out",
30 "Microphone", "Mic Jack",
31 "Line", "Line In";
32 simple-audio-card,routing =
33 "Headphone Jack", "HPLOUT",
34 "Headphone Jack", "HPROUT",
35 "Line Out", "LLOUT",
36 "Line Out", "RLOUT",
37 "MIC3L", "Mic Jack",
38 "MIC3R", "Mic Jack",
39 "Mic Jack", "Mic Bias",
40 "LINE1L", "Line In",
41 "LINE1R", "Line In";
42 simple-audio-card,format = "dsp_b";
43 simple-audio-card,bitclock-master = <&sound0_master>;
44 simple-audio-card,frame-master = <&sound0_master>;
45 simple-audio-card,bitclock-inversion;
46
47 sound0_master: simple-audio-card,cpu {
48 sound-dai = <&mcasp3>;
49 system-clock-frequency = <11289600>;
50 };
51
52 simple-audio-card,codec {
53 sound-dai = <&tlv320aic3106>;
54 clocks = <&atl_clkin2_ck>;
55 };
56 };
57
58 extcon_usb1: extcon_usb1 {
59 compatible = "linux,extcon-usb-gpio";
60 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
61 };
62
63 leds {
64 compatible = "gpio-leds";
65 led0 {
66 label = "dra7:usr1";
67 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
68 default-state = "off";
69 };
70
71 led1 {
72 label = "dra7:usr2";
73 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
74 default-state = "off";
75 };
76
77 led2 {
78 label = "dra7:usr3";
79 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
80 default-state = "off";
81 };
82
83 led3 {
84 label = "dra7:usr4";
85 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
86 default-state = "off";
87 };
88 };
89
90 gpio_keys {
91 compatible = "gpio-keys";
92 #address-cells = <1>;
93 #size-cells = <0>;
94 autorepeat;
95
96 USER1 {
97 label = "btnUser1";
98 linux,code = <BTN_0>;
99 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
100 };
101
102 USER2 {
103 label = "btnUser2";
104 linux,code = <BTN_1>;
105 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
106 };
107 };
108
109 hdmi0: connector@1 {
110 compatible = "hdmi-connector";
111 label = "hdmi";
112
113 type = "a";
114
115 port {
116 hdmi_connector_in: endpoint {
117 remote-endpoint = <&tpd12s015_out>;
118 };
119 };
120 };
121
122 tpd12s015: encoder@1 {
123 ports {
124 #address-cells = <1>;
125 #size-cells = <0>;
126
127 port@0 {
128 reg = <0>;
129
130 tpd12s015_in: endpoint {
131 remote-endpoint = <&hdmi_out>;
132 };
133 };
134
135 port@1 {
136 reg = <1>;
137
138 tpd12s015_out: endpoint {
139 remote-endpoint = <&hdmi_connector_in>;
140 };
141 };
142 };
143 };
144
145 clk_ov10633_fixed: clk_ov10633_fixed {
146 #clock-cells = <0>;
147 compatible = "fixed-clock";
148 clock-frequency = <24000000>;
149 };
150};
151
152&dra7_pmx_core {
153 dcan1_pins_default: dcan1_pins_default {
154 pinctrl-single,pins = <
155 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
156 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
157 >;
158 };
159
160 dcan1_pins_sleep: dcan1_pins_sleep {
161 pinctrl-single,pins = <
162 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
163 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
164 >;
165 };
166};
167
168&i2c3 {
169 status = "okay";
170 clock-frequency = <400000>;
171};
172
173&mcspi1 {
174 status = "okay";
175};
176
177&mcspi2 {
178 status = "okay";
179};
180
181&uart1 {
182 status = "okay";
183 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
184 <&dra7_pmx_core 0x3e0>;
185};
186
187&uart2 {
188 status = "okay";
189};
190
191&uart3 {
192 status = "okay";
193};
194
195&qspi {
196 status = "okay";
197
198 spi-max-frequency = <76800000>;
199 m25p80@0 {
200 compatible = "s25fl256s1";
201 spi-max-frequency = <76800000>;
202 reg = <0>;
203 spi-tx-bus-width = <1>;
204 spi-rx-bus-width = <4>;
205 #address-cells = <1>;
206 #size-cells = <1>;
207
208 /* MTD partition table.
209 * The ROM checks the first four physical blocks
210 * for a valid file to boot and the flash here is
211 * 64KiB block size.
212 */
213 partition@0 {
214 label = "QSPI.SPL";
215 reg = <0x00000000 0x000040000>;
216 };
217 partition@1 {
218 label = "QSPI.u-boot";
219 reg = <0x00040000 0x00100000>;
220 };
221 partition@2 {
222 label = "QSPI.u-boot-spl-os";
223 reg = <0x00140000 0x00080000>;
224 };
225 partition@3 {
226 label = "QSPI.u-boot-env";
227 reg = <0x001c0000 0x00010000>;
228 };
229 partition@4 {
230 label = "QSPI.u-boot-env.backup1";
231 reg = <0x001d0000 0x0010000>;
232 };
233 partition@5 {
234 label = "QSPI.kernel";
235 reg = <0x001e0000 0x0800000>;
236 };
237 partition@6 {
238 label = "QSPI.file-system";
239 reg = <0x009e0000 0x01620000>;
240 };
241 };
242};
243
244&omap_dwc3_1 {
245 extcon = <&extcon_usb1>;
246};
247
248&usb1 {
249 dr_mode = "otg";
250};
251
252&usb2 {
253 dr_mode = "host";
254};
255
256&dcan1 {
257 status = "ok";
258 pinctrl-names = "default", "sleep", "active";
259 pinctrl-0 = <&dcan1_pins_sleep>;
260 pinctrl-1 = <&dcan1_pins_sleep>;
261 pinctrl-2 = <&dcan1_pins_default>;
262};
263
264&atl {
265 assigned-clocks = <&abe_dpll_sys_clk_mux>,
266 <&atl_gfclk_mux>,
267 <&dpll_abe_ck>,
268 <&dpll_abe_m2x2_ck>,
269 <&atl_clkin1_ck>,
270 <&atl_clkin2_ck>;
271 assigned-clock-parents = <&sys_clkin2>, <&dpll_abe_m2_ck>;
272 assigned-clock-rates = <0>, <0>, <180633600>, <361267200>,
273 <11289600>, <11289600>;
274
275 status = "okay";
276
277 atl2 {
278 bws = <DRA7_ATL_WS_MCASP2_FSX>;
279 aws = <DRA7_ATL_WS_MCASP3_FSX>;
280 };
281};
282
283&mcasp3 {
284 #sound-dai-cells = <0>;
285
286 assigned-clocks = <&mcasp3_ahclkx_mux>;
287 assigned-clock-parents = <&atl_clkin2_ck>;
288
289 status = "okay";
290
291 op-mode = <0>; /* MCASP_IIS_MODE */
292 tdm-slots = <2>;
293 /* 4 serializer */
294 serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
295 1 2 0 0
296 >;
297 tx-num-evt = <32>;
298 rx-num-evt = <32>;
299};
300
301&mailbox5 {
302 status = "okay";
303 mbox_ipu1_ipc3x: mbox_ipu1_ipc3x {
304 status = "okay";
305 };
306 mbox_dsp1_ipc3x: mbox_dsp1_ipc3x {
307 status = "okay";
308 };
309};
310
311&mailbox6 {
312 status = "okay";
313 mbox_ipu2_ipc3x: mbox_ipu2_ipc3x {
314 status = "okay";
315 };
316 mbox_dsp2_ipc3x: mbox_dsp2_ipc3x {
317 status = "okay";
318 };
319};
320
321&mmu0_dsp1 {
322 status = "okay";
323};
324
325&mmu1_dsp1 {
326 status = "okay";
327};
328
329&mmu0_dsp2 {
330 status = "okay";
331};
332
333&mmu1_dsp2 {
334 status = "okay";
335};
336
337&mmu_ipu1 {
338 status = "okay";
339};
340
341&mmu_ipu2 {
342 status = "okay";
343};
344
345&ipu2 {
346 status = "okay";
347 memory-region = <&ipu2_cma_pool>;
348 mboxes = <&mailbox6 &mbox_ipu2_ipc3x>;
349 timers = <&timer3>;
350 watchdog-timers = <&timer4>, <&timer9>;
351};
352
353&ipu1 {
354 status = "okay";
355 memory-region = <&ipu1_cma_pool>;
356 mboxes = <&mailbox5 &mbox_ipu1_ipc3x>;
357 timers = <&timer11>;
358 watchdog-timers = <&timer7>, <&timer8>;
359};
360
361&dsp1 {
362 status = "okay";
363 memory-region = <&dsp1_cma_pool>;
364 mboxes = <&mailbox5 &mbox_dsp1_ipc3x>;
365 timers = <&timer5>;
366 watchdog-timers = <&timer10>;
367};
368
369&dsp2 {
370 status = "okay";
371 memory-region = <&dsp2_cma_pool>;
372 mboxes = <&mailbox6 &mbox_dsp2_ipc3x>;
373 timers = <&timer6>;
374 watchdog-timers = <&timer13>;
375};
376
377&vip1 {
378 status = "okay";
379};
380
381&hdmi {
382 status = "okay";
383
384 port {
385 hdmi_out: endpoint {
386 remote-endpoint = <&tpd12s015_in>;
387 };
388 };
389};
390
391&pcie1_rc {
392 status = "okay";
393};