1 files changed, 19 insertions, 42 deletions

diff --git a/arch/arm/boot/dts/dra76-evm.dts b/arch/arm/boot/dts/dra76-evm.dts
index f0c7666649c1..db4fc1e99b1d 100644
--- a/arch/arm/boot/dts/dra76-evm.dts
+++ b/arch/arm/boot/dts/dra76-evm.dts
@@ -9,6 +9,7 @@
 
 #include "dra76x.dtsi"
 #include "dra7-evm-common.dtsi"
+#include "dra76x-mmc-iodelay.dtsi"
 #include <dt-bindings/net/ti-dp83867.h>
 
 / {
@@ -134,46 +135,6 @@
         };
 };
 
-&dra7_pmx_core {
-        mmc1_pins_default: mmc1_pins_default {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x376c, PIN_INPUT | MUX_MODE14)       /* mmc1sdcd.gpio219 */
-                        DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
-                        DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
-                        DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
-                        DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
-                        DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
-                        DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
-                >;
-        };
-
-        mmc2_pins_default: mmc2_pins_default {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x349c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
-                        DRA7XX_CORE_IOPAD(0x34b0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
-                        DRA7XX_CORE_IOPAD(0x34a0, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
-                        DRA7XX_CORE_IOPAD(0x34a4, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
-                        DRA7XX_CORE_IOPAD(0x34a8, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
-                        DRA7XX_CORE_IOPAD(0x34ac, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
-                        DRA7XX_CORE_IOPAD(0x348c, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
-                        DRA7XX_CORE_IOPAD(0x3490, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
-                        DRA7XX_CORE_IOPAD(0x3494, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
-                        DRA7XX_CORE_IOPAD(0x3498, PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
-                >;
-        };
-
-        mmc4_pins_default: mmc4_pins_default {
-                pinctrl-single,pins = <
-                        DRA7XX_CORE_IOPAD(0x37e8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
-                        DRA7XX_CORE_IOPAD(0x37ec, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
-                        DRA7XX_CORE_IOPAD(0x37f0, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
-                        DRA7XX_CORE_IOPAD(0x37f4, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
-                        DRA7XX_CORE_IOPAD(0x37f8, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
-                        DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
-                >;
-        };
-};
-
 &i2c1 {
         status = "okay";
         clock-frequency = <400000>;
@@ -391,16 +352,22 @@
          * is always hardwired.
          */
         cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
-        pinctrl-names = "default";
+        max-frequency = <192000000>;
+        pinctrl-names = "default", "hs";
         pinctrl-0 = <&mmc1_pins_default>;
+        pinctrl-1 = <&mmc1_pins_hs>;
 };
 
 &mmc2 {
         status = "okay";
         vmmc-supply = <&vio_1v8>;
         bus-width = <8>;
-        pinctrl-names = "default";
+        max-frequency = <192000000>;
+        pinctrl-names = "default", "hs", "ddr_1_8v", "hs200_1_8v";
         pinctrl-0 = <&mmc2_pins_default>;
+        pinctrl-1 = <&mmc2_pins_hs>;
+        pinctrl-2 = <&mmc2_pins_ddr>;
+        pinctrl-3 = <&mmc2_pins_hs200 &mmc2_iodelay_hs200_conf>;
 };
 
 &oppdm_mpu {
@@ -489,3 +456,13 @@
                 spi-max-frequency = <96000000>;
         };
 };
+
+&pcie2_phy {
+        status = "okay";
+};
+
+&pcie1_rc {
+        num-lanes = <2>;
+        phys = <&pcie1_phy>, <&pcie2_phy>;
+        phy-names = "pcie-phy0", "pcie-phy1";
+};