diff options
Diffstat (limited to 'arch/arm64/include/asm/barrier.h')
| -rw-r--r-- | arch/arm64/include/asm/barrier.h | 21 |
1 files changed, 17 insertions, 4 deletions
diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 9622eb48f894..0671711b46ab 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h | |||
| @@ -20,6 +20,9 @@ | |||
| 20 | 20 | ||
| 21 | #ifndef __ASSEMBLY__ | 21 | #ifndef __ASSEMBLY__ |
| 22 | 22 | ||
| 23 | #define __nops(n) ".rept " #n "\nnop\n.endr\n" | ||
| 24 | #define nops(n) asm volatile(__nops(n)) | ||
| 25 | |||
| 23 | #define sev() asm volatile("sev" : : : "memory") | 26 | #define sev() asm volatile("sev" : : : "memory") |
| 24 | #define wfe() asm volatile("wfe" : : : "memory") | 27 | #define wfe() asm volatile("wfe" : : : "memory") |
| 25 | #define wfi() asm volatile("wfi" : : : "memory") | 28 | #define wfi() asm volatile("wfi" : : : "memory") |
| @@ -41,23 +44,33 @@ | |||
| 41 | 44 | ||
| 42 | #define smp_store_release(p, v) \ | 45 | #define smp_store_release(p, v) \ |
| 43 | do { \ | 46 | do { \ |
| 47 | union { typeof(*p) __val; char __c[1]; } __u = \ | ||
| 48 | { .__val = (__force typeof(*p)) (v) }; \ | ||
| 44 | compiletime_assert_atomic_type(*p); \ | 49 | compiletime_assert_atomic_type(*p); \ |
| 45 | switch (sizeof(*p)) { \ | 50 | switch (sizeof(*p)) { \ |
| 46 | case 1: \ | 51 | case 1: \ |
| 47 | asm volatile ("stlrb %w1, %0" \ | 52 | asm volatile ("stlrb %w1, %0" \ |
| 48 | : "=Q" (*p) : "r" (v) : "memory"); \ | 53 | : "=Q" (*p) \ |
| 54 | : "r" (*(__u8 *)__u.__c) \ | ||
| 55 | : "memory"); \ | ||
| 49 | break; \ | 56 | break; \ |
| 50 | case 2: \ | 57 | case 2: \ |
| 51 | asm volatile ("stlrh %w1, %0" \ | 58 | asm volatile ("stlrh %w1, %0" \ |
| 52 | : "=Q" (*p) : "r" (v) : "memory"); \ | 59 | : "=Q" (*p) \ |
| 60 | : "r" (*(__u16 *)__u.__c) \ | ||
| 61 | : "memory"); \ | ||
| 53 | break; \ | 62 | break; \ |
| 54 | case 4: \ | 63 | case 4: \ |
| 55 | asm volatile ("stlr %w1, %0" \ | 64 | asm volatile ("stlr %w1, %0" \ |
| 56 | : "=Q" (*p) : "r" (v) : "memory"); \ | 65 | : "=Q" (*p) \ |
| 66 | : "r" (*(__u32 *)__u.__c) \ | ||
| 67 | : "memory"); \ | ||
| 57 | break; \ | 68 | break; \ |
| 58 | case 8: \ | 69 | case 8: \ |
| 59 | asm volatile ("stlr %1, %0" \ | 70 | asm volatile ("stlr %1, %0" \ |
| 60 | : "=Q" (*p) : "r" (v) : "memory"); \ | 71 | : "=Q" (*p) \ |
| 72 | : "r" (*(__u64 *)__u.__c) \ | ||
| 73 | : "memory"); \ | ||
| 61 | break; \ | 74 | break; \ |
| 62 | } \ | 75 | } \ |
| 63 | } while (0) | 76 | } while (0) |