diff options
Diffstat (limited to 'arch/h8300/platform/h8300h/generic/timer.c')
-rw-r--r-- | arch/h8300/platform/h8300h/generic/timer.c | 96 |
1 files changed, 96 insertions, 0 deletions
diff --git a/arch/h8300/platform/h8300h/generic/timer.c b/arch/h8300/platform/h8300h/generic/timer.c new file mode 100644 index 000000000000..6590f89e521a --- /dev/null +++ b/arch/h8300/platform/h8300h/generic/timer.c | |||
@@ -0,0 +1,96 @@ | |||
1 | /* | ||
2 | * linux/arch/h8300/platform/h8300h/generic/timer.c | ||
3 | * | ||
4 | * Yoshinori Sato <ysato@users.sourceforge.jp> | ||
5 | * | ||
6 | * Platform depend Timer Handler | ||
7 | * | ||
8 | */ | ||
9 | |||
10 | #include <linux/config.h> | ||
11 | #include <linux/errno.h> | ||
12 | #include <linux/sched.h> | ||
13 | #include <linux/kernel.h> | ||
14 | #include <linux/param.h> | ||
15 | #include <linux/string.h> | ||
16 | #include <linux/mm.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | |||
19 | #include <asm/segment.h> | ||
20 | #include <asm/io.h> | ||
21 | #include <asm/irq.h> | ||
22 | |||
23 | #include <linux/timex.h> | ||
24 | |||
25 | #if defined(CONFIG_H83007) || defined(CONFIG_H83068) | ||
26 | #include <asm/regs306x.h> | ||
27 | #define CMFA 6 | ||
28 | |||
29 | #define CMIEA 0x40 | ||
30 | #define CCLR_CMA 0x08 | ||
31 | #define CLK_DIV8192 0x03 | ||
32 | |||
33 | #define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8192 /* Timer input freq. */ | ||
34 | |||
35 | void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) | ||
36 | { | ||
37 | /* setup 8bit timer ch2 */ | ||
38 | ctrl_outb(H8300_TIMER_FREQ / HZ, TCORA2); /* set interval */ | ||
39 | ctrl_outb(0x00, _8TCSR2); /* no output */ | ||
40 | request_irq(40, timer_int, 0, "timer", 0); | ||
41 | ctrl_outb(CMIEA|CCLR_CMA|CLK_DIV8192, _8TCR2); /* start count */ | ||
42 | } | ||
43 | |||
44 | void platform_timer_eoi(void) | ||
45 | { | ||
46 | *(volatile unsigned char *)_8TCSR2 &= ~(1 << CMFA); | ||
47 | } | ||
48 | #endif | ||
49 | |||
50 | #if defined(CONFIG_H83002) || defined(CONFIG_H83048) | ||
51 | /* FIXME! */ | ||
52 | #define TSTR 0x00ffff60 | ||
53 | #define TSNC 0x00ffff61 | ||
54 | #define TMDR 0x00ffff62 | ||
55 | #define TFCR 0x00ffff63 | ||
56 | #define TOER 0x00ffff90 | ||
57 | #define TOCR 0x00ffff91 | ||
58 | /* ITU0 */ | ||
59 | #define TCR 0x00ffff64 | ||
60 | #define TIOR 0x00ffff65 | ||
61 | #define TIER 0x00ffff66 | ||
62 | #define TSR 0x00ffff67 | ||
63 | #define TCNT 0x00ffff68 | ||
64 | #define GRA 0x00ffff6a | ||
65 | #define GRB 0x00ffff6c | ||
66 | |||
67 | #define CCLR_CMGRA 0x20 | ||
68 | #define CLK_DIV8 0x03 | ||
69 | |||
70 | #define H8300_TIMER_FREQ CONFIG_CPU_CLOCK*1000/8 /* Timer input freq. */ | ||
71 | |||
72 | void __init platform_timer_setup(irqreturn_t (*timer_int)(int, void *, struct pt_regs *)) | ||
73 | { | ||
74 | *(unsigned short *)GRA= H8300_TIMER_FREQ / HZ; /* set interval */ | ||
75 | *(unsigned short *)TCNT=0; /* clear counter */ | ||
76 | ctrl_outb(0x80|CCLR_CMGRA|CLK_DIV8, TCR); /* set ITU0 clock */ | ||
77 | ctrl_outb(0x88, TIOR); /* no output */ | ||
78 | request_irq(26, timer_int, 0, "timer", 0); | ||
79 | ctrl_outb(0xf9, TIER); /* compare match GRA interrupt */ | ||
80 | ctrl_outb(ctrl_inb(TSNC) & ~0x01, TSNC); /* ITU0 async */ | ||
81 | ctrl_outb(ctrl_inb(TMDR) & ~0x01, TMDR); /* ITU0 normal mode */ | ||
82 | ctrl_outb(ctrl_inb(TSTR) | 0x01, TSTR); /* ITU0 Start */ | ||
83 | return 0; | ||
84 | } | ||
85 | |||
86 | void platform_timer_eoi(void) | ||
87 | { | ||
88 | ctrl_outb(ctrl_inb(TSR) & ~0x01,TSR); | ||
89 | } | ||
90 | #endif | ||
91 | |||
92 | void platform_gettod(int *year, int *mon, int *day, int *hour, | ||
93 | int *min, int *sec) | ||
94 | { | ||
95 | *year = *mon = *day = *hour = *min = *sec = 0; | ||
96 | } | ||