Merge branch 'p-ti-linux-3.14.y-common' into p-ti-linux-3.14.y-androidandroid-3.14-6AM.1.0

* p-ti-linux-3.14.y-common:
  pm: dra7: Restrict vip/vpe power domain state to INA
  pm: dra7: Update power domain states as per new spec
  ARM: OMAP: DRA7: powerdomain data: Remove CSWR with the exception of MPU
  ARM: OMAP: DRA7: powerdomain data: Fix "ON" state for memories
  ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
  ARM: dts: dra7-evm: mmc: fix typos in register names and values

Change-Id: I3a327104320949e44fd891d790f145e3d27ff0b1
Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>

2 files changed, 103 insertions, 101 deletions

diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 2d9eab18524..0f295e29490 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -500,17 +500,17 @@
 
         mmc1_iodelay_sdr104_conf_sr20: mmc1_iodelay_sdr104_conf_sr20 {
                 pinctrl-single,pins = <
-                        0x620 (A_DELAY(1063) | G_DELAY(17))     /* CFG_MMC1_CLK_OUT */
-                        0x628 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_CMD_OEN */
-                        0x62c (A_DELAY(23) | G_DELAY(0))        /* CFG_MMC1_CMD_OUT */
-                        0x634 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT0_OEN */
-                        0x638 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT0_OUT */
-                        0x640 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT1_OEN */
-                        0x644 (A_DELAY(2) | G_DELAY(0))         /* CFG_MMC1_DAT1_OUT */
-                        0x64c (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT2_OEN */
-                        0x650 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT2_OUT */
-                        0x658 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT3_OEN */
-                        0x65c (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT3_OUT */
+                        0x620 (A_DELAY(600) | G_DELAY(400))     /* CFG_MMC1_CLK_OUT */
+                        0x628 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_CMD_OEN */
+                        0x62c (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_CMD_OUT */
+                        0x634 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT0_OEN */
+                        0x638 (A_DELAY(30) | G_DELAY(0))        /* CFG_MMC1_DAT0_OUT */
+                        0x640 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT1_OEN */
+                        0x644 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT1_OUT */
+                        0x64c (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT2_OEN */
+                        0x650 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT2_OUT */
+                        0x658 (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT3_OEN */
+                        0x65c (A_DELAY(0) | G_DELAY(0))         /* CFG_MMC1_DAT3_OUT */
                 >;
         };
 
@@ -650,10 +650,10 @@
                         0x870 (A_DELAY(582) | G_DELAY(0))       /* CFG_UART2_CTSN_IN */
                         0x874 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OEN */
                         0x878 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OUT */
-                        0x87C (A_DELAY(391) | G_DELAY(0))       /* RCFG_UART2_RTSN_IN */
+                        0x87C (A_DELAY(391) | G_DELAY(0))       /* CFG_UART2_RTSN_IN */
                         0x880 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OEN */
                         0x884 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OUT */
-                        0x888 (A_DELAY(561) | G_DELAY(0))       /* RCFG_UART2_RXD_IN */
+                        0x888 (A_DELAY(561) | G_DELAY(0))       /* CFG_UART2_RXD_IN */
                         0x88c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OEN */
                         0x890 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OUT */
                         0x894 (A_DELAY(588) | G_DELAY(0))       /* CFG_UART2_TXD_IN */
@@ -672,10 +672,10 @@
                         0x870 (A_DELAY(1913) | G_DELAY(0))      /* CFG_UART2_CTSN_IN */
                         0x874 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OEN */
                         0x878 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OUT */
-                        0x87C (A_DELAY(1721) | G_DELAY(0))      /* RCFG_UART2_RTSN_IN */
+                        0x87C (A_DELAY(1721) | G_DELAY(0))      /* CFG_UART2_RTSN_IN */
                         0x880 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OEN */
                         0x884 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OUT */
-                        0x888 (A_DELAY(1891) | G_DELAY(0))      /* RCFG_UART2_RXD_IN */
+                        0x888 (A_DELAY(1891) | G_DELAY(0))      /* CFG_UART2_RXD_IN */
                         0x88c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OEN */
                         0x890 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OUT */
                         0x894 (A_DELAY(1919) | G_DELAY(0))      /* CFG_UART2_TXD_IN */
@@ -691,16 +691,16 @@
                         0x84c (A_DELAY(307) | G_DELAY(0))       /* CFG_UART1_RTSN_IN */
                         0x850 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART1_RTSN_OEN */
                         0x854 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART1_RTSN_OUT */
-                        0x870 (A_DELAY(683) | G_DELAY(0))       /* CFG_UART2_CTSN_IN */
+                        0x870 (A_DELAY(785) | G_DELAY(0))       /* CFG_UART2_CTSN_IN */
                         0x874 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OEN */
                         0x878 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OUT */
-                        0x87C (A_DELAY(835) | G_DELAY(0))       /* RCFG_UART2_RTSN_IN */
+                        0x87C (A_DELAY(613) | G_DELAY(0))       /* CFG_UART2_RTSN_IN */
                         0x880 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OEN */
                         0x884 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OUT */
-                        0x888 (A_DELAY(785) | G_DELAY(0))       /* RCFG_UART2_RXD_IN */
+                        0x888 (A_DELAY(683) | G_DELAY(0))       /* CFG_UART2_RXD_IN */
                         0x88c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OEN */
                         0x890 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OUT */
-                        0x894 (A_DELAY(613) | G_DELAY(0))       /* CFG_UART2_TXD_IN */
+                        0x894 (A_DELAY(835) | G_DELAY(0))       /* CFG_UART2_TXD_IN */
                         0x898 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_TXD_OEN */
                         0x89c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_TXD_OUT */
                 >;
@@ -713,16 +713,16 @@
                         0x84c (A_DELAY(1834) | G_DELAY(0))      /* CFG_UART1_RTSN_IN */
                         0x850 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART1_RTSN_OEN */
                         0x854 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART1_RTSN_OUT */
-                        0x870 (A_DELAY(1935) | G_DELAY(128))    /* CFG_UART2_CTSN_IN */
+                        0x870 (A_DELAY(2165) | G_DELAY(0))      /* CFG_UART2_CTSN_IN */
                         0x874 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OEN */
                         0x878 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_CTSN_OUT */
-                        0x87C (A_DELAY(2172) | G_DELAY(44))     /* RCFG_UART2_RTSN_IN */
+                        0x87C (A_DELAY(1929) | G_DELAY(64))     /* CFG_UART2_RTSN_IN */
                         0x880 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OEN */
                         0x884 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RTSN_OUT */
-                        0x888 (A_DELAY(2165) | G_DELAY(0))      /* RCFG_UART2_RXD_IN */
+                        0x888 (A_DELAY(1935) | G_DELAY(128))    /* CFG_UART2_RXD_IN */
                         0x88c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OEN */
                         0x890 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_RXD_OUT */
-                        0x894 (A_DELAY(1929) | G_DELAY(64))     /* CFG_UART2_TXD_IN */
+                        0x894 (A_DELAY(2172) | G_DELAY(44))     /* CFG_UART2_TXD_IN */
                         0x898 (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_TXD_OEN */
                         0x89c (A_DELAY(0) | G_DELAY(0))         /* CFG_UART2_TXD_OUT */
                 >;
diff --git a/arch/arm/mach-omap2/powerdomains7xx_data.c b/arch/arm/mach-omap2/powerdomains7xx_data.c
index f2b4557124f..b7f054da997 100644
--- a/arch/arm/mach-omap2/powerdomains7xx_data.c
+++ b/arch/arm/mach-omap2/powerdomains7xx_data.c
@@ -35,20 +35,20 @@ static struct powerdomain iva_7xx_pwrdm = {
         .name             = "iva_pwrdm",
         .prcm_offs        = DRA7XX_PRM_IVA_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_RET_ON,
+        .pwrsts           = PWRSTS_OFF_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 4,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* hwa_mem */
-                [1] = PWRSTS_OFF_RET,   /* sl2_mem */
-                [2] = PWRSTS_OFF_RET,   /* tcm1_mem */
-                [3] = PWRSTS_OFF_RET,   /* tcm2_mem */
+                [0] = PWRSTS_OFF,       /* hwa_mem */
+                [1] = PWRSTS_OFF,       /* sl2_mem */
+                [2] = PWRSTS_OFF,       /* tcm1_mem */
+                [3] = PWRSTS_OFF,       /* tcm2_mem */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* hwa_mem */
-                [1] = PWRSTS_OFF_RET,   /* sl2_mem */
-                [2] = PWRSTS_OFF_RET,   /* tcm1_mem */
-                [3] = PWRSTS_OFF_RET,   /* tcm2_mem */
+                [0] = PWRSTS_ON,        /* hwa_mem */
+                [1] = PWRSTS_ON,        /* sl2_mem */
+                [2] = PWRSTS_ON,        /* tcm1_mem */
+                [3] = PWRSTS_ON,        /* tcm2_mem */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -66,7 +66,7 @@ static struct powerdomain custefuse_7xx_pwrdm = {
         .name             = "custefuse_pwrdm",
         .prcm_offs        = DRA7XX_PRM_CUSTEFUSE_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_ON,
+        .pwrsts           = PWRSTS_ON,
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
 
@@ -75,16 +75,16 @@ static struct powerdomain ipu_7xx_pwrdm = {
         .name             = "ipu_pwrdm",
         .prcm_offs        = DRA7XX_PRM_IPU_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_RET_ON,
+        .pwrsts           = PWRSTS_OFF_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 2,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* aessmem */
-                [1] = PWRSTS_OFF_RET,   /* periphmem */
+                [0] = PWRSTS_OFF,       /* aessmem */
+                [1] = PWRSTS_OFF,       /* periphmem */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* aessmem */
-                [1] = PWRSTS_OFF_RET,   /* periphmem */
+                [0] = PWRSTS_ON,        /* aessmem */
+                [1] = PWRSTS_ON,        /* periphmem */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -94,14 +94,14 @@ static struct powerdomain dss_7xx_pwrdm = {
         .name             = "dss_pwrdm",
         .prcm_offs        = DRA7XX_PRM_DSS_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_RET_ON,
+        .pwrsts           = PWRSTS_OFF_ON,
         .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* dss_mem */
+                [0] = PWRSTS_OFF,       /* dss_mem */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* dss_mem */
+                [0] = PWRSTS_ON,        /* dss_mem */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -111,16 +111,17 @@ static struct powerdomain l4per_7xx_pwrdm = {
         .name             = "l4per_pwrdm",
         .prcm_offs        = DRA7XX_PRM_L4PER_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_RET_ON,
-        .pwrsts_logic_ret = PWRSTS_OFF_RET,
+        .pwrsts           = PWRSTS_ON,
+        /* Due to assymetric aging constraints */
+        .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 2,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* nonretained_bank */
-                [1] = PWRSTS_OFF_RET,   /* retained_bank */
+                [0] = PWRSTS_ON,        /* nonretained_bank */
+                [1] = PWRSTS_ON,        /* retained_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* nonretained_bank */
-                [1] = PWRSTS_OFF_RET,   /* retained_bank */
+                [0] = PWRSTS_ON,        /* nonretained_bank */
+                [1] = PWRSTS_ON,        /* retained_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -133,10 +134,10 @@ static struct powerdomain gpu_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* gpu_mem */
+                [0] = PWRSTS_OFF,       /* gpu_mem */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* gpu_mem */
+                [0] = PWRSTS_ON,        /* gpu_mem */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -164,18 +165,18 @@ static struct powerdomain core_7xx_pwrdm = {
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 5,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* core_nret_bank */
-                [1] = PWRSTS_OFF_RET,   /* core_ocmram */
-                [2] = PWRSTS_OFF_RET,   /* core_other_bank */
-                [3] = PWRSTS_OFF_RET,   /* ipu_l2ram */
-                [4] = PWRSTS_OFF_RET,   /* ipu_unicache */
+                [0] = PWRSTS_ON,        /* core_nret_bank */
+                [1] = PWRSTS_ON,        /* core_ocmram */
+                [2] = PWRSTS_ON,        /* core_other_bank */
+                [3] = PWRSTS_ON,        /* ipu_l2ram */
+                [4] = PWRSTS_ON,        /* ipu_unicache */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* core_nret_bank */
-                [1] = PWRSTS_OFF_RET,   /* core_ocmram */
-                [2] = PWRSTS_OFF_RET,   /* core_other_bank */
-                [3] = PWRSTS_OFF_RET,   /* ipu_l2ram */
-                [4] = PWRSTS_OFF_RET,   /* ipu_unicache */
+                [0] = PWRSTS_ON,        /* core_nret_bank */
+                [1] = PWRSTS_ON,        /* core_ocmram */
+                [2] = PWRSTS_ON,        /* core_other_bank */
+                [3] = PWRSTS_ON,        /* ipu_l2ram */
+                [4] = PWRSTS_ON,        /* ipu_unicache */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -197,7 +198,7 @@ static struct powerdomain cpu0_7xx_pwrdm = {
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* cpu0_l1 */
+                [0] = PWRSTS_OFF,       /* cpu0_l1 */
         },
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* cpu0_l1 */
@@ -213,7 +214,7 @@ static struct powerdomain cpu1_7xx_pwrdm = {
         .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* cpu1_l1 */
+                [0] = PWRSTS_OFF,       /* cpu1_l1 */
         },
         .pwrsts_mem_on  = {
                 [0] = PWRSTS_ON,        /* cpu1_l1 */
@@ -225,14 +226,14 @@ static struct powerdomain vpe_7xx_pwrdm = {
         .name             = "vpe_pwrdm",
         .prcm_offs        = DRA7XX_PRM_VPE_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_RET_ON,
-        .pwrsts_logic_ret = PWRSTS_OFF_RET,
+        .pwrsts           = PWRSTS_INA_ON,
+        .pwrsts_logic_ret = PWRSTS_OFF,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* vpe_bank */
+                [0] = PWRSTS_OFF,       /* vpe_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* vpe_bank */
+                [0] = PWRSTS_ON,        /* vpe_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -250,8 +251,8 @@ static struct powerdomain mpu_7xx_pwrdm = {
                 [1] = PWRSTS_RET,       /* mpu_ram */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* mpu_l2 */
-                [1] = PWRSTS_OFF_RET,   /* mpu_ram */
+                [0] = PWRSTS_ON,        /* mpu_l2 */
+                [1] = PWRSTS_ON,        /* mpu_ram */
         },
 };
 
@@ -260,18 +261,19 @@ static struct powerdomain l3init_7xx_pwrdm = {
         .name             = "l3init_pwrdm",
         .prcm_offs        = DRA7XX_PRM_L3INIT_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_RET_ON,
-        .pwrsts_logic_ret = PWRSTS_OFF_RET,
+        /* Due to Asymettric Aging constraints */
+        .pwrsts           = PWRSTS_ON,
+        .pwrsts_logic_ret = PWRSTS_RET,
         .banks            = 3,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* gmac_bank */
-                [1] = PWRSTS_OFF_RET,   /* l3init_bank1 */
-                [2] = PWRSTS_OFF_RET,   /* l3init_bank2 */
+                [0] = PWRSTS_ON,        /* gmac_bank */
+                [1] = PWRSTS_ON,        /* l3init_bank1 */
+                [2] = PWRSTS_ON,        /* l3init_bank2 */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* gmac_bank */
-                [1] = PWRSTS_OFF_RET,   /* l3init_bank1 */
-                [2] = PWRSTS_OFF_RET,   /* l3init_bank2 */
+                [0] = PWRSTS_ON,        /* gmac_bank */
+                [1] = PWRSTS_ON,        /* l3init_bank1 */
+                [2] = PWRSTS_ON,        /* l3init_bank2 */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -284,10 +286,10 @@ static struct powerdomain eve3_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* eve3_bank */
+                [0] = PWRSTS_OFF,       /* eve3_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* eve3_bank */
+                [0] = PWRSTS_ON,        /* eve3_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -297,13 +299,13 @@ static struct powerdomain emu_7xx_pwrdm = {
         .name             = "emu_pwrdm",
         .prcm_offs        = DRA7XX_PRM_EMU_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_ON,
+        .pwrsts           = PWRSTS_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* emu_bank */
+                [0] = PWRSTS_OFF,       /* emu_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* emu_bank */
+                [0] = PWRSTS_ON,        /* emu_bank */
         },
 };
 
@@ -315,14 +317,14 @@ static struct powerdomain dsp2_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 3,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* dsp2_edma */
-                [1] = PWRSTS_OFF_RET,   /* dsp2_l1 */
-                [2] = PWRSTS_OFF_RET,   /* dsp2_l2 */
+                [0] = PWRSTS_OFF,       /* dsp2_edma */
+                [1] = PWRSTS_OFF,       /* dsp2_l1 */
+                [2] = PWRSTS_OFF,       /* dsp2_l2 */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* dsp2_edma */
-                [1] = PWRSTS_OFF_RET,   /* dsp2_l1 */
-                [2] = PWRSTS_OFF_RET,   /* dsp2_l2 */
+                [0] = PWRSTS_ON,        /* dsp2_edma */
+                [1] = PWRSTS_ON,        /* dsp2_l1 */
+                [2] = PWRSTS_ON,        /* dsp2_l2 */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -335,14 +337,14 @@ static struct powerdomain dsp1_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 3,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* dsp1_edma */
-                [1] = PWRSTS_OFF_RET,   /* dsp1_l1 */
-                [2] = PWRSTS_OFF_RET,   /* dsp1_l2 */
+                [0] = PWRSTS_OFF,       /* dsp1_edma */
+                [1] = PWRSTS_OFF,       /* dsp1_l1 */
+                [2] = PWRSTS_OFF,       /* dsp1_l2 */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* dsp1_edma */
-                [1] = PWRSTS_OFF_RET,   /* dsp1_l1 */
-                [2] = PWRSTS_OFF_RET,   /* dsp1_l2 */
+                [0] = PWRSTS_ON,        /* dsp1_edma */
+                [1] = PWRSTS_ON,        /* dsp1_l1 */
+                [2] = PWRSTS_ON,        /* dsp1_l2 */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -352,13 +354,13 @@ static struct powerdomain cam_7xx_pwrdm = {
         .name             = "cam_pwrdm",
         .prcm_offs        = DRA7XX_PRM_CAM_INST,
         .prcm_partition   = DRA7XX_PRM_PARTITION,
-        .pwrsts           = PWRSTS_OFF_ON,
+        .pwrsts           = PWRSTS_INA_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* vip_bank */
+                [0] = PWRSTS_OFF,       /* vip_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* vip_bank */
+                [0] = PWRSTS_ON,        /* vip_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -371,10 +373,10 @@ static struct powerdomain eve4_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* eve4_bank */
+                [0] = PWRSTS_OFF,       /* eve4_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* eve4_bank */
+                [0] = PWRSTS_ON,        /* eve4_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -387,10 +389,10 @@ static struct powerdomain eve2_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* eve2_bank */
+                [0] = PWRSTS_OFF,       /* eve2_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* eve2_bank */
+                [0] = PWRSTS_ON,        /* eve2_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };
@@ -403,10 +405,10 @@ static struct powerdomain eve1_7xx_pwrdm = {
         .pwrsts           = PWRSTS_OFF_ON,
         .banks            = 1,
         .pwrsts_mem_ret = {
-                [0] = PWRSTS_OFF_RET,   /* eve1_bank */
+                [0] = PWRSTS_OFF,       /* eve1_bank */
         },
         .pwrsts_mem_on  = {
-                [0] = PWRSTS_OFF_RET,   /* eve1_bank */
+                [0] = PWRSTS_ON,        /* eve1_bank */
         },
         .flags            = PWRDM_HAS_LOWPOWERSTATECHANGE,
 };