Revert "ARM: OMAP: DRA7: change IPU1 clk domain to SWSUP for proper boot"glsdk-7.01.00.03

This reverts commit 6d6dd44c55638d54a151bf2ae6cc77b2f4e459d0.

The commit 6d6dd44c5563 ("ARM: OMAP: DRA7: change IPU1 clk domain to SWSUP
for proper boot") switched the IPU1 clock domain to SWSUP only to resolve
an IPU1 boot issue. However, this solution worked only because of another
pre-existing bug in the omap_hwmod code, wherein a usage count for the hwmod
parent clockdomain was incremented during omap_device_deassert_hardreset()
and was never balanced, causing the clockdomain to always remain on and
never allowing the corresponding power domain to enter a low power state.
This eliminated the pre-condition for the IPU1 boot issue. The bug in
omap_hwmod layer was resolved by commit e1d52c6d4ff7 ("ARM: OMAP2+: hwmod:
fix deassert hardreset clkdm usecounting"), and this resulted in the
recurrence of the IPU1 boot issue on some platforms.

The IPU1 boot issue has now been resolved by restricting the target power
domain state to ON during the power-up of the MMU and allowing RET or a
lower power state only when the MMU and the corresponding parent remoteproc
is suspended (system or runtime suspend). So revert back to the default
expected HWSUP mode for the IPU1 clock domain.

Change-Id: Id6d219f4d275c2c1f34e478c8303fb3181aa6553
Signed-off-by: Suman Anna <s-anna@ti.com>

1 files changed, 1 insertions, 1 deletions

diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c b/arch/arm/mach-omap2/clockdomains7xx_data.c
index 7a28ad40a04..b3cbd09e21e 100644
--- a/arch/arm/mach-omap2/clockdomains7xx_data.c
+++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
@@ -373,7 +373,7 @@ static struct clockdomain ipu1_7xx_clkdm = {
         .dep_bit          = DRA7XX_IPU1_STATDEP_SHIFT,
         .wkdep_srcs       = ipu1_wkup_sleep_deps,
         .sleepdep_srcs    = ipu1_wkup_sleep_deps,
-        .flags            = CLKDM_CAN_SWSUP,
+        .flags            = CLKDM_CAN_HWSUP_SWSUP,
 };
 
 static struct clockdomain ipu2_7xx_clkdm = {