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authorSunita Nadampalli2016-05-04 10:10:09 -0500
committerSunita Nadampalli2016-05-04 10:10:09 -0500
commit9937909e3879ec7522c8839b7733fc5b5b42b9ab (patch)
treeb9e428378e4049a9e37040369bbad8c2bd7e20a2
parent1159c452bac00d64b711ed7384d6e5ee9d20d38c (diff)
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ARM: DTSi and DRA7 EVM DTS: changes to define few nodes as variable nodes
Change-Id: I61aaf4a51f3b02eb58d90fb1b34dd0edc367c8e4 Signed-off-by: Sunita Nadampalli <sunitan@ti.com>
-rw-r--r--arch/arm/boot/dts/dra7-evm.dts4
-rw-r--r--arch/arm/boot/dts/dra7.dtsi4
2 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 0f295e29490..fe116d37ca6 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -933,7 +933,7 @@ i2c_p3_exp: &i2c2 {
933 #gpio-cells = <2>; 933 #gpio-cells = <2>;
934 }; 934 };
935 935
936 ov10633@37 { 936 ov_10633: ov10633@37 {
937 compatible = "ovti,ov10633"; 937 compatible = "ovti,ov10633";
938 reg = <0x37>; 938 reg = <0x37>;
939 939
@@ -1273,7 +1273,7 @@ i2c_p3_exp: &i2c2 {
1273 1273
1274&dss { 1274&dss {
1275 status = "ok"; 1275 status = "ok";
1276 ti,enable-opt-clks-on-reset; 1276 ti,enable-opt-clks-on-reset;
1277 1277
1278 vdda_video-supply = <&ldoln_reg>; 1278 vdda_video-supply = <&ldoln_reg>;
1279 1279
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 55a134ad0d6..e7a8a28d1fc 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -1733,7 +1733,7 @@
1733 }; 1733 };
1734 }; 1734 };
1735 1735
1736 vpe { 1736 vpe: vpe {
1737 compatible = "ti,vpe"; 1737 compatible = "ti,vpe";
1738 ti,hwmods = "vpe"; 1738 ti,hwmods = "vpe";
1739 clocks = <&dpll_core_h23x2_ck>; 1739 clocks = <&dpll_core_h23x2_ck>;
@@ -1799,7 +1799,7 @@
1799 #size-cells = <1>; 1799 #size-cells = <1>;
1800 ranges; 1800 ranges;
1801 1801
1802 dispc@58001000 { 1802 dispc: dispc@58001000 {
1803 compatible = "ti,dra7-dispc"; 1803 compatible = "ti,dra7-dispc";
1804 reg = <0x58001000 0x1000>; 1804 reg = <0x58001000 0x1000>;
1805 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 1805 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;