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authorPraneeth Bajjuri2013-07-22 18:07:25 -0500
committerPraneeth Bajjuri2013-07-22 18:07:25 -0500
commit4f5a28b4ccf82ac99544a4d5c6f41257747342b8 (patch)
tree1430d5fda1ca96782b30fd0f6d173cbcf2fcbdc8
parent6d980c810062d883d7e632421532500fc9ac3ad5 (diff)
parent89aa592edb8c3faee6592576763388f3343801b4 (diff)
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Merge branch 'p-ti-linux-3.8.y' into p-ti-android-3.8.y
* p-ti-linux-3.8.y: (30 commits) ARM: dts: dra7-evm: Add HDMI sound node OMAPDSS: HDMI: Fix GPA Channel Setting and Channel Allocation for 6-Channels OMAPDSS: OMAP5: HDMI: Audio InfoFrame DB1 field offsets ASoC: omap-hdmi-card: Remove redundant print ARM: DRA7: hwmod: Fix HDMI irq number ARM: DRA7: clocks: Fix HDMI sys_clk mux register ASoC: DRA7: dra7-evm: HACK: Set McASP DMA reqs in sDMA crossbar ARM: dts: dra7-evm: Add sound card node ARM: dts: dra7: Add ATL node ARM: dts: dra7: Add McASP nodes ARM: dts: dra7-evm: Add audio pinctrl ASoC: DRA7: dra7-evm: Add initial support for DRA7 EVM ASoC: DRA7: atl: Add initial support for Audio Tracking Logic ARM: DRA7: clocks: Append _ck to atl_clkin* and ref_clkin* ARM: DRA7: clock: Fix the wrong ABE PLL lock frequency ARM: DRA7: hwmod: Disable smart-idle for McASP ASoC: davinci-mcasp: Add hw_rule for buffer_size when using AFIFO ASoC: davinci-mcasp: Add support for using McASP DATA port ASoC: davinci-mcasp: HACK: Add MCASP_VERSION_4 support ASoC: davinci-mcasp: Add support for 1-channel ... Conflicts: arch/arm/boot/dts/dra7-evm.dts Change-Id: I6134724d21801c94afeae8fb369f171bae901db6 Signed-off-by: Praneeth Bajjuri <praneeth@ti.com>
-rw-r--r--Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt7
-rw-r--r--Documentation/devicetree/bindings/sound/dra7-atl.txt42
-rw-r--r--Documentation/devicetree/bindings/sound/dra7-evm.txt60
-rwxr-xr-xarch/arm/boot/dts/dra7-evm.dts83
-rw-r--r--arch/arm/boot/dts/dra7.dtsi40
-rw-r--r--arch/arm/mach-omap2/cclock7xx_data.c23
-rw-r--r--arch/arm/mach-omap2/omap_hwmod_7xx_data.c26
-rw-r--r--drivers/video/omap2/dss/ti_hdmi_5xxx_ip.c11
-rw-r--r--include/linux/platform_data/davinci_asp.h3
-rw-r--r--sound/soc/davinci/davinci-mcasp.c507
-rw-r--r--sound/soc/davinci/davinci-mcasp.h9
-rw-r--r--sound/soc/davinci/davinci-pcm.h15
-rw-r--r--sound/soc/omap/Kconfig12
-rw-r--r--sound/soc/omap/Makefile4
-rw-r--r--sound/soc/omap/dra7-atl.c317
-rw-r--r--sound/soc/omap/dra7-evm.c331
-rw-r--r--sound/soc/omap/omap-hdmi-card.c2
-rw-r--r--sound/soc/omap/omap-hdmi.c6
-rw-r--r--sound/soc/omap/omap-pcm.c2
19 files changed, 1370 insertions, 130 deletions
diff --git a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
index 374e145c2ef..9bac63e73eb 100644
--- a/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
+++ b/Documentation/devicetree/bindings/sound/davinci-mcasp-audio.txt
@@ -5,6 +5,7 @@ Required properties:
5 "ti,dm646x-mcasp-audio" : for DM646x platforms 5 "ti,dm646x-mcasp-audio" : for DM646x platforms
6 "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms 6 "ti,da830-mcasp-audio" : for both DA830 & DA850 platforms
7 "ti,omap2-mcasp-audio" : for OMAP2 platforms (TI81xx, AM33xx) 7 "ti,omap2-mcasp-audio" : for OMAP2 platforms (TI81xx, AM33xx)
8 "ti,dra7-mcasp-audio" : for DRA7xx platforms
8 9
9- reg : Should contain McASP registers offset and length 10- reg : Should contain McASP registers offset and length
10- interrupts : Interrupt number for McASP 11- interrupts : Interrupt number for McASP
@@ -23,6 +24,10 @@ Optional properties:
23- rx-num-evt : FIFO levels. 24- rx-num-evt : FIFO levels.
24- sram-size-playback : size of sram to be allocated during playback 25- sram-size-playback : size of sram to be allocated during playback
25- sram-size-capture : size of sram to be allocated during capture 26- sram-size-capture : size of sram to be allocated during capture
27- ti,tx-inactive-mode : Transmit pin mode while in an inactive slot (0 - Hi-Z,
28 2 - Low, 3 - High)
29- ti,rx-inactive-mode : Receive pin mode while in an inactive slot (0 - Hi-Z,
30 2 - Low, 3 - High)
26 31
27Example: 32Example:
28 33
@@ -42,4 +47,6 @@ mcasp0: mcasp0@1d00000 {
42 2 0 0 0 >; 47 2 0 0 0 >;
43 tx-num-evt = <1>; 48 tx-num-evt = <1>;
44 rx-num-evt = <1>; 49 rx-num-evt = <1>;
50 ti,tx-inactive-mode = <0>; /* 0: Hi-Z, 2: Low, 3: High */
51 ti,rx-inactive-mode = <0>; /* 0: Hi-Z, 2: Low, 3: High */
45}; 52};
diff --git a/Documentation/devicetree/bindings/sound/dra7-atl.txt b/Documentation/devicetree/bindings/sound/dra7-atl.txt
new file mode 100644
index 00000000000..cd85aa3477c
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/dra7-atl.txt
@@ -0,0 +1,42 @@
1* Texas Instruments DRA7 Audio Tracking Logic (ATL)
2
3Required properties:
4- compatible: "ti,dra7-atl"
5- ti,hwmods: Name of the hwmod associated with the ATL module
6
7
8Optional properties:
9- ti,atclk<n>-freq: Output clock frequency for ATL instance n.
10 ATL instance is disabled if this property is not set
11- ti,atl<n>-bws-input: ATL baseband word select input for ATL instance n.
12 Possible inputs are:
13 0 - McASP1 FSR
14 1 - McASP1 FSX
15 2 - McASP2 FSR
16 3 - McASP2 FSX
17 4 - McASP3 FSX
18 5 - McASP4 FSX
19 6 - McASP5 FSX
20 7 - McASP6 FSX
21 8 - McASP7 FSX
22 9 - McASP8 FSX
23 10 - McASP8 AHCLKX
24 11 - XREF_CLK3 input pad
25 12 - XREF_CLK0 input pad
26 13 - XREF_CLK1 input pad
27 14 - XREF_CLK2 input pad
28 15 - OSC1_X1 input pad
29- ti,atl<n>-aws-input: Audio word select input for ATL instance n.
30 Same inputs than BWS.
31
32
33Example:
34
35atl: atl@0x4843c000 {
36 compatible = "ti,dra7-atl";
37 reg = <0x4843c000 0x3ff>;
38 ti,hwmods = "atl";
39 ti,atclk1-freq = <11289600>; /* 11.2896 MHz */
40 ti,atl1-bws-input = <2>; /* McASP2 FSR */
41 ti,atl1-aws-input = <4>; /* McASP3 FSX */
42};
diff --git a/Documentation/devicetree/bindings/sound/dra7-evm.txt b/Documentation/devicetree/bindings/sound/dra7-evm.txt
new file mode 100644
index 00000000000..1eeed6e6d67
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/dra7-evm.txt
@@ -0,0 +1,60 @@
1* Texas Instruments DRA7 EVM sound
2
3Required properties:
4- compatible: "ti,dra7-evm-sound"
5- ti,mode: Name of the sound card
6- ti,media-cpu: phandle for the McASP node in media link
7- ti,media-codec: phandle for the analog codec in media link
8- ti,media-mclk-freq: MCLK frequency for the analog codec in media link
9- ti,media-slots: Number of slots
10- ti,audio-routing: List of connections between audio components.
11 Each entry is a pair of strings, the first being the connection's sink,
12 the second being the connection's source.
13
14Available audio endpoints for the audio-routing table:
15
16Board connectors:
17 * Main Mic
18 * Line In
19 * Headphone
20 * Line Out
21
22tlv320aic3x pins:
23 * LLOUT
24 * RLOUT
25 * MONO_LOUT
26 * HPLOUT
27 * HPROUT
28 * HPLCOM
29 * HPCOM
30 * MIC3L
31 * MIC3R
32 * LINE1L
33 * LINE1R
34 * LINE2L
35 * LINE2R
36
37Example:
38
39sound {
40 compatible = "ti,dra7-evm-sound";
41 ti,model = "DRA7-EVM";
42
43 /* Media DAI link */
44 ti,media-cpu = <&mcasp3>;
45 ti,media-codec = <&tlv320aic3106>;
46 ti,media-mclk-freq = <1411200>;
47 ti,media-slots = <2>;
48
49 /* Audio routing */
50 ti,audio-routing =
51 "LINE1L", "Line In",
52 "LINE1R", "Line In",
53 "MIC3L", "Main Mic",
54 "MIC3R", "Main Mic",
55 "Main Mic", "Mic Bias 2V",
56 "Headphone", "HPLOUT",
57 "Headphone", "HPROUT",
58 "Line Out", "LLOUT",
59 "Line Out", "RLOUT";
60};
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 02c910fb211..2c902e95194 100755
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -49,15 +49,89 @@
49 gpu-supply = <&avs_gpu>; 49 gpu-supply = <&avs_gpu>;
50 }; 50 };
51 }; 51 };
52
53 vaudio_1v8: fixedregulator-vaudio-dig {
54 compatible = "regulator-fixed";
55 regulator-name = "vdac_fixed";
56 regulator-min-microvolt = <1800000>;
57 regulator-max-microvolt = <1800000>;
58 regulator-boot-on;
59 };
60
61 vaudio_3v3: fixedregulator-vaudio-anlg {
62 compatible = "regulator-fixed";
63 regulator-name = "vdac_fixed";
64 regulator-min-microvolt = <3300000>;
65 regulator-max-microvolt = <3300000>;
66 regulator-boot-on;
67 };
68
69 sound {
70 compatible = "ti,dra7-evm-sound";
71 ti,model = "dra7evm";
72
73 /* Audio routing */
74 ti,audio-routing =
75 "LINE1L", "Line In",
76 "LINE1R", "Line In",
77 "MIC3L", "Mic Bias 2V",
78 "MIC3R", "Mic Bias 2V",
79 "Mic Bias 2V", "Main Mic",
80 "Headphone", "HPLOUT",
81 "Headphone", "HPROUT",
82 "Line Out", "LLOUT",
83 "Line Out", "RLOUT";
84
85 /* Media DAI link */
86 ti,media-cpu = <&mcasp3>;
87 ti,media-codec = <&tlv320aic3106>;
88 ti,media-mclk-freq = <5644800>;
89 ti,media-slots = <2>;
90 };
91
92 sound_hdmi {
93 compatible = "ti,omap-hdmi-tpd12s015-audio";
94 ti,model = "OMAP5HDMI";
95 ti,hdmi_audio = <&hdmi>;
96 ti,level_shifter = <&tpd12s015>;
97 };
52}; 98};
53 99
54&dra7_pmx_core { 100&dra7_pmx_core {
55 pinctrl-names = "default"; 101 pinctrl-names = "default";
56 pinctrl-0 = < 102 pinctrl-0 = <
103 &atl_pins
104 &mcasp3_pins
105 &mcasp6_pins
57 &vout1_pins 106 &vout1_pins
58 &usb_pins 107 &usb_pins
59 >; 108 >;
60 109
110 atl_pins: pinmux_atl_pins {
111 pinctrl-single,pins = <
112 0x298 0x00000005 /* xref_clk1.atl_clk1 OUTPUT | MODE5 */
113 0x29c 0x00000005 /* xref_clk2.atl_clk2 OUTPUT | MODE5 */
114 >;
115 };
116
117 mcasp3_pins: pinmux_mcasp3_pins {
118 pinctrl-single,pins = <
119 0x324 0x00000000 /* mcasp3_aclkx.mcasp3_aclkx OUTPUT | MODE0 */
120 0x328 0x00000000 /* mcasp3_fsx.mcasp3_fsx OUTPUT | MODE0 */
121 0x32c 0x00000000 /* mcasp3_axr0.mcasp3_axr0 OUTPUT | MODE0 */
122 0x330 0x00040000 /* mcasp3_axr1.mcasp3_axr1 INPUT | MODE0 */
123 >;
124 };
125
126 mcasp6_pins: pinmux_mcasp6_pins {
127 pinctrl-single,pins = <
128 0x2d4 0x00000001 /* mcasp1_axr8.mcasp6_axr0 OUTPUT | MODE1 */
129 0x2d8 0x00040001 /* mcasp1_axr9.mcasp6_axr1 INPUT | MODE 1 */
130 0x2dc 0x00000001 /* mcasp1_axr10.mcasp6_clkx OUTPUT | MODE1 */
131 0x2e0 0x00000001 /* mcasp1_axr11.mcasp6_fsx OUTPUT | MODE1 */
132 >;
133 };
134
61 usb_pins: pinmux_usb_pins { 135 usb_pins: pinmux_usb_pins {
62 pinctrl-single,pins = < 136 pinctrl-single,pins = <
63 0x280 0xc0000 /* DRV1_VBUS SLEW | PULLDEN | MODE0 */ 137 0x280 0xc0000 /* DRV1_VBUS SLEW | PULLDEN | MODE0 */
@@ -132,6 +206,15 @@
132 reg = <0x40>; 206 reg = <0x40>;
133 gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */ 207 gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */
134 }; 208 };
209
210 tlv320aic3106: tlv320aic3106@18 {
211 compatible = "ti,tlv320aic3x";
212 reg = <0x18>;
213 IOVDD-supply = <&vaudio_3v3>;
214 DVDD-supply = <&vaudio_1v8>;
215 AVDD-supply = <&vaudio_3v3>;
216 DRVDD-supply = <&vaudio_3v3>;
217 };
135}; 218};
136 219
137/include/ "tps659038.dtsi" 220/include/ "tps659038.dtsi"
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index a1f1ea62feb..2e9e4b546d4 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -668,5 +668,45 @@
668 video-source = <1>; 668 video-source = <1>;
669 }; 669 };
670 }; 670 };
671
672 atl: atl@0x4843c000 {
673 compatible = "ti,dra7-atl";
674 reg = <0x4843c000 0x3ff>;
675 ti,hwmods = "atl";
676 ti,atclk1-freq = <11289600>;
677 ti,atl1-bws-input = <3>; /* McASP2 FSX */
678 ti,atl1-aws-input = <15>; /* McASP6 FSX */
679 ti,atclk2-freq = <5644800>;
680 ti,atl2-bws-input = <3>; /* McASP2 FSX */
681 ti,atl2-aws-input = <4>; /* McASP3 FSX */
682 };
683
684 mcasp3: mcasp@48468000 {
685 compatible = "ti,dra7-mcasp-audio";
686 reg = <0x48468000 0x2000>;
687 interrupts = <0 108 0x4>, /* AREVT */
688 <0 109 0x4>; /* TXEVT */
689 ti,hwmods = "mcasp3";
690 op-mode = <0>; /* MCASP_IIS_MODE */
691 tdm-slots = <2>;
692 num-serializer = <4>;
693 serial-dir = <1 2 0 0>; /* 0:INACTIVE, 1:TX, 2:RX */
694 ti,tx-inactive-mode = <2>; /* 0: Hi-Z, 2: Low, 3: High */
695 ti,rx-inactive-mode = <2>; /* 0: Hi-Z, 2: Low, 3: High */
696 };
697
698 mcasp6: mcasp@48474000 {
699 compatible = "ti,dra7-mcasp-audio";
700 reg = <0x48474000 0x2000>;
701 interrupts = <0 108 0x4>, /* AREVT */
702 <0 109 0x4>; /* TXEVT */
703 ti,hwmods = "mcasp6";
704 op-mode = <0>; /* MCASP_IIS_MODE */
705 tdm-slots = <8>;
706 num-serializer = <4>;
707 serial-dir = <1 2 0 0>; /* 0:INACTIVE, 1:TX, 2:RX */
708 ti,tx-inactive-mode = <2>; /* 0: Hi-Z, 2: Low, 3: High */
709 ti,rx-inactive-mode = <2>; /* 0: Hi-Z, 2: Low, 3: High */
710 };
671 }; 711 };
672}; 712};
diff --git a/arch/arm/mach-omap2/cclock7xx_data.c b/arch/arm/mach-omap2/cclock7xx_data.c
index d6b4a0b5a95..70bbe2c7760 100644
--- a/arch/arm/mach-omap2/cclock7xx_data.c
+++ b/arch/arm/mach-omap2/cclock7xx_data.c
@@ -40,7 +40,7 @@
40#include "prm-regbits-7xx.h" 40#include "prm-regbits-7xx.h"
41#include "control.h" 41#include "control.h"
42 42
43#define DRA7_DPLL_ABE_DEFFREQ 361267200 43#define DRA7_DPLL_ABE_DEFFREQ 180633600
44#define DRA7_DPLL_GMAC_DEFFREQ 1000000000 44#define DRA7_DPLL_GMAC_DEFFREQ 1000000000
45#define DRA7_DPLL_USB_DEFFREQ 960000000 45#define DRA7_DPLL_USB_DEFFREQ 960000000
46 46
@@ -52,7 +52,7 @@ DEFINE_CLK_FIXED_RATE(atl_clkin1_ck, CLK_IS_ROOT, 0, 0x0);
52 52
53DEFINE_CLK_FIXED_RATE(atl_clkin2_ck, CLK_IS_ROOT, 0, 0x0); 53DEFINE_CLK_FIXED_RATE(atl_clkin2_ck, CLK_IS_ROOT, 0, 0x0);
54 54
55DEFINE_CLK_FIXED_RATE(atlclkin3_ck, CLK_IS_ROOT, 0, 0x0); 55DEFINE_CLK_FIXED_RATE(atl_clkin3_ck, CLK_IS_ROOT, 0, 0x0);
56 56
57DEFINE_CLK_FIXED_RATE(hdmi_clkin_ck, CLK_IS_ROOT, 0, 0x0); 57DEFINE_CLK_FIXED_RATE(hdmi_clkin_ck, CLK_IS_ROOT, 0, 0x0);
58 58
@@ -1246,7 +1246,7 @@ static struct clk_hw_omap hdmi_div_clk_hw = {
1246DEFINE_STRUCT_CLK(hdmi_div_clk, hdmi_dclk_div_parents, apll_pcie_clkvcoldo_ops); 1246DEFINE_STRUCT_CLK(hdmi_div_clk, hdmi_dclk_div_parents, apll_pcie_clkvcoldo_ops);
1247 1247
1248DEFINE_CLK_MUX(hdmi_dpll_clk_mux, abe_dpll_sys_clk_mux_parents, NULL, 0x0, 1248DEFINE_CLK_MUX(hdmi_dpll_clk_mux, abe_dpll_sys_clk_mux_parents, NULL, 0x0,
1249 DRA7XX_CM_CLKSEL_HDMI_CLK_CLKOUTMUX, DRA7XX_CLKSEL_SHIFT, 1249 DRA7XX_CM_CLKSEL_HDMI_PLL_SYS, DRA7XX_CLKSEL_SHIFT,
1250 DRA7XX_CLKSEL_WIDTH, 0x0, NULL); 1250 DRA7XX_CLKSEL_WIDTH, 0x0, NULL);
1251 1251
1252static struct clk l3_iclk_div; 1252static struct clk l3_iclk_div;
@@ -1558,9 +1558,9 @@ DEFINE_CLK_DIVIDER_TABLE(l3instr_ts_gclk_div, "wkupaon_iclk_mux",
1558 1558
1559static const char *mcasp1_ahclkr_mux_parents[] = { 1559static const char *mcasp1_ahclkr_mux_parents[] = {
1560 "abe_24m_fclk", "abe_sys_clk_div", "func_24m_clk", 1560 "abe_24m_fclk", "abe_sys_clk_div", "func_24m_clk",
1561 "atlclkin3", "atl_clkin2", "atl_clkin1", 1561 "atl_clkin3_ck", "atl_clkin2_ck", "atl_clkin1_ck",
1562 "atl_clkin0", "sys_clkin2", "ref_clkin0", 1562 "atl_clkin0_ck", "sys_clkin2", "ref_clkin0_ck",
1563 "ref_clkin1", "ref_clkin2", "ref_clkin3", 1563 "ref_clkin1_ck", "ref_clkin2_ck", "ref_clkin3_ck",
1564 "mlb_clk", "mlbp_clk", 1564 "mlb_clk", "mlbp_clk",
1565}; 1565};
1566 1566
@@ -1695,8 +1695,8 @@ DEFINE_CLK_DIVIDER(qspi_gfclk_div, "qspi_gfclk_mux", &qspi_gfclk_mux, 0x0,
1695 1695
1696static const char *timer10_gfclk_mux_parents[] = { 1696static const char *timer10_gfclk_mux_parents[] = {
1697 "timer_sys_clk_div", "sys_32k_ck", "sys_clkin2", 1697 "timer_sys_clk_div", "sys_32k_ck", "sys_clkin2",
1698 "ref_clkin0", "ref_clkin1", "ref_clkin2", 1698 "ref_clkin0_ck", "ref_clkin1_ck", "ref_clkin2_ck",
1699 "ref_clkin3", "abe_giclk_div", "video1_div_clk", 1699 "ref_clkin3_ck", "abe_giclk_div", "video1_div_clk",
1700 "video2_div_clk", "hdmi_div_clk", 1700 "video2_div_clk", "hdmi_div_clk",
1701}; 1701};
1702 1702
@@ -1742,8 +1742,8 @@ DEFINE_CLK_MUX(timer4_gfclk_mux, timer10_gfclk_mux_parents, NULL, 0x0,
1742 1742
1743static const char *timer5_gfclk_mux_parents[] = { 1743static const char *timer5_gfclk_mux_parents[] = {
1744 "timer_sys_clk_div", "sys_32k_ck", "sys_clkin2", 1744 "timer_sys_clk_div", "sys_32k_ck", "sys_clkin2",
1745 "ref_clkin0", "ref_clkin1", "ref_clkin2", 1745 "ref_clkin0_ck", "ref_clkin1_ck", "ref_clkin2_ck",
1746 "ref_clkin3", "abe_giclk_div", "video1_div_clk", 1746 "ref_clkin3_ck", "abe_giclk_div", "video1_div_clk",
1747 "video2_div_clk", "hdmi_div_clk", "clkoutmux0_clk_mux", 1747 "video2_div_clk", "hdmi_div_clk", "clkoutmux0_clk_mux",
1748}; 1748};
1749 1749
@@ -1831,7 +1831,7 @@ static struct omap_clk dra7xx_clks[] = {
1831 CLK(NULL, "atl_clkin0_ck", &atl_clkin0_ck, CK_7XX), 1831 CLK(NULL, "atl_clkin0_ck", &atl_clkin0_ck, CK_7XX),
1832 CLK(NULL, "atl_clkin1_ck", &atl_clkin1_ck, CK_7XX), 1832 CLK(NULL, "atl_clkin1_ck", &atl_clkin1_ck, CK_7XX),
1833 CLK(NULL, "atl_clkin2_ck", &atl_clkin2_ck, CK_7XX), 1833 CLK(NULL, "atl_clkin2_ck", &atl_clkin2_ck, CK_7XX),
1834 CLK(NULL, "atlclkin3_ck", &atlclkin3_ck, CK_7XX), 1834 CLK(NULL, "atl_clkin3_ck", &atl_clkin3_ck, CK_7XX),
1835 CLK(NULL, "hdmi_clkin_ck", &hdmi_clkin_ck, CK_7XX), 1835 CLK(NULL, "hdmi_clkin_ck", &hdmi_clkin_ck, CK_7XX),
1836 CLK(NULL, "mlb_clkin_ck", &mlb_clkin_ck, CK_7XX), 1836 CLK(NULL, "mlb_clkin_ck", &mlb_clkin_ck, CK_7XX),
1837 CLK(NULL, "mlbp_clkin_ck", &mlbp_clkin_ck, CK_7XX), 1837 CLK(NULL, "mlbp_clkin_ck", &mlbp_clkin_ck, CK_7XX),
@@ -2126,6 +2126,7 @@ static struct reparent_init_clks reparent_clks[] = {
2126 2126
2127static struct rate_init_clks rate_clks[] = { 2127static struct rate_init_clks rate_clks[] = {
2128 { .name = "dpll_abe_ck", .rate = DRA7_DPLL_ABE_DEFFREQ }, 2128 { .name = "dpll_abe_ck", .rate = DRA7_DPLL_ABE_DEFFREQ },
2129 { .name = "dpll_abe_m2x2_ck", .rate = DRA7_DPLL_ABE_DEFFREQ * 2 },
2129 { .name = "dpll_gmac_ck", .rate = DRA7_DPLL_GMAC_DEFFREQ }, 2130 { .name = "dpll_gmac_ck", .rate = DRA7_DPLL_GMAC_DEFFREQ },
2130 { .name = "dpll_usb_ck", .rate = DRA7_DPLL_USB_DEFFREQ }, 2131 { .name = "dpll_usb_ck", .rate = DRA7_DPLL_USB_DEFFREQ },
2131}; 2132};
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8d09dfbaf6..c9db73b816a 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -600,7 +600,7 @@ static struct omap_hwmod_class dra7xx_hdmi_hwmod_class = {
600 600
601/* dss_hdmi */ 601/* dss_hdmi */
602static struct omap_hwmod_irq_info dra7xx_dss_hdmi_irqs[] = { 602static struct omap_hwmod_irq_info dra7xx_dss_hdmi_irqs[] = {
603 { .irq = 101 + DRA7XX_IRQ_GIC_START }, 603 { .irq = 96 + DRA7XX_IRQ_GIC_START },
604 { .irq = -1 } 604 { .irq = -1 }
605}; 605};
606 606
@@ -1518,6 +1518,7 @@ static struct omap_hwmod dra7xx_mcasp1_hwmod = {
1518 .class = &dra7xx_mcasp_hwmod_class, 1518 .class = &dra7xx_mcasp_hwmod_class,
1519 .clkdm_name = "ipu_clkdm", 1519 .clkdm_name = "ipu_clkdm",
1520 .main_clk = "mcasp1_ahclkx_mux", 1520 .main_clk = "mcasp1_ahclkx_mux",
1521 .flags = HWMOD_SWSUP_SIDLE,
1521 .prcm = { 1522 .prcm = {
1522 .omap4 = { 1523 .omap4 = {
1523 .clkctrl_offs = DRA7XX_CM_IPU_MCASP1_CLKCTRL_OFFSET, 1524 .clkctrl_offs = DRA7XX_CM_IPU_MCASP1_CLKCTRL_OFFSET,
@@ -1533,6 +1534,7 @@ static struct omap_hwmod dra7xx_mcasp2_hwmod = {
1533 .class = &dra7xx_mcasp_hwmod_class, 1534 .class = &dra7xx_mcasp_hwmod_class,
1534 .clkdm_name = "l4per2_clkdm", 1535 .clkdm_name = "l4per2_clkdm",
1535 .main_clk = "mcasp2_ahclkr_mux", 1536 .main_clk = "mcasp2_ahclkr_mux",
1537 .flags = HWMOD_SWSUP_SIDLE,
1536 .prcm = { 1538 .prcm = {
1537 .omap4 = { 1539 .omap4 = {
1538 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP2_CLKCTRL_OFFSET, 1540 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP2_CLKCTRL_OFFSET,
@@ -1542,12 +1544,21 @@ static struct omap_hwmod dra7xx_mcasp2_hwmod = {
1542 }, 1544 },
1543}; 1545};
1544 1546
1547/* HACK: Taken from UART6 since they're not used in dra7-evm */
1548static struct omap_hwmod_dma_info dra7xx_mcasp3_sdma_reqs[] = {
1549 { .name = "tx", .dma_req = 78 + DRA7XX_DMA_REQ_START },
1550 { .name = "rx", .dma_req = 79 + DRA7XX_DMA_REQ_START },
1551 { .dma_req = -1 }
1552};
1553
1545/* mcasp3 */ 1554/* mcasp3 */
1546static struct omap_hwmod dra7xx_mcasp3_hwmod = { 1555static struct omap_hwmod dra7xx_mcasp3_hwmod = {
1547 .name = "mcasp3", 1556 .name = "mcasp3",
1548 .class = &dra7xx_mcasp_hwmod_class, 1557 .class = &dra7xx_mcasp_hwmod_class,
1549 .clkdm_name = "l4per2_clkdm", 1558 .clkdm_name = "l4per2_clkdm",
1550 .main_clk = "mcasp3_ahclkx_mux", 1559 .main_clk = "mcasp3_ahclkx_mux",
1560 .sdma_reqs = dra7xx_mcasp3_sdma_reqs,
1561 .flags = HWMOD_SWSUP_SIDLE,
1551 .prcm = { 1562 .prcm = {
1552 .omap4 = { 1563 .omap4 = {
1553 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET, 1564 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP3_CLKCTRL_OFFSET,
@@ -1563,6 +1574,7 @@ static struct omap_hwmod dra7xx_mcasp4_hwmod = {
1563 .class = &dra7xx_mcasp_hwmod_class, 1574 .class = &dra7xx_mcasp_hwmod_class,
1564 .clkdm_name = "l4per2_clkdm", 1575 .clkdm_name = "l4per2_clkdm",
1565 .main_clk = "mcasp4_ahclkx_mux", 1576 .main_clk = "mcasp4_ahclkx_mux",
1577 .flags = HWMOD_SWSUP_SIDLE,
1566 .prcm = { 1578 .prcm = {
1567 .omap4 = { 1579 .omap4 = {
1568 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP4_CLKCTRL_OFFSET, 1580 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP4_CLKCTRL_OFFSET,
@@ -1578,6 +1590,7 @@ static struct omap_hwmod dra7xx_mcasp5_hwmod = {
1578 .class = &dra7xx_mcasp_hwmod_class, 1590 .class = &dra7xx_mcasp_hwmod_class,
1579 .clkdm_name = "l4per2_clkdm", 1591 .clkdm_name = "l4per2_clkdm",
1580 .main_clk = "mcasp5_ahclkx_mux", 1592 .main_clk = "mcasp5_ahclkx_mux",
1593 .flags = HWMOD_SWSUP_SIDLE,
1581 .prcm = { 1594 .prcm = {
1582 .omap4 = { 1595 .omap4 = {
1583 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP5_CLKCTRL_OFFSET, 1596 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP5_CLKCTRL_OFFSET,
@@ -1587,12 +1600,21 @@ static struct omap_hwmod dra7xx_mcasp5_hwmod = {
1587 }, 1600 },
1588}; 1601};
1589 1602
1603/* HACK: Taken from UART5 since they're not used in dra7-evm */
1604static struct omap_hwmod_dma_info dra7xx_mcasp6_sdma_reqs[] = {
1605 { .name = "tx", .dma_req = 62 + DRA7XX_DMA_REQ_START },
1606 { .name = "rx", .dma_req = 63 + DRA7XX_DMA_REQ_START },
1607 { .dma_req = -1 }
1608};
1609
1590/* mcasp6 */ 1610/* mcasp6 */
1591static struct omap_hwmod dra7xx_mcasp6_hwmod = { 1611static struct omap_hwmod dra7xx_mcasp6_hwmod = {
1592 .name = "mcasp6", 1612 .name = "mcasp6",
1593 .class = &dra7xx_mcasp_hwmod_class, 1613 .class = &dra7xx_mcasp_hwmod_class,
1594 .clkdm_name = "l4per2_clkdm", 1614 .clkdm_name = "l4per2_clkdm",
1595 .main_clk = "mcasp6_ahclkx_mux", 1615 .main_clk = "mcasp6_ahclkx_mux",
1616 .sdma_reqs = dra7xx_mcasp6_sdma_reqs,
1617 .flags = HWMOD_SWSUP_SIDLE,
1596 .prcm = { 1618 .prcm = {
1597 .omap4 = { 1619 .omap4 = {
1598 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP6_CLKCTRL_OFFSET, 1620 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP6_CLKCTRL_OFFSET,
@@ -1608,6 +1630,7 @@ static struct omap_hwmod dra7xx_mcasp7_hwmod = {
1608 .class = &dra7xx_mcasp_hwmod_class, 1630 .class = &dra7xx_mcasp_hwmod_class,
1609 .clkdm_name = "l4per2_clkdm", 1631 .clkdm_name = "l4per2_clkdm",
1610 .main_clk = "mcasp7_ahclkx_mux", 1632 .main_clk = "mcasp7_ahclkx_mux",
1633 .flags = HWMOD_SWSUP_SIDLE,
1611 .prcm = { 1634 .prcm = {
1612 .omap4 = { 1635 .omap4 = {
1613 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP7_CLKCTRL_OFFSET, 1636 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP7_CLKCTRL_OFFSET,
@@ -1623,6 +1646,7 @@ static struct omap_hwmod dra7xx_mcasp8_hwmod = {
1623 .class = &dra7xx_mcasp_hwmod_class, 1646 .class = &dra7xx_mcasp_hwmod_class,
1624 .clkdm_name = "l4per2_clkdm", 1647 .clkdm_name = "l4per2_clkdm",
1625 .main_clk = "mcasp8_ahclk_mux", 1648 .main_clk = "mcasp8_ahclk_mux",
1649 .flags = HWMOD_SWSUP_SIDLE,
1626 .prcm = { 1650 .prcm = {
1627 .omap4 = { 1651 .omap4 = {
1628 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP8_CLKCTRL_OFFSET, 1652 .clkctrl_offs = DRA7XX_CM_L4PER2_MCASP8_CLKCTRL_OFFSET,
diff --git a/drivers/video/omap2/dss/ti_hdmi_5xxx_ip.c b/drivers/video/omap2/dss/ti_hdmi_5xxx_ip.c
index 232d708df0e..c77d865b1f9 100644
--- a/drivers/video/omap2/dss/ti_hdmi_5xxx_ip.c
+++ b/drivers/video/omap2/dss/ti_hdmi_5xxx_ip.c
@@ -898,10 +898,15 @@ static void ti_hdmi_5xxx_core_audio_config(struct hdmi_ip_data *ip_data,
898 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_CONF0, 0, 5, 5); 898 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_CONF0, 0, 5, 5);
899 /* enable two channels in GPA */ 899 /* enable two channels in GPA */
900 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_GP_CONF1, 3, 7, 0); 900 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_GP_CONF1, 3, 7, 0);
901 } else if (cfg->layout == HDMI_AUDIO_LAYOUT_6CH) {
902 /* select HBR/SPDIF interfaces */
903 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_CONF0, 0, 5, 5);
904 /* enable six channels in GPA */
905 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_GP_CONF1, 0x3F, 7, 0);
901 } else { 906 } else {
902 /* select HBR/SPDIF interfaces */ 907 /* select HBR/SPDIF interfaces */
903 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_CONF0, 0, 5, 5); 908 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_CONF0, 0, 5, 5);
904 /* enable two channels in GPA */ 909 /* enable eight channels in GPA */
905 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_GP_CONF1, 0xFF, 7, 0); 910 REG_FLD_MOD(core_sys_base, HDMI_CORE_AUD_GP_CONF1, 0xFF, 7, 0);
906 } 911 }
907 912
@@ -924,8 +929,10 @@ static void ti_hdmi_5xxx_core_audio_infoframe_cfg
924{ 929{
925 void __iomem *core_sys_base = hdmi_core_sys_base(ip_data); 930 void __iomem *core_sys_base = hdmi_core_sys_base(ip_data);
926 931
932 /* Channel count and coding type fields in AUDICONF0 are swapped */
927 hdmi_write_reg(core_sys_base, HDMI_CORE_FC_AUDICONF0, 933 hdmi_write_reg(core_sys_base, HDMI_CORE_FC_AUDICONF0,
928 info_aud->db1_ct_cc); 934 (info_aud->db1_ct_cc & CEA861_AUDIO_INFOFRAME_DB1CC)<<4 |
935 (info_aud->db1_ct_cc & CEA861_AUDIO_INFOFRAME_DB1CT)>>4);
929 936
930 hdmi_write_reg(core_sys_base, HDMI_CORE_FC_AUDICONF1, 937 hdmi_write_reg(core_sys_base, HDMI_CORE_FC_AUDICONF1,
931 info_aud->db2_sf_ss); 938 info_aud->db2_sf_ss);
diff --git a/include/linux/platform_data/davinci_asp.h b/include/linux/platform_data/davinci_asp.h
index 8db5ae03b6e..416c1d2abe6 100644
--- a/include/linux/platform_data/davinci_asp.h
+++ b/include/linux/platform_data/davinci_asp.h
@@ -84,12 +84,15 @@ struct snd_platform_data {
84 u8 version; 84 u8 version;
85 u8 txnumevt; 85 u8 txnumevt;
86 u8 rxnumevt; 86 u8 rxnumevt;
87 u32 tx_dismod;
88 u32 rx_dismod;
87}; 89};
88 90
89enum { 91enum {
90 MCASP_VERSION_1 = 0, /* DM646x */ 92 MCASP_VERSION_1 = 0, /* DM646x */
91 MCASP_VERSION_2, /* DA8xx/OMAPL1x */ 93 MCASP_VERSION_2, /* DA8xx/OMAPL1x */
92 MCASP_VERSION_3, /* TI81xx/AM33xx */ 94 MCASP_VERSION_3, /* TI81xx/AM33xx */
95 MCASP_VERSION_4, /* DRA7xxx */
93}; 96};
94 97
95enum mcbsp_clk_input_pin { 98enum mcbsp_clk_input_pin {
diff --git a/sound/soc/davinci/davinci-mcasp.c b/sound/soc/davinci/davinci-mcasp.c
index 7ba62e99087..ef30dbdd7ae 100644
--- a/sound/soc/davinci/davinci-mcasp.c
+++ b/sound/soc/davinci/davinci-mcasp.c
@@ -25,6 +25,7 @@
25#include <linux/of.h> 25#include <linux/of.h>
26#include <linux/of_platform.h> 26#include <linux/of_platform.h>
27#include <linux/of_device.h> 27#include <linux/of_device.h>
28#include <linux/lcm.h>
28 29
29#include <sound/core.h> 30#include <sound/core.h>
30#include <sound/pcm.h> 31#include <sound/pcm.h>
@@ -34,6 +35,7 @@
34 35
35#include "davinci-pcm.h" 36#include "davinci-pcm.h"
36#include "davinci-mcasp.h" 37#include "davinci-mcasp.h"
38#include "../omap/omap-pcm.h"
37 39
38/* 40/*
39 * McASP register definitions 41 * McASP register definitions
@@ -104,7 +106,7 @@
104/* Transmit Buffer for Serializer n */ 106/* Transmit Buffer for Serializer n */
105#define DAVINCI_MCASP_TXBUF_REG 0x200 107#define DAVINCI_MCASP_TXBUF_REG 0x200
106/* Receive Buffer for Serializer n */ 108/* Receive Buffer for Serializer n */
107#define DAVINCI_MCASP_RXBUF_REG 0x280 109#define DAVINCI_MCASP_RXBUF_REG 0x284
108 110
109/* McASP FIFO Registers */ 111/* McASP FIFO Registers */
110#define DAVINCI_MCASP_WFIFOCTL (0x1010) 112#define DAVINCI_MCASP_WFIFOCTL (0x1010)
@@ -232,7 +234,7 @@
232 * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits 234 * DAVINCI_MCASP_XRSRCTL_BASE_REG - Serializer Control Register Bits
233 */ 235 */
234#define MODE(val) (val) 236#define MODE(val) (val)
235#define DISMOD (val)(val<<2) 237#define DISMOD(val) (val << 2)
236#define TXSTATE BIT(4) 238#define TXSTATE BIT(4)
237#define RXSTATE BIT(5) 239#define RXSTATE BIT(5)
238#define SRMOD_MASK 3 240#define SRMOD_MASK 3
@@ -304,6 +306,12 @@
304 306
305#define DAVINCI_MCASP_NUM_SERIALIZER 16 307#define DAVINCI_MCASP_NUM_SERIALIZER 16
306 308
309/*
310 * Timeout value of 1 ms was chosen experimentally to account for the initial
311 * latency to have the first audio sample transferred to AFIFO by DMA
312 */
313#define MCASP_FIFO_FILL_TIMEOUT 1000
314
307static inline void mcasp_set_bits(void __iomem *reg, u32 val) 315static inline void mcasp_set_bits(void __iomem *reg, u32 val)
308{ 316{
309 __raw_writel(__raw_readl(reg) | val, reg); 317 __raw_writel(__raw_readl(reg) | val, reg);
@@ -348,8 +356,24 @@ static inline void mcasp_set_ctl_reg(void __iomem *regs, u32 val)
348 356
349static void mcasp_start_rx(struct davinci_audio_dev *dev) 357static void mcasp_start_rx(struct davinci_audio_dev *dev)
350{ 358{
359 u32 rxfmctl = mcasp_get_reg(dev->base + DAVINCI_MCASP_RXFMCTL_REG);
360
351 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST); 361 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXHCLKRST);
352 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST); 362 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXCLKRST);
363
364 /*
365 * Enable TX FSG when McASP is in sync mode and is master since the
366 * TX section provides FSYNC for RX too. TX clk dividers are also
367 * enabled for cases where ACLKR pin is not connected (typically
368 * done when AFSR is not used either)
369 */
370 if (rxfmctl & AFSRE) {
371 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG,
372 TXHCLKRST);
373 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG,
374 TXCLKRST);
375 }
376
353 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR); 377 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSERCLR);
354 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0); 378 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXBUF_REG, 0);
355 379
@@ -359,6 +383,10 @@ static void mcasp_start_rx(struct davinci_audio_dev *dev)
359 383
360 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST); 384 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXSMRST);
361 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST); 385 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, RXFSRST);
386
387 if (rxfmctl & AFSRE)
388 mcasp_set_ctl_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG,
389 TXFSRST);
362} 390}
363 391
364static void mcasp_start_tx(struct davinci_audio_dev *dev) 392static void mcasp_start_tx(struct davinci_audio_dev *dev)
@@ -390,12 +418,16 @@ static void mcasp_start_tx(struct davinci_audio_dev *dev)
390 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0); 418 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXBUF_REG, 0);
391} 419}
392 420
393static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream) 421static int davinci_mcasp_start(struct davinci_audio_dev *dev, int stream)
394{ 422{
423 int i = 0;
424 u32 val;
425
395 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 426 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
396 if (dev->txnumevt) { /* enable FIFO */ 427 if (dev->txnumevt) { /* enable FIFO */
397 switch (dev->version) { 428 switch (dev->version) {
398 case MCASP_VERSION_3: 429 case MCASP_VERSION_3:
430 case MCASP_VERSION_4:
399 mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, 431 mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL,
400 FIFO_ENABLE); 432 FIFO_ENABLE);
401 mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL, 433 mcasp_set_bits(dev->base + MCASP_VER3_WFIFOCTL,
@@ -407,12 +439,31 @@ static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream)
407 mcasp_set_bits(dev->base + 439 mcasp_set_bits(dev->base +
408 DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE); 440 DAVINCI_MCASP_WFIFOCTL, FIFO_ENABLE);
409 } 441 }
442
443 /*
444 * Wait until DMA has loaded at least one sample into
445 * AFIFO to ensure XRUN is not immediately hit
446 * Implementation has to use udelay since it's executed
447 * in atomic context (trigger() callback)
448 */
449 while (++i) {
450 val = mcasp_get_reg(dev->base +
451 MCASP_VER3_WFIFOSTS);
452 if (val > 0)
453 break;
454
455 if (i > MCASP_FIFO_FILL_TIMEOUT)
456 return -ETIMEDOUT;
457
458 udelay(1);
459 }
410 } 460 }
411 mcasp_start_tx(dev); 461 mcasp_start_tx(dev);
412 } else { 462 } else {
413 if (dev->rxnumevt) { /* enable FIFO */ 463 if (dev->rxnumevt) { /* enable FIFO */
414 switch (dev->version) { 464 switch (dev->version) {
415 case MCASP_VERSION_3: 465 case MCASP_VERSION_3:
466 case MCASP_VERSION_4:
416 mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, 467 mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL,
417 FIFO_ENABLE); 468 FIFO_ENABLE);
418 mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL, 469 mcasp_set_bits(dev->base + MCASP_VER3_RFIFOCTL,
@@ -427,17 +478,34 @@ static void davinci_mcasp_start(struct davinci_audio_dev *dev, int stream)
427 } 478 }
428 mcasp_start_rx(dev); 479 mcasp_start_rx(dev);
429 } 480 }
481
482 return 0;
430} 483}
431 484
432static void mcasp_stop_rx(struct davinci_audio_dev *dev) 485static void mcasp_stop_rx(struct davinci_audio_dev *dev)
433{ 486{
487 u32 gblctl = mcasp_get_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG);
488 u32 rxfmctl = mcasp_get_reg(dev->base + DAVINCI_MCASP_RXFMCTL_REG);
489
490 /* Disable TX FSG if RX was the only active user */
491 if ((rxfmctl & AFSRE) && !(gblctl & TXSMRST))
492 mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0);
493
434 mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0); 494 mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG, 0);
435 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF); 495 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXSTAT_REG, 0xFFFFFFFF);
436} 496}
437 497
438static void mcasp_stop_tx(struct davinci_audio_dev *dev) 498static void mcasp_stop_tx(struct davinci_audio_dev *dev)
439{ 499{
440 mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, 0); 500 u32 gblctl = mcasp_get_reg(dev->base + DAVINCI_MCASP_GBLCTLR_REG);
501 u32 rxfmctl = mcasp_get_reg(dev->base + DAVINCI_MCASP_RXFMCTL_REG);
502 u32 val = 0;
503
504 /* Keep FSG active until RX section is stopped too */
505 if ((rxfmctl & AFSRE) && (gblctl & RXSMRST))
506 val = TXHCLKRST | TXCLKRST | TXFSRST;
507
508 mcasp_set_reg(dev->base + DAVINCI_MCASP_GBLCTLX_REG, val);
441 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF); 509 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXSTAT_REG, 0xFFFFFFFF);
442} 510}
443 511
@@ -447,6 +515,7 @@ static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream)
447 if (dev->txnumevt) { /* disable FIFO */ 515 if (dev->txnumevt) { /* disable FIFO */
448 switch (dev->version) { 516 switch (dev->version) {
449 case MCASP_VERSION_3: 517 case MCASP_VERSION_3:
518 case MCASP_VERSION_4:
450 mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL, 519 mcasp_clr_bits(dev->base + MCASP_VER3_WFIFOCTL,
451 FIFO_ENABLE); 520 FIFO_ENABLE);
452 break; 521 break;
@@ -460,6 +529,7 @@ static void davinci_mcasp_stop(struct davinci_audio_dev *dev, int stream)
460 if (dev->rxnumevt) { /* disable FIFO */ 529 if (dev->rxnumevt) { /* disable FIFO */
461 switch (dev->version) { 530 switch (dev->version) {
462 case MCASP_VERSION_3: 531 case MCASP_VERSION_3:
532 case MCASP_VERSION_4:
463 mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL, 533 mcasp_clr_bits(dev->base + MCASP_VER3_RFIFOCTL,
464 FIFO_ENABLE); 534 FIFO_ENABLE);
465 break; 535 break;
@@ -632,8 +702,9 @@ static int davinci_config_channel_size(struct davinci_audio_dev *dev,
632{ 702{
633 u32 fmt; 703 u32 fmt;
634 u32 tx_rotate = (word_length / 4) & 0x7; 704 u32 tx_rotate = (word_length / 4) & 0x7;
635 u32 rx_rotate = (32 - word_length) / 4; 705 u32 rx_rotate;
636 u32 mask = (1ULL << word_length) - 1; 706 u32 mask = (1ULL << word_length) - 1;
707 u32 slot_length;
637 708
638 /* 709 /*
639 * if s BCLK-to-LRCLK ratio has been configured via the set_clkdiv() 710 * if s BCLK-to-LRCLK ratio has been configured via the set_clkdiv()
@@ -645,10 +716,14 @@ static int davinci_config_channel_size(struct davinci_audio_dev *dev,
645 * tdm-slots (for I2S - divided by 2). 716 * tdm-slots (for I2S - divided by 2).
646 */ 717 */
647 if (dev->bclk_lrclk_ratio) 718 if (dev->bclk_lrclk_ratio)
648 word_length = dev->bclk_lrclk_ratio / dev->tdm_slots; 719 slot_length = dev->bclk_lrclk_ratio / dev->tdm_slots;
720 else
721 slot_length = word_length;
649 722
650 /* mapping of the XSSZ bit-field as described in the datasheet */ 723 /* mapping of the XSSZ bit-field as described in the datasheet */
651 fmt = (word_length >> 1) - 1; 724 fmt = (slot_length >> 1) - 1;
725
726 rx_rotate = (slot_length - word_length) / 4;
652 727
653 if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) { 728 if (dev->op_mode != DAVINCI_MCASP_DIT_MODE) {
654 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, 729 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMT_REG,
@@ -678,7 +753,9 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream,
678 u8 slots = dev->tdm_slots; 753 u8 slots = dev->tdm_slots;
679 u8 max_active_serializers = (channels + slots - 1) / slots; 754 u8 max_active_serializers = (channels + slots - 1) / slots;
680 /* Default configuration */ 755 /* Default configuration */
681 mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG, MCASP_SOFT); 756 if (dev->version != MCASP_VERSION_4)
757 mcasp_set_bits(dev->base + DAVINCI_MCASP_PWREMUMGT_REG,
758 MCASP_SOFT);
682 759
683 /* All PINS as McASP */ 760 /* All PINS as McASP */
684 mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000); 761 mcasp_set_reg(dev->base + DAVINCI_MCASP_PFUNC_REG, 0x00000000);
@@ -698,11 +775,17 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream,
698 dev->serial_dir[i]); 775 dev->serial_dir[i]);
699 if (dev->serial_dir[i] == TX_MODE && 776 if (dev->serial_dir[i] == TX_MODE &&
700 tx_ser < max_active_serializers) { 777 tx_ser < max_active_serializers) {
778 mcasp_mod_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i),
779 DISMOD(dev->tx_dismod), DISMOD(3));
780
701 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG, 781 mcasp_set_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
702 AXR(i)); 782 AXR(i));
703 tx_ser++; 783 tx_ser++;
704 } else if (dev->serial_dir[i] == RX_MODE && 784 } else if (dev->serial_dir[i] == RX_MODE &&
705 rx_ser < max_active_serializers) { 785 rx_ser < max_active_serializers) {
786 mcasp_mod_bits(dev->base + DAVINCI_MCASP_XRSRCTL_REG(i),
787 DISMOD(dev->rx_dismod), DISMOD(3));
788
706 mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG, 789 mcasp_clr_bits(dev->base + DAVINCI_MCASP_PDIR_REG,
707 AXR(i)); 790 AXR(i));
708 rx_ser++; 791 rx_ser++;
@@ -729,6 +812,7 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream,
729 812
730 switch (dev->version) { 813 switch (dev->version) {
731 case MCASP_VERSION_3: 814 case MCASP_VERSION_3:
815 case MCASP_VERSION_4:
732 mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser, 816 mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, tx_ser,
733 NUMDMA_MASK); 817 NUMDMA_MASK);
734 mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL, 818 mcasp_mod_bits(dev->base + MCASP_VER3_WFIFOCTL,
@@ -747,6 +831,7 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream,
747 dev->rxnumevt = 1; 831 dev->rxnumevt = 1;
748 switch (dev->version) { 832 switch (dev->version) {
749 case MCASP_VERSION_3: 833 case MCASP_VERSION_3:
834 case MCASP_VERSION_4:
750 mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser, 835 mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, rx_ser,
751 NUMDMA_MASK); 836 NUMDMA_MASK);
752 mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL, 837 mcasp_mod_bits(dev->base + MCASP_VER3_RFIFOCTL,
@@ -763,46 +848,60 @@ static int davinci_hw_common_param(struct davinci_audio_dev *dev, int stream,
763 return 0; 848 return 0;
764} 849}
765 850
766static void davinci_hw_param(struct davinci_audio_dev *dev, int stream) 851static int davinci_hw_param(struct davinci_audio_dev *dev, int stream,
852 int channels)
767{ 853{
768 int i, active_slots; 854 int i, active_slots;
855 int total_slots = dev->tdm_slots;
856 int active_serializers;
769 u32 mask = 0; 857 u32 mask = 0;
858 u32 busel = 0;
859
860 if ((total_slots < 2) || (total_slots > 32)) {
861 dev_err(dev->dev, "tdm slot count %d not supported\n",
862 total_slots);
863 return -EINVAL;
864 }
865
866 /*
867 * If more than one serializer is needed, then use them with
868 * their specified tdm_slots count. Otherwise, one serializer
869 * can cope with the transaction using as many slots as channels
870 * in the stream, requires channels symmetry
871 */
872 active_serializers = (channels + total_slots - 1) / total_slots;
873 if (active_serializers == 1) {
874 active_slots = channels;
875 dev->channels = channels;
876 } else {
877 active_slots = total_slots;
878 }
770 879
771 active_slots = (dev->tdm_slots > 31) ? 32 : dev->tdm_slots;
772 for (i = 0; i < active_slots; i++) 880 for (i = 0; i < active_slots; i++)
773 mask |= (1 << i); 881 mask |= (1 << i);
774 882
775 mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC); 883 mcasp_clr_bits(dev->base + DAVINCI_MCASP_ACLKXCTL_REG, TX_ASYNC);
776 884
777 if (stream == SNDRV_PCM_STREAM_PLAYBACK) { 885 if (dev->version == MCASP_VERSION_4 && !dev->dat_port)
778 /* bit stream is MSB first with no delay */ 886 busel = TXSEL;
779 /* DSP_B mode */ 887
780 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask); 888 /* bit stream is MSB first with no delay */
781 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, TXORD); 889 /* DSP_B mode */
782 890 mcasp_set_reg(dev->base + DAVINCI_MCASP_TXTDM_REG, mask);
783 if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32)) 891 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXFMT_REG, busel | TXORD);
784 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG, 892 mcasp_mod_bits(dev->base + DAVINCI_MCASP_TXFMCTL_REG,
785 FSXMOD(dev->tdm_slots), FSXMOD(0x1FF)); 893 FSXMOD(total_slots), FSXMOD(0x1FF));
786 else 894
787 printk(KERN_ERR "playback tdm slot %d not supported\n", 895 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask);
788 dev->tdm_slots); 896 mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, busel | RXORD);
789 } else { 897 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG,
790 /* bit stream is MSB first with no delay */ 898 FSRMOD(total_slots), FSRMOD(0x1FF));
791 /* DSP_B mode */ 899
792 mcasp_set_bits(dev->base + DAVINCI_MCASP_RXFMT_REG, RXORD); 900 return 0;
793 mcasp_set_reg(dev->base + DAVINCI_MCASP_RXTDM_REG, mask);
794
795 if ((dev->tdm_slots >= 2) && (dev->tdm_slots <= 32))
796 mcasp_mod_bits(dev->base + DAVINCI_MCASP_RXFMCTL_REG,
797 FSRMOD(dev->tdm_slots), FSRMOD(0x1FF));
798 else
799 printk(KERN_ERR "capture tdm slot %d not supported\n",
800 dev->tdm_slots);
801 }
802} 901}
803 902
804/* S/PDIF */ 903/* S/PDIF */
805static void davinci_hw_dit_param(struct davinci_audio_dev *dev) 904static int davinci_hw_dit_param(struct davinci_audio_dev *dev)
806{ 905{
807 /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0 906 /* Set the TX format : 24 bit right rotation, 32 bit slot, Pad 0
808 and LSB first */ 907 and LSB first */
@@ -827,6 +926,31 @@ static void davinci_hw_dit_param(struct davinci_audio_dev *dev)
827 926
828 /* Enable the DIT */ 927 /* Enable the DIT */
829 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN); 928 mcasp_set_bits(dev->base + DAVINCI_MCASP_TXDITCTL_REG, DITEN);
929
930 return 0;
931}
932
933static void davinci_mcasp_set_dma_params(struct snd_pcm_substream *substream,
934 struct davinci_audio_dev *dev,
935 int word_length, u8 fifo_level)
936{
937 if (dev->version == MCASP_VERSION_4) {
938 struct omap_pcm_dma_data *dma_data =
939 dev->dma_params[substream->stream];
940
941 dma_data->packet_size = fifo_level;
942 } else {
943 struct davinci_pcm_dma_params *dma_params =
944 dev->dma_params[substream->stream];
945
946 dma_params->data_type = word_length >> 3;
947 dma_params->fifo_level = fifo_level;
948
949 if (dev->version == MCASP_VERSION_2 && !fifo_level)
950 dma_params->acnt = 4;
951 else
952 dma_params->acnt = dma_params->data_type;
953 }
830} 954}
831 955
832static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream, 956static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
@@ -834,16 +958,12 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
834 struct snd_soc_dai *cpu_dai) 958 struct snd_soc_dai *cpu_dai)
835{ 959{
836 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai); 960 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(cpu_dai);
837 struct davinci_pcm_dma_params *dma_params =
838 &dev->dma_params[substream->stream];
839 int word_length; 961 int word_length;
840 u8 fifo_level; 962 u8 fifo_level;
841 u8 slots = dev->tdm_slots; 963 u8 slots = dev->tdm_slots;
842 u8 active_serializers; 964 u8 active_serializers;
843 int channels; 965 int channels = params_channels(params);
844 struct snd_interval *pcm_channels = hw_param_interval(params, 966 int ret;
845 SNDRV_PCM_HW_PARAM_CHANNELS);
846 channels = pcm_channels->min;
847 967
848 active_serializers = (channels + slots - 1) / slots; 968 active_serializers = (channels + slots - 1) / slots;
849 969
@@ -855,26 +975,26 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
855 fifo_level = dev->rxnumevt * active_serializers; 975 fifo_level = dev->rxnumevt * active_serializers;
856 976
857 if (dev->op_mode == DAVINCI_MCASP_DIT_MODE) 977 if (dev->op_mode == DAVINCI_MCASP_DIT_MODE)
858 davinci_hw_dit_param(dev); 978 ret = davinci_hw_dit_param(dev);
859 else 979 else
860 davinci_hw_param(dev, substream->stream); 980 ret = davinci_hw_param(dev, substream->stream, channels);
981
982 if (ret)
983 return ret;
861 984
862 switch (params_format(params)) { 985 switch (params_format(params)) {
863 case SNDRV_PCM_FORMAT_U8: 986 case SNDRV_PCM_FORMAT_U8:
864 case SNDRV_PCM_FORMAT_S8: 987 case SNDRV_PCM_FORMAT_S8:
865 dma_params->data_type = 1;
866 word_length = 8; 988 word_length = 8;
867 break; 989 break;
868 990
869 case SNDRV_PCM_FORMAT_U16_LE: 991 case SNDRV_PCM_FORMAT_U16_LE:
870 case SNDRV_PCM_FORMAT_S16_LE: 992 case SNDRV_PCM_FORMAT_S16_LE:
871 dma_params->data_type = 2;
872 word_length = 16; 993 word_length = 16;
873 break; 994 break;
874 995
875 case SNDRV_PCM_FORMAT_U24_3LE: 996 case SNDRV_PCM_FORMAT_U24_3LE:
876 case SNDRV_PCM_FORMAT_S24_3LE: 997 case SNDRV_PCM_FORMAT_S24_3LE:
877 dma_params->data_type = 3;
878 word_length = 24; 998 word_length = 24;
879 break; 999 break;
880 1000
@@ -882,7 +1002,6 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
882 case SNDRV_PCM_FORMAT_S24_LE: 1002 case SNDRV_PCM_FORMAT_S24_LE:
883 case SNDRV_PCM_FORMAT_U32_LE: 1003 case SNDRV_PCM_FORMAT_U32_LE:
884 case SNDRV_PCM_FORMAT_S32_LE: 1004 case SNDRV_PCM_FORMAT_S32_LE:
885 dma_params->data_type = 4;
886 word_length = 32; 1005 word_length = 32;
887 break; 1006 break;
888 1007
@@ -891,12 +1010,8 @@ static int davinci_mcasp_hw_params(struct snd_pcm_substream *substream,
891 return -EINVAL; 1010 return -EINVAL;
892 } 1011 }
893 1012
894 if (dev->version == MCASP_VERSION_2 && !fifo_level) 1013 dev->sample_bits = word_length;
895 dma_params->acnt = 4; 1014 davinci_mcasp_set_dma_params(substream, dev, word_length, fifo_level);
896 else
897 dma_params->acnt = dma_params->data_type;
898
899 dma_params->fifo_level = fifo_level;
900 davinci_config_channel_size(dev, word_length); 1015 davinci_config_channel_size(dev, word_length);
901 1016
902 return 0; 1017 return 0;
@@ -912,19 +1027,10 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream,
912 case SNDRV_PCM_TRIGGER_RESUME: 1027 case SNDRV_PCM_TRIGGER_RESUME:
913 case SNDRV_PCM_TRIGGER_START: 1028 case SNDRV_PCM_TRIGGER_START:
914 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE: 1029 case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
915 ret = pm_runtime_get_sync(dev->dev); 1030 ret = davinci_mcasp_start(dev, substream->stream);
916 if (IS_ERR_VALUE(ret))
917 dev_err(dev->dev, "pm_runtime_get_sync() failed\n");
918 davinci_mcasp_start(dev, substream->stream);
919 break; 1031 break;
920 1032
921 case SNDRV_PCM_TRIGGER_SUSPEND: 1033 case SNDRV_PCM_TRIGGER_SUSPEND:
922 davinci_mcasp_stop(dev, substream->stream);
923 ret = pm_runtime_put_sync(dev->dev);
924 if (IS_ERR_VALUE(ret))
925 dev_err(dev->dev, "pm_runtime_put_sync() failed\n");
926 break;
927
928 case SNDRV_PCM_TRIGGER_STOP: 1034 case SNDRV_PCM_TRIGGER_STOP:
929 case SNDRV_PCM_TRIGGER_PAUSE_PUSH: 1035 case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
930 davinci_mcasp_stop(dev, substream->stream); 1036 davinci_mcasp_stop(dev, substream->stream);
@@ -937,17 +1043,129 @@ static int davinci_mcasp_trigger(struct snd_pcm_substream *substream,
937 return ret; 1043 return ret;
938} 1044}
939 1045
1046static int davinci_mcasp_hwrule_buffersize(struct snd_pcm_hw_params *params,
1047 struct snd_pcm_hw_rule *rule,
1048 int stream)
1049{
1050 struct snd_interval *buffer_size = hw_param_interval(params,
1051 SNDRV_PCM_HW_PARAM_BUFFER_SIZE);
1052 int channels = params_channels(params);
1053 int periods = params_periods(params);
1054 struct davinci_audio_dev *dev = rule->private;
1055 int i;
1056 u8 slots = dev->tdm_slots;
1057 u8 max_active_serializers = (channels + slots - 1) / slots;
1058 u8 num_ser = 0;
1059 u8 num_evt = 0;
1060 unsigned long step = 1;
1061
1062 if (stream == SNDRV_PCM_STREAM_PLAYBACK) {
1063 for (i = 0; i < dev->num_serializer; i++) {
1064 if (dev->serial_dir[i] == TX_MODE &&
1065 num_ser < max_active_serializers)
1066 num_ser++;
1067 }
1068 num_evt = dev->txnumevt * num_ser;
1069 } else {
1070 for (i = 0; i < dev->num_serializer; i++) {
1071 if (dev->serial_dir[i] == RX_MODE &&
1072 num_ser < max_active_serializers)
1073 num_ser++;
1074 }
1075 num_evt = dev->rxnumevt * num_ser;
1076 }
1077
1078 /*
1079 * The buffersize (in samples), must be a multiple of num_evt. The
1080 * buffersize (in frames) is the product of the period_size and the
1081 * number of periods. Therefore, the buffersize should be a multiple
1082 * of the number of periods. The below finds the least common
1083 * multiple of num_evt and channels (since the number of samples
1084 * per frame is equal to the number of channels). It also makes sure
1085 * that the resulting step value (LCM / channels) is a multiple of the
1086 * number of periods.
1087 */
1088 step = lcm((lcm(num_evt, channels) / channels), periods);
1089
1090 return snd_interval_step(buffer_size, 0, step);
1091}
1092
1093static int davinci_mcasp_hwrule_txbuffersize(struct snd_pcm_hw_params *params,
1094 struct snd_pcm_hw_rule *rule)
1095{
1096 return davinci_mcasp_hwrule_buffersize(params, rule,
1097 SNDRV_PCM_STREAM_PLAYBACK);
1098}
1099
1100static int davinci_mcasp_hwrule_rxbuffersize(struct snd_pcm_hw_params *params,
1101 struct snd_pcm_hw_rule *rule)
1102{
1103 return davinci_mcasp_hwrule_buffersize(params, rule,
1104 SNDRV_PCM_STREAM_CAPTURE);
1105}
1106
940static int davinci_mcasp_startup(struct snd_pcm_substream *substream, 1107static int davinci_mcasp_startup(struct snd_pcm_substream *substream,
941 struct snd_soc_dai *dai) 1108 struct snd_soc_dai *dai)
942{ 1109{
943 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai); 1110 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);
944 1111
945 snd_soc_dai_set_dma_data(dai, substream, dev->dma_params); 1112
1113 if (dev->version == MCASP_VERSION_4) {
1114 snd_soc_dai_set_dma_data(dai, substream,
1115 dev->dma_params[substream->stream]);
1116 if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
1117 if (dev->txnumevt)
1118 snd_pcm_hw_rule_add(substream->runtime, 0,
1119 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
1120 davinci_mcasp_hwrule_txbuffersize,
1121 dev,
1122 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, -1);
1123 } else if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) {
1124 if (dev->rxnumevt)
1125 snd_pcm_hw_rule_add(substream->runtime, 0,
1126 SNDRV_PCM_HW_PARAM_BUFFER_SIZE,
1127 davinci_mcasp_hwrule_rxbuffersize,
1128 dev,
1129 SNDRV_PCM_HW_PARAM_BUFFER_SIZE, -1);
1130 }
1131 }
1132 else
1133 snd_soc_dai_set_dma_data(dai, substream, dev->dma_params);
1134
1135 /* Apply channels symmetry, needed when using a single serializer */
1136 if (dev->channels)
1137 snd_pcm_hw_constraint_minmax(substream->runtime,
1138 SNDRV_PCM_HW_PARAM_CHANNELS,
1139 dev->channels, dev->channels);
1140
1141 /*
1142 * Apply sample size symmetry since the slot size (defined by word
1143 * length) has to be the same for playback and capture in McASP
1144 * instances with unified clock/sync domain
1145 */
1146 if (dev->sample_bits)
1147 snd_pcm_hw_constraint_minmax(substream->runtime,
1148 SNDRV_PCM_HW_PARAM_SAMPLE_BITS,
1149 dev->sample_bits,
1150 dev->sample_bits);
1151
946 return 0; 1152 return 0;
947} 1153}
948 1154
1155static void davinci_mcasp_shutdown(struct snd_pcm_substream *substream,
1156 struct snd_soc_dai *dai)
1157{
1158 struct davinci_audio_dev *dev = snd_soc_dai_get_drvdata(dai);
1159
1160 if (!dai->active) {
1161 dev->channels = 0;
1162 dev->sample_bits = 0;
1163 }
1164}
1165
949static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = { 1166static const struct snd_soc_dai_ops davinci_mcasp_dai_ops = {
950 .startup = davinci_mcasp_startup, 1167 .startup = davinci_mcasp_startup,
1168 .shutdown = davinci_mcasp_shutdown,
951 .trigger = davinci_mcasp_trigger, 1169 .trigger = davinci_mcasp_trigger,
952 .hw_params = davinci_mcasp_hw_params, 1170 .hw_params = davinci_mcasp_hw_params,
953 .set_fmt = davinci_mcasp_set_dai_fmt, 1171 .set_fmt = davinci_mcasp_set_dai_fmt,
@@ -970,13 +1188,13 @@ static struct snd_soc_dai_driver davinci_mcasp_dai[] = {
970 { 1188 {
971 .name = "davinci-mcasp.0", 1189 .name = "davinci-mcasp.0",
972 .playback = { 1190 .playback = {
973 .channels_min = 2, 1191 .channels_min = 1,
974 .channels_max = 32 * 16, 1192 .channels_max = 32 * 16,
975 .rates = DAVINCI_MCASP_RATES, 1193 .rates = DAVINCI_MCASP_RATES,
976 .formats = DAVINCI_MCASP_PCM_FMTS, 1194 .formats = DAVINCI_MCASP_PCM_FMTS,
977 }, 1195 },
978 .capture = { 1196 .capture = {
979 .channels_min = 2, 1197 .channels_min = 1,
980 .channels_max = 32 * 16, 1198 .channels_max = 32 * 16,
981 .rates = DAVINCI_MCASP_RATES, 1199 .rates = DAVINCI_MCASP_RATES,
982 .formats = DAVINCI_MCASP_PCM_FMTS, 1200 .formats = DAVINCI_MCASP_PCM_FMTS,
@@ -1010,6 +1228,10 @@ static const struct of_device_id mcasp_dt_ids[] = {
1010 .compatible = "ti,omap2-mcasp-audio", 1228 .compatible = "ti,omap2-mcasp-audio",
1011 .data = (void *)MCASP_VERSION_3, 1229 .data = (void *)MCASP_VERSION_3,
1012 }, 1230 },
1231 {
1232 .compatible = "ti,dra7-mcasp-audio",
1233 .data = (void *)MCASP_VERSION_4,
1234 },
1013 { /* sentinel */ } 1235 { /* sentinel */ }
1014}; 1236};
1015MODULE_DEVICE_TABLE(of, mcasp_dt_ids); 1237MODULE_DEVICE_TABLE(of, mcasp_dt_ids);
@@ -1090,6 +1312,23 @@ static struct snd_platform_data *davinci_mcasp_set_pdata_from_of(
1090 pdata->serial_dir = of_serial_dir; 1312 pdata->serial_dir = of_serial_dir;
1091 } 1313 }
1092 1314
1315 of_property_read_u32(np, "ti,tx-inactive-mode", &pdata->tx_dismod);
1316
1317 of_property_read_u32(np, "ti,rx-inactive-mode", &pdata->rx_dismod);
1318
1319 /* DISMOD = 1 is a reserved value */
1320 if ((pdata->tx_dismod == 1) || (pdata->rx_dismod == 1)) {
1321 dev_err(&pdev->dev, "tx/rx-inactive-mode cannot be 1\n");
1322 ret = -EINVAL;
1323 goto nodata;
1324 }
1325
1326 if ((pdata->tx_dismod > 3) || (pdata->rx_dismod > 3)) {
1327 dev_err(&pdev->dev, "invalid tx/rx-inactive-mode\n");
1328 ret = -EINVAL;
1329 goto nodata;
1330 }
1331
1093 ret = of_property_read_u32(np, "tx-num-evt", &val); 1332 ret = of_property_read_u32(np, "tx-num-evt", &val);
1094 if (ret >= 0) 1333 if (ret >= 0)
1095 pdata->txnumevt = val; 1334 pdata->txnumevt = val;
@@ -1119,8 +1358,8 @@ nodata:
1119 1358
1120static int davinci_mcasp_probe(struct platform_device *pdev) 1359static int davinci_mcasp_probe(struct platform_device *pdev)
1121{ 1360{
1122 struct davinci_pcm_dma_params *dma_data; 1361 struct resource *mem, *ioarea, *mem_dat;
1123 struct resource *mem, *ioarea, *res; 1362 struct resource *tx_res, *rx_res;
1124 struct snd_platform_data *pdata; 1363 struct snd_platform_data *pdata;
1125 struct davinci_audio_dev *dev; 1364 struct davinci_audio_dev *dev;
1126 int ret; 1365 int ret;
@@ -1154,14 +1393,16 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1154 return -EBUSY; 1393 return -EBUSY;
1155 } 1394 }
1156 1395
1157 pm_runtime_enable(&pdev->dev); 1396 mem_dat = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
1158 1397 if (!mem_dat) {
1159 ret = pm_runtime_get_sync(&pdev->dev); 1398 dev_info(&pdev->dev, "data port resource not defined, cfg port will be used\n");
1160 if (IS_ERR_VALUE(ret)) { 1399 dev->dat_port = false;
1161 dev_err(&pdev->dev, "pm_runtime_get_sync() failed\n"); 1400 } else {
1162 return ret; 1401 dev->dat_port = true;
1163 } 1402 }
1164 1403
1404 pm_runtime_enable(&pdev->dev);
1405
1165 dev->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem)); 1406 dev->base = devm_ioremap(&pdev->dev, mem->start, resource_size(mem));
1166 if (!dev->base) { 1407 if (!dev->base) {
1167 dev_err(&pdev->dev, "ioremap failed\n"); 1408 dev_err(&pdev->dev, "ioremap failed\n");
@@ -1176,52 +1417,101 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1176 dev->version = pdata->version; 1417 dev->version = pdata->version;
1177 dev->txnumevt = pdata->txnumevt; 1418 dev->txnumevt = pdata->txnumevt;
1178 dev->rxnumevt = pdata->rxnumevt; 1419 dev->rxnumevt = pdata->rxnumevt;
1420 dev->tx_dismod = pdata->tx_dismod;
1421 dev->rx_dismod = pdata->rx_dismod;
1179 dev->dev = &pdev->dev; 1422 dev->dev = &pdev->dev;
1180 1423
1181 dma_data = &dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK];
1182 dma_data->asp_chan_q = pdata->asp_chan_q;
1183 dma_data->ram_chan_q = pdata->ram_chan_q;
1184 dma_data->sram_pool = pdata->sram_pool;
1185 dma_data->sram_size = pdata->sram_size_playback;
1186 dma_data->dma_addr = (dma_addr_t) (pdata->tx_dma_offset +
1187 mem->start);
1188
1189 /* first TX, then RX */ 1424 /* first TX, then RX */
1190 res = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1425 tx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
1191 if (!res) { 1426 if (!tx_res) {
1192 dev_err(&pdev->dev, "no DMA resource\n"); 1427 dev_err(&pdev->dev, "no DMA resource\n");
1193 ret = -ENODEV; 1428 return -ENODEV;
1194 goto err_release_clk;
1195 } 1429 }
1196 1430
1197 dma_data->channel = res->start; 1431 rx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
1432 if (!rx_res) {
1433 dev_err(&pdev->dev, "no DMA resource\n");
1434 return -ENODEV;
1435 }
1198 1436
1199 dma_data = &dev->dma_params[SNDRV_PCM_STREAM_CAPTURE]; 1437 if (dev->version == MCASP_VERSION_4) {
1200 dma_data->asp_chan_q = pdata->asp_chan_q; 1438 struct omap_pcm_dma_data *dma_data;
1201 dma_data->ram_chan_q = pdata->ram_chan_q;
1202 dma_data->sram_pool = pdata->sram_pool;
1203 dma_data->sram_size = pdata->sram_size_capture;
1204 dma_data->dma_addr = (dma_addr_t)(pdata->rx_dma_offset +
1205 mem->start);
1206 1439
1207 res = platform_get_resource(pdev, IORESOURCE_DMA, 1); 1440 dma_data = devm_kzalloc(&pdev->dev, sizeof(*dma_data),
1208 if (!res) { 1441 GFP_KERNEL);
1209 dev_err(&pdev->dev, "no DMA resource\n"); 1442 if (!dma_data) {
1210 ret = -ENODEV; 1443 ret = -ENOMEM;
1211 goto err_release_clk; 1444 goto err_release_clk;
1445 }
1446
1447 dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK] = dma_data;
1448 if (mem_dat)
1449 dma_data->port_addr = mem_dat->start;
1450 else
1451 dma_data->port_addr = mem->start + DAVINCI_MCASP_TXBUF_REG;
1452 dma_data->dma_req = tx_res->start;
1453
1454 dma_data = devm_kzalloc(&pdev->dev, sizeof(*dma_data),
1455 GFP_KERNEL);
1456 if (!dma_data) {
1457 ret = -ENOMEM;
1458 goto err_release_clk;
1459 }
1460
1461 dev->dma_params[SNDRV_PCM_STREAM_CAPTURE] = dma_data;
1462 if (mem_dat)
1463 dma_data->port_addr = mem_dat->start;
1464 else
1465 dma_data->port_addr = mem->start + DAVINCI_MCASP_RXBUF_REG;
1466 dma_data->dma_req = rx_res->start;
1467 } else {
1468 struct davinci_pcm_dma_params *dma_data;
1469
1470 dma_data = devm_kzalloc(&pdev->dev, sizeof(*dma_data),
1471 GFP_KERNEL);
1472 if (!dma_data) {
1473 ret = -ENOMEM;
1474 goto err_release_clk;
1475 }
1476
1477 dev->dma_params[SNDRV_PCM_STREAM_PLAYBACK] = dma_data;
1478 dma_data->asp_chan_q = pdata->asp_chan_q;
1479 dma_data->ram_chan_q = pdata->ram_chan_q;
1480 dma_data->sram_pool = pdata->sram_pool;
1481 dma_data->sram_size = pdata->sram_size_playback;
1482 dma_data->channel = tx_res->start;
1483 dma_data->dma_addr = (dma_addr_t)(pdata->tx_dma_offset +
1484 mem->start);
1485
1486 dma_data = devm_kzalloc(&pdev->dev, sizeof(*dma_data),
1487 GFP_KERNEL);
1488 if (!dma_data) {
1489 ret = -ENOMEM;
1490 goto err_release_clk;
1491 }
1492
1493 dev->dma_params[SNDRV_PCM_STREAM_CAPTURE] = dma_data;
1494 dma_data->asp_chan_q = pdata->asp_chan_q;
1495 dma_data->ram_chan_q = pdata->ram_chan_q;
1496 dma_data->sram_pool = pdata->sram_pool;
1497 dma_data->sram_size = pdata->sram_size_capture;
1498 dma_data->channel = rx_res->start;
1499 dma_data->dma_addr = (dma_addr_t)(pdata->rx_dma_offset +
1500 mem->start);
1212 } 1501 }
1213 1502
1214 dma_data->channel = res->start;
1215 dev_set_drvdata(&pdev->dev, dev); 1503 dev_set_drvdata(&pdev->dev, dev);
1216 ret = snd_soc_register_dai(&pdev->dev, &davinci_mcasp_dai[pdata->op_mode]); 1504 ret = snd_soc_register_dai(&pdev->dev, &davinci_mcasp_dai[pdata->op_mode]);
1217 1505
1218 if (ret != 0) 1506 if (ret != 0)
1219 goto err_release_clk; 1507 goto err_release_clk;
1220 1508
1221 ret = davinci_soc_platform_register(&pdev->dev); 1509 if (dev->version != MCASP_VERSION_4) {
1222 if (ret) { 1510 ret = davinci_soc_platform_register(&pdev->dev);
1223 dev_err(&pdev->dev, "register PCM failed: %d\n", ret); 1511 if (ret) {
1224 goto err_unregister_dai; 1512 dev_err(&pdev->dev, "register PCM failed: %d\n", ret);
1513 goto err_unregister_dai;
1514 }
1225 } 1515 }
1226 1516
1227 return 0; 1517 return 0;
@@ -1229,18 +1519,19 @@ static int davinci_mcasp_probe(struct platform_device *pdev)
1229err_unregister_dai: 1519err_unregister_dai:
1230 snd_soc_unregister_dai(&pdev->dev); 1520 snd_soc_unregister_dai(&pdev->dev);
1231err_release_clk: 1521err_release_clk:
1232 pm_runtime_put_sync(&pdev->dev);
1233 pm_runtime_disable(&pdev->dev); 1522 pm_runtime_disable(&pdev->dev);
1234 return ret; 1523 return ret;
1235} 1524}
1236 1525
1237static int davinci_mcasp_remove(struct platform_device *pdev) 1526static int davinci_mcasp_remove(struct platform_device *pdev)
1238{ 1527{
1528 struct davinci_audio_dev *dev = dev_get_drvdata(&pdev->dev);
1239 1529
1240 snd_soc_unregister_dai(&pdev->dev); 1530 snd_soc_unregister_dai(&pdev->dev);
1241 davinci_soc_platform_unregister(&pdev->dev);
1242 1531
1243 pm_runtime_put_sync(&pdev->dev); 1532 if (dev->version != MCASP_VERSION_4)
1533 davinci_soc_platform_unregister(&pdev->dev);
1534
1244 pm_runtime_disable(&pdev->dev); 1535 pm_runtime_disable(&pdev->dev);
1245 1536
1246 return 0; 1537 return 0;
diff --git a/sound/soc/davinci/davinci-mcasp.h b/sound/soc/davinci/davinci-mcasp.h
index a9ac0c11da7..48784954c83 100644
--- a/sound/soc/davinci/davinci-mcasp.h
+++ b/sound/soc/davinci/davinci-mcasp.h
@@ -28,7 +28,7 @@
28#define DAVINCI_MCASP_DIT_DAI 1 28#define DAVINCI_MCASP_DIT_DAI 1
29 29
30struct davinci_audio_dev { 30struct davinci_audio_dev {
31 struct davinci_pcm_dma_params dma_params[2]; 31 void *dma_params[2];
32 void __iomem *base; 32 void __iomem *base;
33 struct device *dev; 33 struct device *dev;
34 34
@@ -37,12 +37,19 @@ struct davinci_audio_dev {
37 u8 op_mode; 37 u8 op_mode;
38 u8 num_serializer; 38 u8 num_serializer;
39 u8 *serial_dir; 39 u8 *serial_dir;
40 u32 tx_dismod;
41 u32 rx_dismod;
40 u8 version; 42 u8 version;
41 u16 bclk_lrclk_ratio; 43 u16 bclk_lrclk_ratio;
44 unsigned int channels;
45 unsigned int sample_bits;
42 46
43 /* McASP FIFO related */ 47 /* McASP FIFO related */
44 u8 txnumevt; 48 u8 txnumevt;
45 u8 rxnumevt; 49 u8 rxnumevt;
50
51 /* McASP port related */
52 bool dat_port;
46}; 53};
47 54
48#endif /* DAVINCI_MCASP_H */ 55#endif /* DAVINCI_MCASP_H */
diff --git a/sound/soc/davinci/davinci-pcm.h b/sound/soc/davinci/davinci-pcm.h
index fbb710c76c0..436722c27dc 100644
--- a/sound/soc/davinci/davinci-pcm.h
+++ b/sound/soc/davinci/davinci-pcm.h
@@ -29,7 +29,22 @@ struct davinci_pcm_dma_params {
29 unsigned int fifo_level; 29 unsigned int fifo_level;
30}; 30};
31 31
32#ifdef CONFIG_SND_DAVINCI_SOC
33
32int davinci_soc_platform_register(struct device *dev); 34int davinci_soc_platform_register(struct device *dev);
33void davinci_soc_platform_unregister(struct device *dev); 35void davinci_soc_platform_unregister(struct device *dev);
34 36
37#else
38
39static inline int davinci_soc_platform_register(struct device *dev)
40{
41 return 0;
42}
43
44static inline void davinci_soc_platform_unregister(struct device *dev)
45{
46}
47
48#endif
49
35#endif 50#endif
diff --git a/sound/soc/omap/Kconfig b/sound/soc/omap/Kconfig
index 9afb392e87e..03018765291 100644
--- a/sound/soc/omap/Kconfig
+++ b/sound/soc/omap/Kconfig
@@ -130,3 +130,15 @@ config SND_OMAP_SOC_OMAP3_PANDORA
130 select SND_SOC_TWL4030 130 select SND_SOC_TWL4030
131 help 131 help
132 Say Y if you want to add support for SoC audio on the OMAP3 Pandora. 132 Say Y if you want to add support for SoC audio on the OMAP3 Pandora.
133
134config SND_DRA7_SOC_ATL
135 tristate
136
137config SND_SOC_DRA7_EVM
138 tristate "SoC Audio support for DRA7 EVM"
139 depends on SND_OMAP_SOC && SOC_DRA7XX
140 select SND_DAVINCI_SOC_MCASP
141 select SND_SOC_TLV320AIC3X
142 select SND_DRA7_SOC_ATL
143 help
144 Say Y if you want to add support for SoC audio on DRA7 EVM
diff --git a/sound/soc/omap/Makefile b/sound/soc/omap/Makefile
index 4e89a7fd3e8..fc9c78177f5 100644
--- a/sound/soc/omap/Makefile
+++ b/sound/soc/omap/Makefile
@@ -8,6 +8,7 @@ snd-soc-omap-hdmi-objs := omap-hdmi.o
8snd-soc-omap-abe-objs := omap-abe-core.o omap-abe-dbg.o omap-abe-mixer.o \ 8snd-soc-omap-abe-objs := omap-abe-core.o omap-abe-dbg.o omap-abe-mixer.o \
9 omap-abe-mmap.o omap-abe-opp.o omap-abe-pcm.o \ 9 omap-abe-mmap.o omap-abe-opp.o omap-abe-pcm.o \
10 omap-abe-pm.o 10 omap-abe-pm.o
11snd-soc-dra7-atl-objs := dra7-atl.o
11 12
12obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o 13obj-$(CONFIG_SND_OMAP_SOC) += snd-soc-omap.o
13obj-$(CONFIG_SND_OMAP_SOC_DMIC) += snd-soc-omap-dmic.o 14obj-$(CONFIG_SND_OMAP_SOC_DMIC) += snd-soc-omap-dmic.o
@@ -16,6 +17,7 @@ obj-$(CONFIG_SND_OMAP_SOC_MCBSP) += snd-soc-omap-mcbsp.o
16obj-$(CONFIG_SND_OMAP_SOC_MCPDM) += snd-soc-omap-mcpdm.o 17obj-$(CONFIG_SND_OMAP_SOC_MCPDM) += snd-soc-omap-mcpdm.o
17obj-$(CONFIG_SND_OMAP_SOC_HDMI) += snd-soc-omap-hdmi.o 18obj-$(CONFIG_SND_OMAP_SOC_HDMI) += snd-soc-omap-hdmi.o
18obj-$(CONFIG_SND_OMAP_SOC_ABE) += snd-soc-omap-abe.o aess/ 19obj-$(CONFIG_SND_OMAP_SOC_ABE) += snd-soc-omap-abe.o aess/
20obj-$(CONFIG_SND_DRA7_SOC_ATL) += snd-soc-dra7-atl.o
19 21
20# OMAP Machine Support 22# OMAP Machine Support
21snd-soc-n810-objs := n810.o 23snd-soc-n810-objs := n810.o
@@ -27,6 +29,7 @@ snd-soc-omap-abe-twl6040-objs := omap-abe-twl6040.o
27snd-soc-omap-twl4030-objs := omap-twl4030.o 29snd-soc-omap-twl4030-objs := omap-twl4030.o
28snd-soc-omap3pandora-objs := omap3pandora.o 30snd-soc-omap3pandora-objs := omap3pandora.o
29snd-soc-omap-hdmi-card-objs := omap-hdmi-card.o 31snd-soc-omap-hdmi-card-objs := omap-hdmi-card.o
32snd-soc-dra7-evm-objs := dra7-evm.o
30 33
31obj-$(CONFIG_SND_OMAP_SOC_N810) += snd-soc-n810.o 34obj-$(CONFIG_SND_OMAP_SOC_N810) += snd-soc-n810.o
32obj-$(CONFIG_SND_OMAP_SOC_RX51) += snd-soc-rx51.o 35obj-$(CONFIG_SND_OMAP_SOC_RX51) += snd-soc-rx51.o
@@ -37,4 +40,5 @@ obj-$(CONFIG_SND_OMAP_SOC_AM3517EVM) += snd-soc-am3517evm.o
37obj-$(CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040) += snd-soc-omap-abe-twl6040.o 40obj-$(CONFIG_SND_OMAP_SOC_OMAP_ABE_TWL6040) += snd-soc-omap-abe-twl6040.o
38obj-$(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) += snd-soc-omap-twl4030.o 41obj-$(CONFIG_SND_OMAP_SOC_OMAP_TWL4030) += snd-soc-omap-twl4030.o
39obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o 42obj-$(CONFIG_SND_OMAP_SOC_OMAP3_PANDORA) += snd-soc-omap3pandora.o
43obj-$(CONFIG_SND_SOC_DRA7_EVM) += snd-soc-dra7-evm.o
40obj-$(CONFIG_SND_OMAP_SOC_OMAP_HDMI) += snd-soc-omap-hdmi-card.o 44obj-$(CONFIG_SND_OMAP_SOC_OMAP_HDMI) += snd-soc-omap-hdmi-card.o
diff --git a/sound/soc/omap/dra7-atl.c b/sound/soc/omap/dra7-atl.c
new file mode 100644
index 00000000000..156dc29c960
--- /dev/null
+++ b/sound/soc/omap/dra7-atl.c
@@ -0,0 +1,317 @@
1/*
2 * dra7-atl.c -- DRA7xx Audio Tracking Logic driver
3 *
4 * Copyright (C) 2013 Texas Instruments
5 *
6 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
20 * 02110-1301 USA
21 *
22 */
23
24#include <linux/init.h>
25#include <linux/platform_device.h>
26#include <linux/module.h>
27#include <linux/err.h>
28#include <linux/slab.h>
29#include <linux/io.h>
30#include <linux/of.h>
31#include <linux/clk.h>
32#include <linux/pm_runtime.h>
33
34/* ATL instances */
35#define ATL0 0
36#define ATL1 1
37#define ATL2 2
38#define ATL3 3
39#define ATL_INSTANCES 4
40
41/* ATL instance offsets */
42#define ATL_INST(id) (0x200 + (id * 0x80))
43
44/* ATL registers */
45#define ATL_REVID 0x000
46#define ATL_PPMR(inst) (inst + 0x00)
47#define ATL_BBSR(inst) (inst + 0x04)
48#define ATL_ATLCR(inst) (inst + 0x08)
49#define ATL_SWEN(inst) (inst + 0x10)
50#define ATL_BWSMUX(inst) (inst + 0x14)
51#define ATL_AWSMUX(inst) (inst + 0x18)
52#define ATL_PCLKMUX(inst) (inst + 0x1c)
53
54/* ATL_ATCLCR */
55#define INTERNAL_DIVIDER_MAX 0x1F
56
57/* ATL_SWEN register */
58#define ATL_DISABLE 0
59#define ATL_ENABLE 1
60
61/* ATL_BWSMUX / ATL_AWSMUX register */
62#define ATL_WSMUX_MAX 0xF
63
64/* ATL_PCLKMUX register */
65#define PCLKMUX_OCP_CLK 0
66#define PCLKMUX_ATLPCLK 1
67
68struct atl_data {
69 struct device *dev;
70 void __iomem *io_base;
71 unsigned int atlpclk_freq;
72};
73
74static inline void dra7_atl_write(struct atl_data *atl, u32 reg, u32 val)
75{
76 __raw_writel(val, atl->io_base + reg);
77}
78
79static inline int dra7_atl_read(struct atl_data *atl, u32 reg)
80{
81 return __raw_readl(atl->io_base + reg);
82}
83
84static int dra7_atl_init(struct atl_data *atl)
85{
86 struct clk *gfclk, *parent_clk;
87 int ret;
88
89 gfclk = clk_get(atl->dev, "atl_gfclk_mux");
90 if (IS_ERR(gfclk)) {
91 dev_err(atl->dev, "failed to get ATLPCLK\n");
92 return PTR_ERR(gfclk);
93 }
94
95 parent_clk = clk_get(atl->dev, "dpll_abe_m2_ck");
96 if (IS_ERR(parent_clk)) {
97 dev_err(atl->dev, "failed to get new parent clock\n");
98 ret = PTR_ERR(parent_clk);
99 goto err1;
100 }
101
102 ret = clk_set_parent(gfclk, parent_clk);
103 if (ret) {
104 dev_err(atl->dev, "failed to reparent ATLPCLK\n");
105 goto err2;
106 }
107
108 atl->atlpclk_freq = clk_get_rate(gfclk);
109 dev_dbg(atl->dev, "ATLPCLK is at %u Hz\n", atl->atlpclk_freq);
110
111err2:
112 clk_put(parent_clk);
113err1:
114 clk_put(gfclk);
115 return ret;
116}
117
118static void dra7_atl_dump(struct atl_data *atl, int id)
119{
120 int inst = ATL_INST(id);
121
122 dev_dbg(atl->dev, "ATL_PPMR%d = 0x%08x\n",
123 id, dra7_atl_read(atl, ATL_PPMR(inst)));
124 dev_dbg(atl->dev, "ATL_BBSR%d = 0x%08x\n",
125 id, dra7_atl_read(atl, ATL_BBSR(inst)));
126 dev_dbg(atl->dev, "ATL_ATLCR%d = 0x%08x\n",
127 id, dra7_atl_read(atl, ATL_ATLCR(inst)));
128 dev_dbg(atl->dev, "ATL_SWEN%d = 0x%08x\n",
129 id, dra7_atl_read(atl, ATL_SWEN(inst)));
130 dev_dbg(atl->dev, "ATL_BWSMUX%d = 0x%08x\n",
131 id, dra7_atl_read(atl, ATL_BWSMUX(inst)));
132 dev_dbg(atl->dev, "ATL_AWSMUX%d = 0x%08x\n",
133 id, dra7_atl_read(atl, ATL_AWSMUX(inst)));
134 dev_dbg(atl->dev, "ATL_PCLKMUX%d = 0x%08x\n",
135 id, dra7_atl_read(atl, ATL_PCLKMUX(inst)));
136}
137
138static int dra7_atl_configure(struct atl_data *atl, int id,
139 unsigned int bws, unsigned int aws,
140 unsigned int atclk_freq)
141{
142 int inst = ATL_INST(id);
143 u32 divider;
144 unsigned int min_freq, max_freq;
145
146 if ((bws > ATL_WSMUX_MAX) || (aws > ATL_WSMUX_MAX)) {
147 dev_err(atl->dev, "invalid word select inputs bws %u aws %u\n",
148 bws, aws);
149 return -EINVAL;
150 }
151
152 /* Keep ATL instance disabled */
153 if (atclk_freq == 0)
154 return 0;
155
156 /*
157 * Internal divider cannot be 0 (divide-by-1), so ATCLK max freq
158 * cannot be higher than ATLPCLK / 2. Max divider allowed is 32
159 */
160 min_freq = atl->atlpclk_freq / (INTERNAL_DIVIDER_MAX + 1);
161 max_freq = atl->atlpclk_freq / 2;
162
163 dev_dbg(atl->dev, "configure ATL%d to %u Hz\n", id, atclk_freq);
164
165 if ((atclk_freq < min_freq) || (atclk_freq > max_freq)) {
166 dev_err(atl->dev, "requested freq %u is not allowed\n",
167 atclk_freq);
168 return -EINVAL;
169 }
170
171 /* Disable ATL while reparenting and changing ATLPCLK input */
172 dra7_atl_write(atl, ATL_SWEN(inst), ATL_DISABLE);
173
174 /* ATL divider (ATL_INTERNAL_DIVIDER): ATLPCLK-to-ATCLK ratio - 1 */
175 divider = (atl->atlpclk_freq / atclk_freq) - 1;
176 dra7_atl_write(atl, ATL_ATLCR(inst), divider);
177
178 /* Enable ATL */
179 dra7_atl_write(atl, ATL_SWEN(inst), ATL_ENABLE);
180
181 /* Basebased word select */
182 dra7_atl_write(atl, ATL_BWSMUX(inst), bws);
183
184 /* Audio word select */
185 dra7_atl_write(atl, ATL_AWSMUX(inst), aws);
186
187 dra7_atl_dump(atl, id);
188
189 return 0;
190}
191
192static void dra7_atl_reset(struct atl_data *atl, int id)
193{
194 dev_dbg(atl->dev, "reset ATL%d\n", id);
195 dra7_atl_write(atl, ATL_SWEN(ATL_INST(id)), ATL_DISABLE);
196}
197
198static int dra7_atl_probe(struct platform_device *pdev)
199{
200 struct device_node *node = pdev->dev.of_node;
201 struct atl_data *atl;
202 struct resource *res;
203 unsigned int atclk_freq;
204 unsigned int bws, aws;
205 char prop[128];
206 int i;
207 int ret;
208
209 atl = devm_kzalloc(&pdev->dev, sizeof(*atl), GFP_KERNEL);
210 if (!atl)
211 return -ENOMEM;
212
213 platform_set_drvdata(pdev, atl);
214 atl->dev = &pdev->dev;
215
216 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
217 if (!res)
218 return -ENOMEM;
219
220 if (!devm_request_mem_region(&pdev->dev, res->start,
221 resource_size(res), "atl"))
222 return -EBUSY;
223
224 atl->io_base = devm_ioremap(&pdev->dev, res->start,
225 resource_size(res));
226 if (!atl->io_base)
227 return -ENOMEM;
228
229 if (!node) {
230 dev_err(atl->dev, "missing of_node\n");
231 return -ENODEV;
232 }
233
234 ret = dra7_atl_init(atl);
235 if (ret) {
236 dev_err(atl->dev, "failed to initialize ATL\n");
237 return ret;
238 }
239
240 pm_runtime_enable(atl->dev);
241 pm_runtime_get_sync(atl->dev);
242
243 /*
244 * There is a single ATLPCLK mux for all ATL instances and
245 * is controlled by PCLKMUX0. The rest of PCLKMUXs don't have
246 * any effect of clock selection
247 */
248 dra7_atl_write(atl, ATL_PCLKMUX(ATL_INST(0)), PCLKMUX_ATLPCLK);
249
250 for (i = 0; i < ATL_INSTANCES; i++) {
251 atclk_freq = 0;
252 snprintf(prop, sizeof(prop), "ti,atclk%u-freq", i);
253 of_property_read_u32(node, prop, &atclk_freq);
254
255 bws = 0;
256 snprintf(prop, sizeof(prop), "ti,atl%u-bws-input", i);
257 of_property_read_u32(node, prop, &bws);
258
259 aws = 0;
260 snprintf(prop, sizeof(prop), "ti,atl%u-aws-input", i);
261 of_property_read_u32(node, prop, &aws);
262
263 ret = dra7_atl_configure(atl, i, bws, aws, atclk_freq);
264 if (ret) {
265 dev_err(atl->dev, "failed to configure ATL%d\n", i);
266 goto err;
267 }
268 }
269
270 return 0;
271
272err:
273 for (i--; i >= 0; --i)
274 dra7_atl_reset(atl, i);
275
276 pm_runtime_put_sync(atl->dev);
277 pm_runtime_disable(atl->dev);
278
279 return ret;
280}
281
282static int dra7_atl_remove(struct platform_device *pdev)
283{
284 struct atl_data *atl = platform_get_drvdata(pdev);
285 int i;
286
287 for (i = 0; i < ATL_INSTANCES; i++)
288 dra7_atl_reset(atl, i);
289
290 pm_runtime_put_sync(atl->dev);
291 pm_runtime_disable(atl->dev);
292
293 return 0;
294}
295
296static const struct of_device_id dra7_atl_of_match[] = {
297 {.compatible = "ti,dra7-atl", },
298 { },
299};
300MODULE_DEVICE_TABLE(of, dra7_atl_of_match);
301
302static struct platform_driver dra7_atl_driver = {
303 .driver = {
304 .name = "dra7-atl-sound",
305 .owner = THIS_MODULE,
306 .of_match_table = dra7_atl_of_match,
307 },
308 .probe = dra7_atl_probe,
309 .remove = dra7_atl_remove,
310};
311
312module_platform_driver(dra7_atl_driver);
313
314MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
315MODULE_DESCRIPTION("ATL");
316MODULE_LICENSE("GPL");
317MODULE_ALIAS("platform:dra7-atl");
diff --git a/sound/soc/omap/dra7-evm.c b/sound/soc/omap/dra7-evm.c
new file mode 100644
index 00000000000..adad937f843
--- /dev/null
+++ b/sound/soc/omap/dra7-evm.c
@@ -0,0 +1,331 @@
1/*
2 * dr7-evm.c -- SoC audio for TI DRA7 EVM
3 *
4 * Author: Misael Lopez Cruz <misael.lopez@ti.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but
11 * WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 * General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
18 * 02110-1301 USA
19 *
20 */
21
22#include <linux/platform_device.h>
23#include <linux/module.h>
24#include <linux/of.h>
25#include <linux/clk.h>
26#include <linux/io.h>
27#include <sound/core.h>
28#include <sound/pcm.h>
29#include <sound/soc.h>
30#include <sound/pcm_params.h>
31#include <sound/soc-dapm.h>
32
33struct dra7_snd_data {
34 unsigned int media_mclk_freq;
35 int media_slots;
36};
37
38static int dra7_mcasp_reparent(struct snd_soc_card *card,
39 const char *fclk_name,
40 const char *parent_name)
41{
42 struct clk *gfclk, *parent_clk;
43 int ret;
44
45 gfclk = clk_get(card->dev, fclk_name);
46 if (IS_ERR(gfclk)) {
47 dev_err(card->dev, "failed to get %s\n", fclk_name);
48 return PTR_ERR(gfclk);
49 }
50
51 parent_clk = clk_get(card->dev, parent_name);
52 if (IS_ERR(parent_clk)) {
53 dev_err(card->dev, "failed to get new parent clock %s\n",
54 parent_name);
55 ret = PTR_ERR(parent_clk);
56 goto err1;
57 }
58
59 ret = clk_set_parent(gfclk, parent_clk);
60 if (ret) {
61 dev_err(card->dev, "failed to reparent %s\n", fclk_name);
62 goto err2;
63 }
64
65err2:
66 clk_put(parent_clk);
67err1:
68 clk_put(gfclk);
69 return ret;
70}
71
72static unsigned int dra7_get_bclk(struct snd_pcm_hw_params *params, int slots)
73{
74 int sample_size = snd_pcm_format_width(params_format(params));
75 int rate = params_rate(params);
76
77 return sample_size * slots * rate;
78}
79
80static int dra7_snd_media_hw_params(struct snd_pcm_substream *substream,
81 struct snd_pcm_hw_params *params)
82{
83 struct snd_soc_pcm_runtime *rtd = substream->private_data;
84 struct snd_soc_dai *cpu_dai = rtd->cpu_dai;
85 struct snd_soc_dai *codec_dai = rtd->codec_dai;
86 struct snd_soc_card *card = rtd->card;
87 struct dra7_snd_data *card_data = snd_soc_card_get_drvdata(card);
88 unsigned int fmt = SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_CBS_CFS;
89 unsigned int bclk_freq;
90 int ret;
91
92 bclk_freq = dra7_get_bclk(params, card_data->media_slots);
93 if (card_data->media_mclk_freq % bclk_freq) {
94 dev_err(card->dev, "can't produce exact sample freq\n");
95 return -EPERM;
96 }
97
98 /* McASP driver requires inverted frame for I2S */
99 ret = snd_soc_dai_set_fmt(cpu_dai, fmt | SND_SOC_DAIFMT_NB_IF);
100 if (ret < 0) {
101 dev_err(card->dev, "can't set CPU DAI format %d\n", ret);
102 return ret;
103 }
104
105 /* Set McASP BCLK divider (clkid = 1) */
106 ret = snd_soc_dai_set_clkdiv(cpu_dai, 1,
107 card_data->media_mclk_freq / bclk_freq);
108 if (ret < 0) {
109 dev_err(card->dev, "can't set CPU DAI clock divider %d\n", ret);
110 return ret;
111 }
112
113 /* Set McASP sysclk from AHCLKX sourced from ATL */
114 ret = snd_soc_dai_set_sysclk(cpu_dai, 0,
115 card_data->media_mclk_freq,
116 SND_SOC_CLOCK_IN);
117 if (ret < 0) {
118 dev_err(card->dev, "can't set CPU DAI sysclk %d\n", ret);
119 return ret;
120 }
121
122 ret = snd_soc_dai_set_fmt(codec_dai, fmt | SND_SOC_DAIFMT_NB_NF);
123 if (ret < 0) {
124 dev_err(card->dev, "can't set CODEC DAI format %d\n", ret);
125 return ret;
126 }
127
128 /* Set MCLK as clock source for tlv320aic3106 */
129 ret = snd_soc_dai_set_sysclk(codec_dai, 0,
130 card_data->media_mclk_freq,
131 SND_SOC_CLOCK_IN);
132 if (ret < 0)
133 dev_err(card->dev, "can't set CODEC sysclk %d\n", ret);
134
135 return ret;
136}
137
138static struct snd_soc_ops dra7_snd_media_ops = {
139 .hw_params = dra7_snd_media_hw_params,
140};
141
142static struct snd_soc_dai_link dra7_snd_dai[] = {
143 {
144 /* Media: McASP3 + tlv320aic3106 */
145 .name = "Media",
146 .codec_dai_name = "tlv320aic3x-hifi",
147 .platform_name = "omap-pcm-audio",
148 .ops = &dra7_snd_media_ops,
149 },
150};
151
152static int dra7_snd_add_dai_link(struct snd_soc_card *card,
153 struct snd_soc_dai_link *dai_link,
154 const char *prefix)
155{
156 struct dra7_snd_data *card_data = snd_soc_card_get_drvdata(card);
157 struct device_node *node = card->dev->of_node;
158 struct device_node *dai_node;
159 char prop[32];
160 int ret;
161
162 if (!node) {
163 dev_err(card->dev, "card node is invalid\n");
164 return -EINVAL;
165 }
166
167 snprintf(prop, sizeof(prop), "%s-mclk-freq", prefix);
168 of_property_read_u32(node, prop,
169 &card_data->media_mclk_freq);
170
171 snprintf(prop, sizeof(prop), "%s-cpu", prefix);
172 dai_node = of_parse_phandle(node, prop, 0);
173 if (!dai_node) {
174 dev_err(card->dev, "cpu dai node is invalid\n");
175 return -EINVAL;
176 }
177
178 dai_link->cpu_of_node = dai_node;
179
180 snprintf(prop, sizeof(prop), "%s-codec", prefix);
181 dai_node = of_parse_phandle(node, prop, 0);
182 if (!dai_node) {
183 dev_err(card->dev, "codec dai node is invalid\n");
184 return -EINVAL;
185 }
186
187 dai_link->codec_of_node = dai_node;
188
189 snprintf(prop, sizeof(prop), "%s-slots", prefix);
190 of_property_read_u32(node, prop, &card_data->media_slots);
191 if ((card_data->media_slots < 1) ||
192 (card_data->media_slots > 32)) {
193 dev_err(card->dev, "invalid media slot count %d\n",
194 card_data->media_slots);
195 return -EINVAL;
196 }
197
198 ret = snd_soc_card_new_dai_links(card, dai_link, 1);
199 if (ret < 0) {
200 dev_err(card->dev, "failed to add dai link %s\n",
201 dai_link->name);
202 return ret;
203 }
204
205 return 0;
206}
207
208/* DRA7 CPU board widgets */
209static const struct snd_soc_dapm_widget dra7_snd_dapm_widgets[] = {
210 /* CPU board input */
211 SND_SOC_DAPM_MIC("Main Mic", NULL),
212 SND_SOC_DAPM_LINE("Line In", NULL),
213
214 /* CPU board outputs */
215 SND_SOC_DAPM_HP("Headphone", NULL),
216 SND_SOC_DAPM_LINE("Line Out", NULL),
217};
218
219/* Audio machine driver */
220static struct snd_soc_card dra7_snd_card = {
221 .owner = THIS_MODULE,
222 .dapm_widgets = dra7_snd_dapm_widgets,
223 .num_dapm_widgets = ARRAY_SIZE(dra7_snd_dapm_widgets),
224};
225
226static int dra7_snd_probe(struct platform_device *pdev)
227{
228 struct device_node *node = pdev->dev.of_node;
229 struct snd_soc_card *card = &dra7_snd_card;
230 struct dra7_snd_data *card_data;
231 int ret;
232
233 /*
234 * HACK: DMA CROSSBAR
235 * CTRL_CORE_DMA_SYSTEM_DREQ_62_63
236 * McASP6 TX: DREQ_139 -> sDMA_62
237 * McASP6 RX: DREQ_138 -> sDMA_63
238 * CTRL_CORE_DMA_SYSTEM_DREQ_78_79
239 * McASP3 TX: DREQ_133 -> sDMA_78
240 * McASP3 RX: DREQ_132 -> sDMA_79
241 */
242 void __iomem *dma_sys_dreq = ioremap(0x4A002B78, SZ_1K);
243 __raw_writel(0x008a008b, dma_sys_dreq + 0x7c); /* DREQ_62_63 */
244 __raw_writel(0x00840085, dma_sys_dreq + 0x9c); /* DREQ_78_79 */
245 iounmap(dma_sys_dreq);
246
247 card->dev = &pdev->dev;
248
249 card_data = devm_kzalloc(&pdev->dev, sizeof(*card_data), GFP_KERNEL);
250 if (card_data == NULL)
251 return -ENOMEM;
252
253 if (!node) {
254 dev_err(card->dev, "missing of_node\n");
255 return -ENODEV;
256 }
257
258 ret = snd_soc_of_parse_card_name(card, "ti,model");
259 if (ret) {
260 dev_err(card->dev, "card name is not provided\n");
261 return -ENODEV;
262 }
263
264 ret = snd_soc_of_parse_audio_routing(card,
265 "ti,audio-routing");
266 if (ret) {
267 dev_err(card->dev, "failed to parse DAPM routing\n");
268 return ret;
269 }
270
271 snd_soc_card_set_drvdata(card, card_data);
272
273 ret = dra7_snd_add_dai_link(card, &dra7_snd_dai[0], "ti,media");
274 if (ret) {
275 dev_err(card->dev, "failed to add media dai link %d\n", ret);
276 return ret;
277 }
278
279 ret = snd_soc_register_card(card);
280 if (ret) {
281 dev_err(card->dev, "failed to register sound card %d\n", ret);
282 goto err_card;
283 }
284
285 ret = dra7_mcasp_reparent(card, "mcasp3_ahclkx_mux", "atl_clkin2_ck");
286 if (ret) {
287 dev_err(card->dev, "failed to reparent McASP3 %d\n", ret);
288 goto err_reparent;
289 }
290
291 return 0;
292
293err_reparent:
294 snd_soc_unregister_card(card);
295err_card:
296 snd_soc_card_reset_dai_links(card);
297 return ret;
298}
299static int dra7_snd_remove(struct platform_device *pdev)
300{
301 struct snd_soc_card *card = platform_get_drvdata(pdev);
302
303 snd_soc_unregister_card(card);
304 snd_soc_card_reset_dai_links(card);
305
306 return 0;
307}
308
309static const struct of_device_id dra7_snd_of_match[] = {
310 {.compatible = "ti,dra7-evm-sound", },
311 { },
312};
313MODULE_DEVICE_TABLE(of, dra7_snd_of_match);
314
315static struct platform_driver dra7_snd_driver = {
316 .driver = {
317 .name = "dra7-evm-sound",
318 .owner = THIS_MODULE,
319 .pm = &snd_soc_pm_ops,
320 .of_match_table = dra7_snd_of_match,
321 },
322 .probe = dra7_snd_probe,
323 .remove = dra7_snd_remove,
324};
325
326module_platform_driver(dra7_snd_driver);
327
328MODULE_AUTHOR("Misael Lopez Cruz <misael.lopez@ti.com>");
329MODULE_DESCRIPTION("ALSA SoC for DRA7 EVM");
330MODULE_LICENSE("GPL");
331MODULE_ALIAS("platform:dra7-evm-sound");
diff --git a/sound/soc/omap/omap-hdmi-card.c b/sound/soc/omap/omap-hdmi-card.c
index 1e32bf884a8..cb9ad8231d3 100644
--- a/sound/soc/omap/omap-hdmi-card.c
+++ b/sound/soc/omap/omap-hdmi-card.c
@@ -74,8 +74,6 @@ static int omap_hdmi_probe(struct platform_device *pdev)
74 return -ENODEV; 74 return -ENODEV;
75 } 75 }
76 76
77 printk(KERN_ERR "card name is %s", card->name);
78
79 dev_node = of_parse_phandle(node, "ti,hdmi_audio", 0); 77 dev_node = of_parse_phandle(node, "ti,hdmi_audio", 0);
80 if (!dev_node) { 78 if (!dev_node) {
81 dev_err(&pdev->dev, "hdmi node is not provided\n"); 79 dev_err(&pdev->dev, "hdmi node is not provided\n");
diff --git a/sound/soc/omap/omap-hdmi.c b/sound/soc/omap/omap-hdmi.c
index b65a57484d0..b60a32faf9f 100644
--- a/sound/soc/omap/omap-hdmi.c
+++ b/sound/soc/omap/omap-hdmi.c
@@ -193,12 +193,10 @@ static int omap_hdmi_dai_hw_params(struct snd_pcm_substream *substream,
193 193
194 cea->db3 = 0; /* not used, all zeros */ 194 cea->db3 = 0; /* not used, all zeros */
195 195
196 /*
197 * The OMAP HDMI IP requires to use the 8-channel channel code when
198 * transmitting more than two channels.
199 */
200 if (params_channels(params) == 2) 196 if (params_channels(params) == 2)
201 cea->db4_ca = 0x0; 197 cea->db4_ca = 0x0;
198 else if (params_channels(params) == 6)
199 cea->db4_ca = 0xb;
202 else 200 else
203 cea->db4_ca = 0x13; 201 cea->db4_ca = 0x13;
204 202
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index 47bdbd415ad..17793726fc3 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -82,7 +82,7 @@ static int omap_pcm_hw_params(struct snd_pcm_substream *substream,
82 struct snd_pcm_runtime *runtime = substream->runtime; 82 struct snd_pcm_runtime *runtime = substream->runtime;
83 struct snd_soc_pcm_runtime *rtd = substream->private_data; 83 struct snd_soc_pcm_runtime *rtd = substream->private_data;
84 struct omap_pcm_dma_data *dma_data; 84 struct omap_pcm_dma_data *dma_data;
85 struct dma_slave_config config; 85 struct dma_slave_config config = {0};
86 struct dma_chan *chan; 86 struct dma_chan *chan;
87 int err = 0; 87 int err = 0;
88 88