aboutsummaryrefslogtreecommitdiffstats
blob: 02c910fb2118498af16eb39e66e59d9ebd5be7ea (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
/*
 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
/dts-v1/;

/include/ "dra7.dtsi"

/ {
	model = "TI DRA7";
	compatible = "ti,dra7-evm", "ti,dra7";

	cpus {
		cpu@0 {
			cpu0-supply = <&avs_mpu>;
		};
	};

	memory {
		device_type = "memory";
		reg = <0x80000000 0x20000000>; /* 512 MB */
	};

	vmmc2_fixed: fixedregulator-mmc2 {
		compatible = "regulator-fixed";
		regulator-name = "vmmc2_fixed";
		regulator-min-microvolt = <3000000>;
		regulator-max-microvolt = <3000000>;
	};

	ion_config {
		compatible = "ti,ion-omap";
		ti,omap_ion_heap_secure_input_base = <0xba300000>;
		ti,omap_ion_heap_tiler_base = <0xb4300000>;
		ti,omap_ion_heap_nonsecure_tiler_base = <0xf00000>;
		/*90 MB*/
		ti,omap_ion_heap_secure_input_size = <0x5A00000>;
		/*96 MB*/
		ti,omap_ion_heap_tiler_size = <0x6000000>;
		/*15 MB*/
		ti,omap_ion_heap_nonsecure_tiler_size = <0xF00000>;
	};

	ocp {
		gpu: gpu@0x56000000 {
		gpu-supply = <&avs_gpu>;
		};
	};
};

&dra7_pmx_core {
        pinctrl-names = "default";
        pinctrl-0 = <
		&vout1_pins
		&usb_pins
	>;

	usb_pins: pinmux_usb_pins {
                pinctrl-single,pins = <
			0x280	0xc0000	/* DRV1_VBUS SLEW | PULLDEN | MODE0 */
			0x284	0xc0000	/* DRV2_VBUS SLEW | PULLDEN | MODE0 */
                >;
        };

	i2c2_pins: pinmux_i2c2_pins {
                pinctrl-single,pins = <
			0x408	0x60000	/* i2c2_sda INPUT | MODE0 */
			0x40C	0x60000	/* i2c2_scl INPUT | MODE0 */
                >;
        };

	vout1_pins: pinmux_vout1_pins {
		pinctrl-single,pins = <
			0x1C8	0x0	/* vout1_clk OUTPUT | MODE0 */
			0x1CC	0x0	/* vout1_de OUTPUT | MODE0 */
			0x1D0	0x0	/* vout1_fld OUTPUT | MODE0 */
			0x1D4	0x0	/* vout1_hsync OUTPUT | MODE0 */
			0x1D8	0x0	/* vout1_vsync OUTPUT | MODE0 */
			0x1DC	0x0	/* vout1_d0 OUTPUT | MODE0 */
			0x1E0	0x0	/* vout1_d1 OUTPUT | MODE0 */
			0x1E4	0x0	/* vout1_d2 OUTPUT | MODE0 */
			0x1E8	0x0	/* vout1_d3 OUTPUT | MODE0 */
			0x1EC	0x0	/* vout1_d4 OUTPUT | MODE0 */
			0x1F0	0x0	/* vout1_d5 OUTPUT | MODE0 */
			0x1F4	0x0	/* vout1_d6 OUTPUT | MODE0 */
			0x1F8	0x0	/* vout1_d7 OUTPUT | MODE0 */
			0x1FC	0x0	/* vout1_d8 OUTPUT | MODE0 */
			0x200	0x0	/* vout1_d9 OUTPUT | MODE0 */
			0x204	0x0	/* vout1_d10 OUTPUT | MODE0 */
			0x208	0x0	/* vout1_d11 OUTPUT | MODE0 */
			0x20C	0x0	/* vout1_d12 OUTPUT | MODE0 */
			0x210	0x0	/* vout1_d13 OUTPUT | MODE0 */
			0x214	0x0	/* vout1_d14 OUTPUT | MODE0 */
			0x218	0x0	/* vout1_d15 OUTPUT | MODE0 */
			0x21C	0x0	/* vout1_d16 OUTPUT | MODE0 */
			0x220	0x0	/* vout1_d17 OUTPUT | MODE0 */
			0x224	0x0	/* vout1_d18 OUTPUT | MODE0 */
			0x228	0x0	/* vout1_d19 OUTPUT | MODE0 */
			0x22C	0x0	/* vout1_d20 OUTPUT | MODE0 */
			0x230	0x0	/* vout1_d21 OUTPUT | MODE0 */
			0x234	0x0	/* vout1_d22 OUTPUT | MODE0 */
			0x238	0x0	/* vout1_d23 OUTPUT | MODE0 */
		>;
	};
	display_layout {
		compatible = "ti, omap4-dsscomp";
		ti,num_displays = <2>;
		ti,default_display = "lcd";
	};
};

&i2c1 {
	clock-frequency = <400000>;

	tps659038: tps659038@58 {
		reg = <0x58>;
	};

	pcf_lcd: pcf8575@20 {
		compatible = "ti,pcf8575";
		reg = <0x20>;
		gpio-controller;
		#gpio-cells = <2>;
	};

	/* TLC chip for LCD panel power and backlight */
	tlc59108: tlc59108@40 {
		compatible = "ti,tlc59108";
		reg = <0x40>;
		gpios = <&pcf_lcd 15 0>; /* P15, CON_LCD_PWR_DN */
	};
};

/include/ "tps659038.dtsi"

&i2c2 {
        pinctrl-names = "default";
        pinctrl-0 = <&i2c2_pins>;

	clock-frequency = <400000>;

	pcf_hdmi: pcf8575@26 {
		compatible = "ti,pcf8575";
		reg = <0x26>;
		gpio-controller;
		#gpio-cells = <2>;
	};
};

&i2c3 {
	clock-frequency = <400000>;
};

&i2c4 {
	clock-frequency = <400000>;
};

&i2c5 {
	clock-frequency = <400000>;
};

&mmc1 {
	vmmc-supply = <&ldo1_reg>;
	bus-width = <4>;
};

&mmc2 {
	vmmc-supply = <&vmmc2_fixed>;
	bus-width = <8>;
	ti,non-removable;
};

&mmc3 {
	bus-width = <8>;
	ti,non-removable;
	status = "disabled";
};

&mmc4 {
	bus-width = <4>;
	status = "disabled";
};

&avs_mpu {
	avs-supply = <&smps123_reg>;
};

&avs_core {
	avs-supply = <&smps7_reg>;
};

&avs_gpu {
	avs-supply = <&smps6_reg>;
};

&avs_dspeve {
	avs-supply = <&smps45_reg>;
};

&avs_iva {
	avs-supply = <&smps8_reg>;
};

&dpi1 {
	lcd {
		compatible = "ti,tfc_s9700";
		tlc = <&tlc59108>;
		data-lines = <24>;
	};
};

&hdmi {
	tpd12s015: tpd12s015 {
		compatible = "ti,tpd12s015";

		gpios = <&pcf_hdmi 4 0>,	/* pcf8575@22 P4, CT_CP_HDP */
			<&pcf_hdmi 5 0>,	/* pcf8575@22 P5, LS_OE */
			<&gpio7 12 0>;		/* gpio7_12/sp1_cs2, HPD */

		hdmi_ddc = <&i2c2>;

		hdmi-monitor {
			compatible = "ti,hdmi_panel";
		};
	};
};