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authorLokesh Vutla2017-07-31 06:28:15 -0500
committerJean-Jacques Hiblot2017-08-02 09:14:03 -0500
commit1b090494c80dc51a411dc1386e539a2a09d866fd (patch)
treeea1efbda165a25a6b523bddccdb595a7e049f445
parent87c7bd1a7aa3e8e7086064e04d4c0b90a23046b9 (diff)
downloadu-boot-1b090494c80dc51a411dc1386e539a2a09d866fd.tar.gz
u-boot-1b090494c80dc51a411dc1386e539a2a09d866fd.tar.xz
u-boot-1b090494c80dc51a411dc1386e539a2a09d866fd.zip
ARM: dts: dra76-evm: Add initial support
Add initial dts support for dra76-evm. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/dts/Makefile2
-rw-r--r--arch/arm/dts/dra7-evm-common.dtsi190
-rw-r--r--arch/arm/dts/dra7-evm.dts175
-rw-r--r--arch/arm/dts/dra76-evm.dts421
-rw-r--r--arch/arm/dts/dra76x.dtsi27
-rw-r--r--board/ti/dra7xx/evm.c4
-rw-r--r--configs/dra7xx_evm_defconfig2
-rw-r--r--configs/dra7xx_hs_evm_defconfig2
8 files changed, 645 insertions, 178 deletions
diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
index 0c87fa4492..fa81de1152 100644
--- a/arch/arm/dts/Makefile
+++ b/arch/arm/dts/Makefile
@@ -108,7 +108,7 @@ dtb-$(CONFIG_ARCH_SOCFPGA) += \
108 socfpga_cyclone5_sr1500.dtb 108 socfpga_cyclone5_sr1500.dtb
109 109
110dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \ 110dtb-$(CONFIG_TARGET_DRA7XX_EVM) += dra72-evm.dtb dra7-evm.dtb \
111 dra72-evm-revc.dtb dra71-evm.dtb 111 dra72-evm-revc.dtb dra71-evm.dtb dra76-evm.dtb
112dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \ 112dtb-$(CONFIG_TARGET_AM57XX_EVM) += am57xx-beagle-x15.dtb \
113 am572x-idk.dtb \ 113 am572x-idk.dtb \
114 am571x-idk.dtb 114 am571x-idk.dtb
diff --git a/arch/arm/dts/dra7-evm-common.dtsi b/arch/arm/dts/dra7-evm-common.dtsi
new file mode 100644
index 0000000000..78ffafd143
--- /dev/null
+++ b/arch/arm/dts/dra7-evm-common.dtsi
@@ -0,0 +1,190 @@
1/*
2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include <dt-bindings/gpio/gpio.h>
10#include <dt-bindings/input/input.h>
11
12/ {
13 chosen {
14 stdout-path = &uart1;
15 tick-timer = &timer2;
16 };
17
18 extcon_usb1: extcon_usb1 {
19 compatible = "linux,extcon-usb-gpio";
20 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
21 };
22
23 extcon_usb2: extcon_usb2 {
24 compatible = "linux,extcon-usb-gpio";
25 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
26 };
27
28 leds {
29 compatible = "gpio-leds";
30 led@0 {
31 label = "dra7:usr1";
32 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
33 default-state = "off";
34 };
35
36 led@1 {
37 label = "dra7:usr2";
38 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
39 default-state = "off";
40 };
41
42 led@2 {
43 label = "dra7:usr3";
44 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
45 default-state = "off";
46 };
47
48 led@3 {
49 label = "dra7:usr4";
50 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
51 default-state = "off";
52 };
53 };
54
55 gpio_keys {
56 compatible = "gpio-keys";
57 #address-cells = <1>;
58 #size-cells = <0>;
59 autorepeat;
60
61 USER1 {
62 label = "btnUser1";
63 linux,code = <BTN_0>;
64 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
65 };
66
67 USER2 {
68 label = "btnUser2";
69 linux,code = <BTN_1>;
70 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
71 };
72 };
73};
74
75&dra7_pmx_core {
76 dcan1_pins_default: dcan1_pins_default {
77 pinctrl-single,pins = <
78 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
79 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
80 >;
81 };
82
83 dcan1_pins_sleep: dcan1_pins_sleep {
84 pinctrl-single,pins = <
85 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
86 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
87 >;
88 };
89};
90
91&i2c3 {
92 status = "okay";
93 clock-frequency = <400000>;
94};
95
96&mcspi1 {
97 status = "okay";
98};
99
100&mcspi2 {
101 status = "okay";
102};
103
104&uart1 {
105 status = "okay";
106 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
107 <&dra7_pmx_core 0x3e0>;
108};
109
110&uart2 {
111 status = "okay";
112};
113
114&uart3 {
115 status = "okay";
116};
117
118
119&qspi {
120 status = "okay";
121
122 spi-max-frequency = <76800000>;
123 m25p80@0 {
124 compatible = "s25fl256s1";
125 spi-max-frequency = <76800000>;
126 reg = <0>;
127 spi-tx-bus-width = <1>;
128 spi-rx-bus-width = <4>;
129 #address-cells = <1>;
130 #size-cells = <1>;
131
132 /* MTD partition table.
133 * The ROM checks the first four physical blocks
134 * for a valid file to boot and the flash here is
135 * 64KiB block size.
136 */
137 partition@0 {
138 label = "QSPI.SPL";
139 reg = <0x00000000 0x000040000>;
140 };
141 partition@1 {
142 label = "QSPI.u-boot";
143 reg = <0x00040000 0x00100000>;
144 };
145 partition@2 {
146 label = "QSPI.u-boot-spl-os";
147 reg = <0x00140000 0x00080000>;
148 };
149 partition@3 {
150 label = "QSPI.u-boot-env";
151 reg = <0x001c0000 0x00010000>;
152 };
153 partition@4 {
154 label = "QSPI.u-boot-env.backup1";
155 reg = <0x001d0000 0x0010000>;
156 };
157 partition@5 {
158 label = "QSPI.kernel";
159 reg = <0x001e0000 0x0800000>;
160 };
161 partition@6 {
162 label = "QSPI.file-system";
163 reg = <0x009e0000 0x01620000>;
164 };
165 };
166};
167
168&omap_dwc3_1 {
169 extcon = <&extcon_usb1>;
170};
171
172&omap_dwc3_2 {
173 extcon = <&extcon_usb2>;
174};
175
176&usb1 {
177 dr_mode = "peripheral";
178};
179
180&usb2 {
181 dr_mode = "host";
182};
183
184&dcan1 {
185 status = "ok";
186 pinctrl-names = "default", "sleep", "active";
187 pinctrl-0 = <&dcan1_pins_sleep>;
188 pinctrl-1 = <&dcan1_pins_sleep>;
189 pinctrl-2 = <&dcan1_pins_default>;
190};
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index 8fe6311582..ceee1a76b5 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -8,6 +8,7 @@
8/dts-v1/; 8/dts-v1/;
9 9
10#include "dra74x.dtsi" 10#include "dra74x.dtsi"
11#include "dra7-evm-common.dtsi"
11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h> 13#include <dt-bindings/input/input.h>
13 14
@@ -15,11 +16,6 @@
15 model = "TI DRA742"; 16 model = "TI DRA742";
16 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7"; 17 compatible = "ti,dra7-evm", "ti,dra742", "ti,dra74", "ti,dra7";
17 18
18 chosen {
19 stdout-path = &uart1;
20 tick-timer = &timer2;
21 };
22
23 memory { 19 memory {
24 device_type = "memory"; 20 device_type = "memory";
25 reg = <0x80000000 0x60000000>; /* 1536 MB */ 21 reg = <0x80000000 0x60000000>; /* 1536 MB */
@@ -61,15 +57,6 @@
61 enable-active-high; 57 enable-active-high;
62 }; 58 };
63 59
64 extcon_usb1: extcon_usb1 {
65 compatible = "linux,extcon-usb-gpio";
66 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
67 };
68
69 extcon_usb2: extcon_usb2 {
70 compatible = "linux,extcon-usb-gpio";
71 id-gpio = <&pcf_gpio_21 2 GPIO_ACTIVE_HIGH>;
72 };
73 60
74 vtt_fixed: fixedregulator-vtt { 61 vtt_fixed: fixedregulator-vtt {
75 compatible = "regulator-fixed"; 62 compatible = "regulator-fixed";
@@ -82,69 +69,9 @@
82 vin-supply = <&sysen2>; 69 vin-supply = <&sysen2>;
83 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 70 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
84 }; 71 };
85
86 leds {
87 compatible = "gpio-leds";
88 led@0 {
89 label = "dra7:usr1";
90 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
91 default-state = "off";
92 };
93
94 led@1 {
95 label = "dra7:usr2";
96 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
97 default-state = "off";
98 };
99
100 led@2 {
101 label = "dra7:usr3";
102 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
103 default-state = "off";
104 };
105
106 led@3 {
107 label = "dra7:usr4";
108 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
109 default-state = "off";
110 };
111 };
112
113 gpio_keys {
114 compatible = "gpio-keys";
115 #address-cells = <1>;
116 #size-cells = <0>;
117 autorepeat;
118
119 USER1 {
120 label = "btnUser1";
121 linux,code = <BTN_0>;
122 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
123 };
124
125 USER2 {
126 label = "btnUser2";
127 linux,code = <BTN_1>;
128 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
129 };
130 };
131}; 72};
132 73
133&dra7_pmx_core { 74&dra7_pmx_core {
134 dcan1_pins_default: dcan1_pins_default {
135 pinctrl-single,pins = <
136 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
137 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
138 >;
139 };
140
141 dcan1_pins_sleep: dcan1_pins_sleep {
142 pinctrl-single,pins = <
143 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
144 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
145 >;
146 };
147
148 hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin { 75 hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin {
149 pinctrl-single,pins = < 76 pinctrl-single,pins = <
150 /* this pin is used as a GPIO via mcasp */ 77 /* this pin is used as a GPIO via mcasp */
@@ -705,33 +632,6 @@
705 }; 632 };
706}; 633};
707 634
708&i2c3 {
709 status = "okay";
710 clock-frequency = <400000>;
711};
712
713&mcspi1 {
714 status = "okay";
715};
716
717&mcspi2 {
718 status = "okay";
719};
720
721&uart1 {
722 status = "okay";
723 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
724 <&dra7_pmx_core 0x3e0>;
725};
726
727&uart2 {
728 status = "okay";
729};
730
731&uart3 {
732 status = "okay";
733};
734
735&mmc1 { 635&mmc1 {
736 status = "okay"; 636 status = "okay";
737 vmmc-supply = <&evm_3v3_sd>; 637 vmmc-supply = <&evm_3v3_sd>;
@@ -773,71 +673,6 @@
773 cpu0-supply = <&smps123_reg>; 673 cpu0-supply = <&smps123_reg>;
774}; 674};
775 675
776&qspi {
777 status = "okay";
778
779 spi-max-frequency = <76800000>;
780 m25p80@0 {
781 compatible = "s25fl256s1";
782 spi-max-frequency = <76800000>;
783 reg = <0>;
784 spi-tx-bus-width = <1>;
785 spi-rx-bus-width = <4>;
786 #address-cells = <1>;
787 #size-cells = <1>;
788
789 /* MTD partition table.
790 * The ROM checks the first four physical blocks
791 * for a valid file to boot and the flash here is
792 * 64KiB block size.
793 */
794 partition@0 {
795 label = "QSPI.SPL";
796 reg = <0x00000000 0x000040000>;
797 };
798 partition@1 {
799 label = "QSPI.u-boot";
800 reg = <0x00040000 0x00100000>;
801 };
802 partition@2 {
803 label = "QSPI.u-boot-spl-os";
804 reg = <0x00140000 0x00080000>;
805 };
806 partition@3 {
807 label = "QSPI.u-boot-env";
808 reg = <0x001c0000 0x00010000>;
809 };
810 partition@4 {
811 label = "QSPI.u-boot-env.backup1";
812 reg = <0x001d0000 0x0010000>;
813 };
814 partition@5 {
815 label = "QSPI.kernel";
816 reg = <0x001e0000 0x0800000>;
817 };
818 partition@6 {
819 label = "QSPI.file-system";
820 reg = <0x009e0000 0x01620000>;
821 };
822 };
823};
824
825&omap_dwc3_1 {
826 extcon = <&extcon_usb1>;
827};
828
829&omap_dwc3_2 {
830 extcon = <&extcon_usb2>;
831};
832
833&usb1 {
834 dr_mode = "peripheral";
835};
836
837&usb2 {
838 dr_mode = "host";
839};
840
841&elm { 676&elm {
842 status = "okay"; 677 status = "okay";
843}; 678};
@@ -949,11 +784,3 @@
949 phy-mode = "rgmii"; 784 phy-mode = "rgmii";
950 dual_emac_res_vlan = <2>; 785 dual_emac_res_vlan = <2>;
951}; 786};
952
953&dcan1 {
954 status = "ok";
955 pinctrl-names = "default", "sleep", "active";
956 pinctrl-0 = <&dcan1_pins_sleep>;
957 pinctrl-1 = <&dcan1_pins_sleep>;
958 pinctrl-2 = <&dcan1_pins_default>;
959};
diff --git a/arch/arm/dts/dra76-evm.dts b/arch/arm/dts/dra76-evm.dts
new file mode 100644
index 0000000000..5b14dbf72a
--- /dev/null
+++ b/arch/arm/dts/dra76-evm.dts
@@ -0,0 +1,421 @@
1/*
2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8/dts-v1/;
9
10#include "dra76x.dtsi"
11#include "dra7-evm-common.dtsi"
12#include <dt-bindings/net/ti-dp83867.h>
13
14/ {
15 model = "TI DRA762 EVM";
16 compatible = "ti,dra76-evm", "ti,dra76", "ti,dra7";
17
18 memory@0 {
19 device_type = "memory";
20 reg = <0x0 0x80000000 0x0 0x80000000>;
21 };
22
23 vsys_12v0: fixedregulator-vsys12v0 {
24 /* main supply */
25 compatible = "regulator-fixed";
26 regulator-name = "vsys_12v0";
27 regulator-min-microvolt = <12000000>;
28 regulator-max-microvolt = <12000000>;
29 regulator-always-on;
30 regulator-boot-on;
31 };
32
33 vsys_5v0: fixedregulator-vsys5v0 {
34 /* Output of Cntlr B of TPS43351-Q1 on dra76-evm */
35 compatible = "regulator-fixed";
36 regulator-name = "vsys_5v0";
37 regulator-min-microvolt = <5000000>;
38 regulator-max-microvolt = <5000000>;
39 vin-supply = <&vsys_12v0>;
40 regulator-always-on;
41 regulator-boot-on;
42 };
43
44 vsys_3v3: fixedregulator-vsys3v3 {
45 /* Output of Cntlr A of TPS43351-Q1 on dra76-evm */
46 compatible = "regulator-fixed";
47 regulator-name = "vsys_3v3";
48 regulator-min-microvolt = <3300000>;
49 regulator-max-microvolt = <3300000>;
50 vin-supply = <&vsys_12v0>;
51 regulator-always-on;
52 regulator-boot-on;
53 };
54
55 vio_3v3: fixedregulator-vio_3v3 {
56 compatible = "regulator-fixed";
57 regulator-name = "vio_3v3";
58 regulator-min-microvolt = <3300000>;
59 regulator-max-microvolt = <3300000>;
60 vin-supply = <&vsys_3v3>;
61 regulator-always-on;
62 regulator-boot-on;
63 };
64
65 vio_3v3_sd: fixedregulator-sd {
66 compatible = "regulator-fixed";
67 regulator-name = "vio_3v3_sd";
68 regulator-min-microvolt = <3300000>;
69 regulator-max-microvolt = <3300000>;
70 vin-supply = <&vio_3v3>;
71 enable-active-high;
72 gpio = <&gpio4 21 GPIO_ACTIVE_HIGH>;
73 };
74
75 vio_1v8: fixedregulator-vio_1v8 {
76 compatible = "regulator-fixed";
77 regulator-name = "vio_1v8";
78 regulator-min-microvolt = <1800000>;
79 regulator-max-microvolt = <1800000>;
80 vin-supply = <&smps5_reg>;
81 };
82
83 vtt_fixed: fixedregulator-vtt {
84 compatible = "regulator-fixed";
85 regulator-name = "vtt_fixed";
86 regulator-min-microvolt = <1350000>;
87 regulator-max-microvolt = <1350000>;
88 vin-supply = <&vsys_3v3>;
89 regulator-always-on;
90 regulator-boot-on;
91 };
92
93 aic_dvdd: fixedregulator-aic_dvdd {
94 /* TPS77018DBVT */
95 compatible = "regulator-fixed";
96 regulator-name = "aic_dvdd";
97 vin-supply = <&vio_3v3>;
98 regulator-min-microvolt = <1800000>;
99 regulator-max-microvolt = <1800000>;
100 };
101};
102
103&dra7_pmx_core {
104 mmc1_pins_default: mmc1_pins_default {
105 pinctrl-single,pins = <
106 0x36c (PIN_INPUT | MUX_MODE14) /* mmc1sdcd.gpio219 */
107 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
108 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
109 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
110 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
111 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
112 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
113 >;
114 };
115
116 mmc2_pins_default: mmc2_pins_default {
117 pinctrl-single,pins = <
118 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
119 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
120 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
121 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
122 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
123 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
124 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
125 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
126 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
127 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
128 >;
129 };
130
131 mmc4_pins_default: mmc4_pins_default {
132 pinctrl-single,pins = <
133 0x3e (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_ctsn.mmc4_clk */
134 0x3e (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart1_rtsn.mmc4_cmd */
135 0x3f (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rxd.mmc4_dat0 */
136 0x3f (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_txd.mmc4_dat1 */
137 0x3f (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_ctsn.mmc4_dat2 */
138 0x3f (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_rtsn.mmc4_dat3 */
139 >;
140 };
141};
142
143&i2c1 {
144 status = "okay";
145 clock-frequency = <400000>;
146
147 tps65917: tps65917@58 {
148 compatible = "ti,tps65917";
149 reg = <0x58>;
150 ti,system-power-controller;
151 interrupt-controller;
152 #interrupt-cells = <2>;
153
154 tps65917_pmic {
155 compatible = "ti,tps65917-pmic";
156
157 smps12-in-supply = <&vsys_3v3>;
158 smps3-in-supply = <&vsys_3v3>;
159 smps4-in-supply = <&vsys_3v3>;
160 smps5-in-supply = <&vsys_3v3>;
161 ldo1-in-supply = <&vsys_3v3>;
162 ldo2-in-supply = <&vsys_3v3>;
163 ldo3-in-supply = <&vsys_5v0>;
164 ldo4-in-supply = <&vsys_5v0>;
165 ldo5-in-supply = <&vsys_3v3>;
166
167 tps65917_regulators: regulators {
168 smps12_reg: smps12 {
169 /* VDD_DSPEVE */
170 regulator-name = "smps12";
171 regulator-min-microvolt = <850000>;
172 regulator-max-microvolt = <1250000>;
173 regulator-always-on;
174 regulator-boot-on;
175 };
176
177 smps3_reg: smps3 {
178 /* VDD_CORE */
179 regulator-name = "smps3";
180 regulator-min-microvolt = <850000>;
181 regulator-max-microvolt = <1250000>;
182 regulator-boot-on;
183 regulator-always-on;
184 };
185
186 smps4_reg: smps4 {
187 /* VDD_IVA */
188 regulator-name = "smps4";
189 regulator-min-microvolt = <850000>;
190 regulator-max-microvolt = <1250000>;
191 regulator-always-on;
192 regulator-boot-on;
193 };
194
195 smps5_reg: smps5 {
196 /* VDDS1V8 */
197 regulator-name = "smps5";
198 regulator-min-microvolt = <1800000>;
199 regulator-max-microvolt = <1800000>;
200 regulator-boot-on;
201 regulator-always-on;
202 };
203
204 ldo1_reg: ldo1 {
205 /* LDO1_OUT --> VDA_PHY1_1V8 */
206 regulator-name = "ldo1";
207 regulator-min-microvolt = <1800000>;
208 regulator-max-microvolt = <1800000>;
209 regulator-always-on;
210 regulator-boot-on;
211 regulator-allow-bypass;
212 };
213
214 ldo2_reg: ldo2 {
215 /* LDO2_OUT --> VDA_PHY2_1V8 */
216 regulator-name = "ldo2";
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <1800000>;
219 regulator-allow-bypass;
220 regulator-always-on;
221 };
222
223 ldo3_reg: ldo3 {
224 /* VDA_USB_3V3 */
225 regulator-name = "ldo3";
226 regulator-min-microvolt = <3300000>;
227 regulator-max-microvolt = <3300000>;
228 regulator-boot-on;
229 regulator-always-on;
230 };
231
232 ldo5_reg: ldo5 {
233 /* VDDA_1V8_PLL */
234 regulator-name = "ldo5";
235 regulator-min-microvolt = <1800000>;
236 regulator-max-microvolt = <1800000>;
237 regulator-always-on;
238 regulator-boot-on;
239 };
240
241 ldo4_reg: ldo4 {
242 /* VDD_SDIO_DV */
243 regulator-name = "ldo4";
244 regulator-min-microvolt = <1800000>;
245 regulator-max-microvolt = <3300000>;
246 regulator-boot-on;
247 regulator-always-on;
248 };
249 };
250 };
251
252 tps65917_power_button {
253 compatible = "ti,palmas-pwrbutton";
254 interrupt-parent = <&tps65917>;
255 interrupts = <1 IRQ_TYPE_NONE>;
256 wakeup-source;
257 ti,palmas-long-press-seconds = <6>;
258 };
259 };
260
261 lp87565: lp87565@60 {
262 compatible = "ti,lp87565-q1";
263 reg = <0x60>;
264
265 buck10-in-supply =<&vsys_3v3>;
266 buck23-in-supply =<&vsys_3v3>;
267
268 regulators: regulators {
269 buck10_reg: buck10 {
270 /*VDD_MPU*/
271 regulator-name = "buck10";
272 regulator-min-microvolt = <850000>;
273 regulator-max-microvolt = <1250000>;
274 regulator-always-on;
275 regulator-boot-on;
276 };
277
278 buck23_reg: buck23 {
279 /* VDD_GPU*/
280 regulator-name = "buck23";
281 regulator-min-microvolt = <850000>;
282 regulator-max-microvolt = <1250000>;
283 regulator-boot-on;
284 regulator-always-on;
285 };
286 };
287 };
288
289 pcf_lcd: pcf8757@20 {
290 compatible = "ti,pcf8575", "nxp,pcf8575";
291 reg = <0x20>;
292 gpio-controller;
293 #gpio-cells = <2>;
294 interrupt-controller;
295 #interrupt-cells = <2>;
296 interrupt-parent = <&gpio1>;
297 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
298 };
299
300 pcf_gpio_21: pcf8757@21 {
301 compatible = "ti,pcf8575", "nxp,pcf8575";
302 reg = <0x21>;
303 gpio-controller;
304 #gpio-cells = <2>;
305 interrupt-parent = <&gpio1>;
306 interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
307 interrupt-controller;
308 #interrupt-cells = <2>;
309 };
310
311 pcf_hdmi: pcf8575@26 {
312 compatible = "ti,pcf8575", "nxp,pcf8575";
313 reg = <0x26>;
314 gpio-controller;
315 #gpio-cells = <2>;
316 p1 {
317 /* vin6_sel_s0: high: VIN6, low: audio */
318 gpio-hog;
319 gpios = <1 GPIO_ACTIVE_HIGH>;
320 output-low;
321 line-name = "vin6_sel_s0";
322 };
323 };
324
325 tlv320aic3106: tlv320aic3106@19 {
326 #sound-dai-cells = <0>;
327 compatible = "ti,tlv320aic3106";
328 reg = <0x19>;
329 adc-settle-ms = <40>;
330 ai3x-micbias-vg = <1>; /* 2.0V */
331 status = "okay";
332
333 /* Regulators */
334 AVDD-supply = <&vio_3v3>;
335 IOVDD-supply = <&vio_3v3>;
336 DRVDD-supply = <&vio_3v3>;
337 DVDD-supply = <&aic_dvdd>;
338 };
339};
340
341&cpu0 {
342 vdd-supply = <&buck10_reg>;
343};
344
345&mmc1 {
346 status = "okay";
347 vmmc-supply = <&vio_3v3_sd>;
348 vmmc_aux-supply = <&ldo4_reg>;
349 bus-width = <4>;
350 /*
351 * SDCD signal is not being used here - using the fact that GPIO mode
352 * is always hardwired.
353 */
354 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>;
355 pinctrl-names = "default";
356 pinctrl-0 = <&mmc1_pins_default>;
357};
358
359&mmc2 {
360 status = "okay";
361 vmmc-supply = <&vio_1v8>;
362 bus-width = <8>;
363 pinctrl-names = "default";
364 pinctrl-0 = <&mmc2_pins_default>;
365};
366
367/* No RTC on this device */
368&rtc {
369 status = "disabled";
370};
371
372&mac {
373 status = "okay";
374
375 dual_emac;
376};
377
378&cpsw_emac0 {
379 phy-handle = <&dp83867_0>;
380 phy-mode = "rgmii-id";
381 dual_emac_res_vlan = <1>;
382};
383
384&cpsw_emac1 {
385 phy-handle = <&dp83867_1>;
386 phy-mode = "rgmii-id";
387 dual_emac_res_vlan = <2>;
388};
389
390&davinci_mdio {
391 dp83867_0: ethernet-phy@2 {
392 reg = <2>;
393 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
394 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
395 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
396 ti,min-output-impedance;
397 };
398
399 dp83867_1: ethernet-phy@3 {
400 reg = <3>;
401 ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_25_NS>;
402 ti,tx-internal-delay = <DP83867_RGMIIDCTL_250_PS>;
403 ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_8_B_NIB>;
404 ti,min-output-impedance;
405 };
406};
407
408&usb2_phy1 {
409 phy-supply = <&ldo3_reg>;
410};
411
412&usb2_phy2 {
413 phy-supply = <&ldo3_reg>;
414};
415
416&qspi {
417 spi-max-frequency = <96000000>;
418 m25p80@0 {
419 spi-max-frequency = <96000000>;
420 };
421};
diff --git a/arch/arm/dts/dra76x.dtsi b/arch/arm/dts/dra76x.dtsi
new file mode 100644
index 0000000000..0176ce4da9
--- /dev/null
+++ b/arch/arm/dts/dra76x.dtsi
@@ -0,0 +1,27 @@
1/*
2 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "dra74x.dtsi"
10
11/ {
12 compatible = "ti,dra76", "ti,dra7";
13};
14
15&abb_mpu {
16 ti,abb_info = <
17 /*uV ABB efuse rbb_m fbb_m vset_m*/
18 1060000 0 0x0 0 0x02000000 0x01F00000
19 1160000 0 0x4 0 0x02000000 0x01F00000
20 1210000 0 0x8 0 0x02000000 0x01F00000
21 1250000 0 0xC 0 0x02000000 0x01F00000
22 >;
23};
24
25&mmc3 {
26 max-frequency = <96000000>;
27};
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 3d603a9d46..71eefaaf6d 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -1184,7 +1184,9 @@ int board_fit_config_name_match(const char *name)
1184 } else if (!strcmp(name, "dra72-evm")) { 1184 } else if (!strcmp(name, "dra72-evm")) {
1185 return 0; 1185 return 0;
1186 } 1186 }
1187 } else if (!is_dra72x() && !strcmp(name, "dra7-evm")) { 1187 } else if (is_dra76x() && !strcmp(name, "dra76-evm")) {
1188 return 0;
1189 } else if (!is_dra72x() && !is_dra76x() && !strcmp(name, "dra7-evm")) {
1188 return 0; 1190 return 0;
1189 } 1191 }
1190 1192
diff --git a/configs/dra7xx_evm_defconfig b/configs/dra7xx_evm_defconfig
index dcb88facee..4551cb0fe4 100644
--- a/configs/dra7xx_evm_defconfig
+++ b/configs/dra7xx_evm_defconfig
@@ -51,7 +51,7 @@ CONFIG_USB_GADGET=y
51CONFIG_FIT=y 51CONFIG_FIT=y
52CONFIG_SPL_OF_LIBFDT=y 52CONFIG_SPL_OF_LIBFDT=y
53CONFIG_SPL_LOAD_FIT=y 53CONFIG_SPL_LOAD_FIT=y
54CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm" 54CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
55CONFIG_DM_ETH=y 55CONFIG_DM_ETH=y
56CONFIG_DM_PMIC=y 56CONFIG_DM_PMIC=y
57CONFIG_PMIC_PALMAS=y 57CONFIG_PMIC_PALMAS=y
diff --git a/configs/dra7xx_hs_evm_defconfig b/configs/dra7xx_hs_evm_defconfig
index 2351b2dcd3..219d45fed6 100644
--- a/configs/dra7xx_hs_evm_defconfig
+++ b/configs/dra7xx_hs_evm_defconfig
@@ -57,7 +57,7 @@ CONFIG_FIT=y
57CONFIG_SPL_OF_LIBFDT=y 57CONFIG_SPL_OF_LIBFDT=y
58CONFIG_SPL_LOAD_FIT=y 58CONFIG_SPL_LOAD_FIT=y
59CONFIG_SPL_PANIC_ON_NON_FIT_IMAGE=y 59CONFIG_SPL_PANIC_ON_NON_FIT_IMAGE=y
60CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm" 60CONFIG_OF_LIST="dra7-evm dra72-evm dra72-evm-revc dra71-evm dra76-evm"
61CONFIG_DM_ETH=y 61CONFIG_DM_ETH=y
62CONFIG_DM_PMIC=y 62CONFIG_DM_PMIC=y
63CONFIG_PMIC_PALMAS=y 63CONFIG_PMIC_PALMAS=y