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authorVishal Mahaveer2017-08-15 11:37:35 -0500
committerVishal Mahaveer2017-09-27 13:33:45 -0500
commit5b8b7201985d2de84b533d163602e703c072468c (patch)
tree722b73c47c9ac8ccc04b6d07c036bcaaa10589cd
parent1e73acdf528e185fa50e3d330c96d325520c8133 (diff)
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ARM: DRA72x: Add support for detection of DRA71x SR 2.1
commit c130009298ef6503e906a2bfed150dbb5f0ff381 branch ti-u-boot-2017.01 DRA71x processors are reduced pin and software compatible derivative of DRA72 processors. Add support for detection of SR2.1 version of DRA71x family of processors. Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap5/hw_data.c2
-rw-r--r--arch/arm/cpu/armv7/omap5/hwinit.c3
-rw-r--r--arch/arm/cpu/armv7/omap5/sdram.c2
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h1
-rw-r--r--arch/arm/include/asm/omap_common.h1
-rw-r--r--board/ti/dra7xx/evm.c3
6 files changed, 12 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index 6170816219..22d6f041ea 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -753,6 +753,7 @@ void __weak hw_data_init(void)
753 753
754 case DRA722_ES1_0: 754 case DRA722_ES1_0:
755 case DRA722_ES2_0: 755 case DRA722_ES2_0:
756 case DRA722_ES2_1:
756 *prcm = &dra7xx_prcm; 757 *prcm = &dra7xx_prcm;
757 *dplls_data = &dra72x_dplls; 758 *dplls_data = &dra72x_dplls;
758 *ctrl = &dra7xx_ctrl; 759 *ctrl = &dra7xx_ctrl;
@@ -788,6 +789,7 @@ void get_ioregs(const struct ctrl_ioregs **regs)
788 *regs = &ioregs_dra72x_es1; 789 *regs = &ioregs_dra72x_es1;
789 break; 790 break;
790 case DRA722_ES2_0: 791 case DRA722_ES2_0:
792 case DRA722_ES2_1:
791 *regs = &ioregs_dra72x_es2; 793 *regs = &ioregs_dra72x_es2;
792 break; 794 break;
793 795
diff --git a/arch/arm/cpu/armv7/omap5/hwinit.c b/arch/arm/cpu/armv7/omap5/hwinit.c
index 434d304686..03e50ba891 100644
--- a/arch/arm/cpu/armv7/omap5/hwinit.c
+++ b/arch/arm/cpu/armv7/omap5/hwinit.c
@@ -380,6 +380,9 @@ void init_omap_revision(void)
380 case DRA722_CONTROL_ID_CODE_ES2_0: 380 case DRA722_CONTROL_ID_CODE_ES2_0:
381 *omap_si_rev = DRA722_ES2_0; 381 *omap_si_rev = DRA722_ES2_0;
382 break; 382 break;
383 case DRA722_CONTROL_ID_CODE_ES2_1:
384 *omap_si_rev = DRA722_ES2_1;
385 break;
383 default: 386 default:
384 *omap_si_rev = OMAP5430_SILICON_ID_INVALID; 387 *omap_si_rev = OMAP5430_SILICON_ID_INVALID;
385 } 388 }
diff --git a/arch/arm/cpu/armv7/omap5/sdram.c b/arch/arm/cpu/armv7/omap5/sdram.c
index 67ff63b9f6..8fb962e39d 100644
--- a/arch/arm/cpu/armv7/omap5/sdram.c
+++ b/arch/arm/cpu/armv7/omap5/sdram.c
@@ -482,6 +482,7 @@ void __weak emif_get_ext_phy_ctrl_const_regs(u32 emif_nr,
482 break; 482 break;
483 case DRA762_ES1_0: 483 case DRA762_ES1_0:
484 case DRA722_ES2_0: 484 case DRA722_ES2_0:
485 case DRA722_ES2_1:
485 *regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2; 486 *regs = dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2;
486 *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2); 487 *size = ARRAY_SIZE(dra_ddr3_ext_phy_ctrl_const_base_666MHz_es2);
487 break; 488 break;
@@ -716,6 +717,7 @@ const struct read_write_regs *get_bug_regs(u32 *iterations)
716 case DRA752_ES2_0: 717 case DRA752_ES2_0:
717 case DRA722_ES1_0: 718 case DRA722_ES1_0:
718 case DRA722_ES2_0: 719 case DRA722_ES2_0:
720 case DRA722_ES2_1:
719 bug_00339_regs_ptr = dra_bug_00339_regs; 721 bug_00339_regs_ptr = dra_bug_00339_regs;
720 *iterations = sizeof(dra_bug_00339_regs)/ 722 *iterations = sizeof(dra_bug_00339_regs)/
721 sizeof(dra_bug_00339_regs[0]); 723 sizeof(dra_bug_00339_regs[0]);
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index aca5af86fc..0fd3d85d29 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -64,6 +64,7 @@
64#define DRA752_CONTROL_ID_CODE_ES2_0 0x2B99002F 64#define DRA752_CONTROL_ID_CODE_ES2_0 0x2B99002F
65#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F 65#define DRA722_CONTROL_ID_CODE_ES1_0 0x0B9BC02F
66#define DRA722_CONTROL_ID_CODE_ES2_0 0x1B9BC02F 66#define DRA722_CONTROL_ID_CODE_ES2_0 0x1B9BC02F
67#define DRA722_CONTROL_ID_CODE_ES2_1 0x2B9BC02F
67 68
68/* UART */ 69/* UART */
69#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000) 70#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 57f8ad2fd7..951a407515 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -755,6 +755,7 @@ static inline u8 is_dra76x(void)
755#define DRA752_ES2_0 0x07520200 755#define DRA752_ES2_0 0x07520200
756#define DRA722_ES1_0 0x07220100 756#define DRA722_ES1_0 0x07220100
757#define DRA722_ES2_0 0x07220200 757#define DRA722_ES2_0 0x07220200
758#define DRA722_ES2_1 0x07220210
758 759
759/* 760/*
760 * SRAM scratch space entries 761 * SRAM scratch space entries
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index c31f9830cf..5b59f21773 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -294,6 +294,7 @@ void emif_get_reg_dump(u32 emif_nr, const struct emif_regs **regs)
294 break; 294 break;
295 case DRA722_ES1_0: 295 case DRA722_ES1_0:
296 case DRA722_ES2_0: 296 case DRA722_ES2_0:
297 case DRA722_ES2_1:
297 if (ram_size < CONFIG_MAX_MEM_MAPPED) 298 if (ram_size < CONFIG_MAX_MEM_MAPPED)
298 *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1; 299 *regs = &emif_1_regs_ddr3_666_mhz_1cs_dra_es1;
299 else 300 else
@@ -358,6 +359,7 @@ void emif_get_dmm_regs(const struct dmm_lisa_map_regs **dmm_lisa_regs)
358 break; 359 break;
359 case DRA722_ES1_0: 360 case DRA722_ES1_0:
360 case DRA722_ES2_0: 361 case DRA722_ES2_0:
362 case DRA722_ES2_1:
361 default: 363 default:
362 if (ram_size < CONFIG_MAX_MEM_MAPPED) 364 if (ram_size < CONFIG_MAX_MEM_MAPPED)
363 *dmm_lisa_regs = &lisa_map_2G_x_2; 365 *dmm_lisa_regs = &lisa_map_2G_x_2;
@@ -819,6 +821,7 @@ void recalibrate_iodelay(void)
819 switch (omap_revision()) { 821 switch (omap_revision()) {
820 case DRA722_ES1_0: 822 case DRA722_ES1_0:
821 case DRA722_ES2_0: 823 case DRA722_ES2_0:
824 case DRA722_ES2_1:
822 pads = dra72x_core_padconf_array_common; 825 pads = dra72x_core_padconf_array_common;
823 npads = ARRAY_SIZE(dra72x_core_padconf_array_common); 826 npads = ARRAY_SIZE(dra72x_core_padconf_array_common);
824 if (board_is_dra71x_evm()) { 827 if (board_is_dra71x_evm()) {