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authorVignesh R2017-08-30 12:26:56 -0500
committerJean-Jacques Hiblot2017-10-04 05:04:31 -0500
commit7e7c98489f2babcf2b4d86e3a7a1cf3cbfe1b275 (patch)
tree9c4baa6c9862beda7e89d85e40f90b5f4c650342
parent9266bcd14ea2280b17a567c7885c2583908e051a (diff)
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board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM
commit c3ca2d1a4087 ("board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM") branch ti-u-boot-2017.01 MCAN can be accessed via DCAN1 or DCAN2. Determining which DCAN instance to use if any at all is done through CTRL_CORE_CONTROL_SPARE_RW.SEL_ALT_MCAN. Since general pinmuxing is handled in U-boot. Handle this additional pinmuxing requirement in U-boot to insure that MCAN is used by default via the DCAN1 pins. Signed-off-by: Vignesh R <vigneshr@ti.com> [fcooper@ti.com: Update commit message and use DCAN1 not DCAN2 for MCAN] Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/include/asm/arch-omap5/mux_dra7xx.h3
-rw-r--r--board/ti/dra7xx/evm.c12
2 files changed, 11 insertions, 4 deletions
diff --git a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h
index 5eed98ca27..e539b008b0 100644
--- a/arch/arm/include/asm/arch-omap5/mux_dra7xx.h
+++ b/arch/arm/include/asm/arch-omap5/mux_dra7xx.h
@@ -365,4 +365,7 @@
365#define NMIN_DSP 0x460 365#define NMIN_DSP 0x460
366#define RSTOUTN 0x464 366#define RSTOUTN 0x464
367 367
368#define MCAN_SEL_ALT_MASK 0x6000
369#define MCAN_SEL 0x2000
370
368#endif /* _MUX_DRA7XX_H_ */ 371#endif /* _MUX_DRA7XX_H_ */
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 9c1f53190a..53c9fc89e6 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -751,6 +751,11 @@ void recalibrate_iodelay(void)
751 int npads, niodelays, delta_npads = 0; 751 int npads, niodelays, delta_npads = 0;
752 int ret; 752 int ret;
753 753
754 /* Setup I/O isolation */
755 ret = __recalibrate_iodelay_start();
756 if (ret)
757 goto err;
758
754 switch (omap_revision()) { 759 switch (omap_revision()) {
755 case DRA722_ES1_0: 760 case DRA722_ES1_0:
756 case DRA722_ES2_0: 761 case DRA722_ES2_0:
@@ -788,6 +793,9 @@ void recalibrate_iodelay(void)
788 npads = ARRAY_SIZE(dra76x_core_padconf_array); 793 npads = ARRAY_SIZE(dra76x_core_padconf_array);
789 iodelay = dra76x_es1_0_iodelay_cfg_array; 794 iodelay = dra76x_es1_0_iodelay_cfg_array;
790 niodelays = ARRAY_SIZE(dra76x_es1_0_iodelay_cfg_array); 795 niodelays = ARRAY_SIZE(dra76x_es1_0_iodelay_cfg_array);
796 /* Set mux for MCAN instead of DCAN1 */
797 clrsetbits_le32((*ctrl)->control_core_control_spare_rw,
798 MCAN_SEL_ALT_MASK, MCAN_SEL);
791 break; 799 break;
792 default: 800 default:
793 case DRA752_ES2_0: 801 case DRA752_ES2_0:
@@ -800,10 +808,6 @@ void recalibrate_iodelay(void)
800 RGMII1_ID_MODE_N_MASK); 808 RGMII1_ID_MODE_N_MASK);
801 break; 809 break;
802 } 810 }
803 /* Setup I/O isolation */
804 ret = __recalibrate_iodelay_start();
805 if (ret)
806 goto err;
807 811
808 /* Do the muxing here */ 812 /* Do the muxing here */
809 do_set_mux32((*ctrl)->control_padconf_core_base, pads, npads); 813 do_set_mux32((*ctrl)->control_padconf_core_base, pads, npads);