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authorJean-Jacques Hiblot2017-07-24 10:12:03 -0500
committerJean-Jacques Hiblot2017-08-02 09:13:49 -0500
commit87c7bd1a7aa3e8e7086064e04d4c0b90a23046b9 (patch)
treecc20b4d11e9ba7b2c3825df34d02e7968f77c6fd
parent7966ceea7c201a0e316373bb02e09a5573242764 (diff)
downloadu-boot-87c7bd1a7aa3e8e7086064e04d4c0b90a23046b9.tar.gz
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ARM: dts: dra7-evm: sync DT with Linux
Syncrhonized dts with 4.4 Linux Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/dts/dra7-evm.dts412
1 files changed, 155 insertions, 257 deletions
diff --git a/arch/arm/dts/dra7-evm.dts b/arch/arm/dts/dra7-evm.dts
index ecfaf6052d..8fe6311582 100644
--- a/arch/arm/dts/dra7-evm.dts
+++ b/arch/arm/dts/dra7-evm.dts
@@ -9,6 +9,7 @@
9 9
10#include "dra74x.dtsi" 10#include "dra74x.dtsi"
11#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/gpio/gpio.h>
12#include <dt-bindings/input/input.h>
12 13
13/ { 14/ {
14 model = "TI DRA742"; 15 model = "TI DRA742";
@@ -33,13 +34,33 @@
33 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>; 34 gpio = <&pcf_gpio_21 5 GPIO_ACTIVE_HIGH>;
34 }; 35 };
35 36
36 mmc2_3v3: fixedregulator-mmc2 { 37 evm_3v3_sw: fixedregulator-evm_3v3_sw {
37 compatible = "regulator-fixed"; 38 compatible = "regulator-fixed";
38 regulator-name = "mmc2_3v3"; 39 regulator-name = "evm_3v3_sw";
40 vin-supply = <&sysen1>;
39 regulator-min-microvolt = <3300000>; 41 regulator-min-microvolt = <3300000>;
40 regulator-max-microvolt = <3300000>; 42 regulator-max-microvolt = <3300000>;
41 }; 43 };
42 44
45 aic_dvdd: fixedregulator-aic_dvdd {
46 /* TPS77018DBVT */
47 compatible = "regulator-fixed";
48 regulator-name = "aic_dvdd";
49 vin-supply = <&evm_3v3_sw>;
50 regulator-min-microvolt = <1800000>;
51 regulator-max-microvolt = <1800000>;
52 };
53
54 vmmcwl_fixed: fixedregulator-mmcwl {
55 compatible = "regulator-fixed";
56 regulator-name = "vmmcwl_fixed";
57 regulator-min-microvolt = <1800000>;
58 regulator-max-microvolt = <1800000>;
59 gpio = <&gpio5 8 0>; /* gpio5_8 */
60 startup-delay-us = <70000>;
61 enable-active-high;
62 };
63
43 extcon_usb1: extcon_usb1 { 64 extcon_usb1: extcon_usb1 {
44 compatible = "linux,extcon-usb-gpio"; 65 compatible = "linux,extcon-usb-gpio";
45 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>; 66 id-gpio = <&pcf_gpio_21 1 GPIO_ACTIVE_HIGH>;
@@ -58,234 +79,90 @@
58 regulator-always-on; 79 regulator-always-on;
59 regulator-boot-on; 80 regulator-boot-on;
60 enable-active-high; 81 enable-active-high;
82 vin-supply = <&sysen2>;
61 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>; 83 gpio = <&gpio7 11 GPIO_ACTIVE_HIGH>;
62 }; 84 };
63};
64
65&dra7_pmx_core {
66 pinctrl-names = "default";
67 pinctrl-0 = <&vtt_pin>;
68
69 vtt_pin: pinmux_vtt_pin {
70 pinctrl-single,pins = <
71 0x3b4 (PIN_OUTPUT | MUX_MODE14) /* spi1_cs1.gpio7_11 */
72 >;
73 };
74 85
75 i2c1_pins: pinmux_i2c1_pins { 86 leds {
76 pinctrl-single,pins = < 87 compatible = "gpio-leds";
77 0x400 (PIN_INPUT | MUX_MODE0) /* i2c1_sda */ 88 led@0 {
78 0x404 (PIN_INPUT | MUX_MODE0) /* i2c1_scl */ 89 label = "dra7:usr1";
79 >; 90 gpios = <&pcf_lcd 4 GPIO_ACTIVE_LOW>;
80 }; 91 default-state = "off";
81 92 };
82 i2c2_pins: pinmux_i2c2_pins {
83 pinctrl-single,pins = <
84 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda */
85 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl */
86 >;
87 };
88
89 i2c3_pins: pinmux_i2c3_pins {
90 pinctrl-single,pins = <
91 0x288 (PIN_INPUT | MUX_MODE9) /* gpio6_14.i2c3_sda */
92 0x28c (PIN_INPUT | MUX_MODE9) /* gpio6_15.i2c3_scl */
93 >;
94 };
95
96 mcspi1_pins: pinmux_mcspi1_pins {
97 pinctrl-single,pins = <
98 0x3a4 (PIN_INPUT | MUX_MODE0) /* spi1_sclk */
99 0x3a8 (PIN_INPUT | MUX_MODE0) /* spi1_d1 */
100 0x3ac (PIN_INPUT | MUX_MODE0) /* spi1_d0 */
101 0x3b0 (PIN_INPUT_SLEW | MUX_MODE0) /* spi1_cs0 */
102 0x3b8 (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs2.hdmi1_hpd */
103 0x3bc (PIN_INPUT_SLEW | MUX_MODE6) /* spi1_cs3.hdmi1_cec */
104 >;
105 };
106
107 mcspi2_pins: pinmux_mcspi2_pins {
108 pinctrl-single,pins = <
109 0x3c0 (PIN_INPUT | MUX_MODE0) /* spi2_sclk */
110 0x3c4 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
111 0x3c8 (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_d1 */
112 0x3cc (PIN_INPUT_SLEW | MUX_MODE0) /* spi2_cs0 */
113 >;
114 };
115
116 uart1_pins: pinmux_uart1_pins {
117 pinctrl-single,pins = <
118 0x3e0 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_rxd */
119 0x3e4 (PIN_INPUT_SLEW | MUX_MODE0) /* uart1_txd */
120 0x3e8 (PIN_INPUT | MUX_MODE3) /* uart1_ctsn */
121 0x3ec (PIN_INPUT | MUX_MODE3) /* uart1_rtsn */
122 >;
123 };
124 93
125 uart2_pins: pinmux_uart2_pins { 94 led@1 {
126 pinctrl-single,pins = < 95 label = "dra7:usr2";
127 0x3f0 (PIN_INPUT | MUX_MODE0) /* uart2_rxd */ 96 gpios = <&pcf_lcd 5 GPIO_ACTIVE_LOW>;
128 0x3f4 (PIN_INPUT | MUX_MODE0) /* uart2_txd */ 97 default-state = "off";
129 0x3f8 (PIN_INPUT | MUX_MODE0) /* uart2_ctsn */ 98 };
130 0x3fc (PIN_INPUT | MUX_MODE0) /* uart2_rtsn */
131 >;
132 };
133 99
134 uart3_pins: pinmux_uart3_pins { 100 led@2 {
135 pinctrl-single,pins = < 101 label = "dra7:usr3";
136 0x248 (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_rxd */ 102 gpios = <&pcf_lcd 6 GPIO_ACTIVE_LOW>;
137 0x24c (PIN_INPUT_SLEW | MUX_MODE0) /* uart3_txd */ 103 default-state = "off";
138 >; 104 };
139 };
140 105
141 qspi1_pins: pinmux_qspi1_pins { 106 led@3 {
142 pinctrl-single,pins = < 107 label = "dra7:usr4";
143 0x4c (PIN_INPUT | MUX_MODE1) /* gpmc_a3.qspi1_cs2 */ 108 gpios = <&pcf_lcd 7 GPIO_ACTIVE_LOW>;
144 0x50 (PIN_INPUT | MUX_MODE1) /* gpmc_a4.qspi1_cs3 */ 109 default-state = "off";
145 0x74 (PIN_INPUT | MUX_MODE1) /* gpmc_a13.qspi1_rtclk */ 110 };
146 0x78 (PIN_INPUT | MUX_MODE1) /* gpmc_a14.qspi1_d3 */
147 0x7c (PIN_INPUT | MUX_MODE1) /* gpmc_a15.qspi1_d2 */
148 0x80 (PIN_INPUT | MUX_MODE1) /* gpmc_a16.qspi1_d1 */
149 0x84 (PIN_INPUT | MUX_MODE1) /* gpmc_a17.qspi1_d0 */
150 0x88 (PIN_INPUT | MUX_MODE1) /* qpmc_a18.qspi1_sclk */
151 0xb8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs2.qspi1_cs0 */
152 0xbc (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs3.qspi1_cs1 */
153 >;
154 }; 111 };
155 112
156 usb1_pins: pinmux_usb1_pins { 113 gpio_keys {
157 pinctrl-single,pins = < 114 compatible = "gpio-keys";
158 0x280 (PIN_INPUT_SLEW | MUX_MODE0) /* usb1_drvvbus */ 115 #address-cells = <1>;
159 >; 116 #size-cells = <0>;
160 }; 117 autorepeat;
161
162 usb2_pins: pinmux_usb2_pins {
163 pinctrl-single,pins = <
164 0x284 (PIN_INPUT_SLEW | MUX_MODE0) /* usb2_drvvbus */
165 >;
166 };
167
168 nand_flash_x16: nand_flash_x16 {
169 /* On DRA7 EVM, GPMC_WPN and NAND_BOOTn comes from DIP switch
170 * So NAND flash requires following switch settings:
171 * SW5.9 (GPMC_WPN) = LOW
172 * SW5.1 (NAND_BOOTn) = HIGH */
173 pinctrl-single,pins = <
174 0x0 (PIN_INPUT | MUX_MODE0) /* gpmc_ad0 */
175 0x4 (PIN_INPUT | MUX_MODE0) /* gpmc_ad1 */
176 0x8 (PIN_INPUT | MUX_MODE0) /* gpmc_ad2 */
177 0xc (PIN_INPUT | MUX_MODE0) /* gpmc_ad3 */
178 0x10 (PIN_INPUT | MUX_MODE0) /* gpmc_ad4 */
179 0x14 (PIN_INPUT | MUX_MODE0) /* gpmc_ad5 */
180 0x18 (PIN_INPUT | MUX_MODE0) /* gpmc_ad6 */
181 0x1c (PIN_INPUT | MUX_MODE0) /* gpmc_ad7 */
182 0x20 (PIN_INPUT | MUX_MODE0) /* gpmc_ad8 */
183 0x24 (PIN_INPUT | MUX_MODE0) /* gpmc_ad9 */
184 0x28 (PIN_INPUT | MUX_MODE0) /* gpmc_ad10 */
185 0x2c (PIN_INPUT | MUX_MODE0) /* gpmc_ad11 */
186 0x30 (PIN_INPUT | MUX_MODE0) /* gpmc_ad12 */
187 0x34 (PIN_INPUT | MUX_MODE0) /* gpmc_ad13 */
188 0x38 (PIN_INPUT | MUX_MODE0) /* gpmc_ad14 */
189 0x3c (PIN_INPUT | MUX_MODE0) /* gpmc_ad15 */
190 0xd8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0 */
191 0xcc (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen */
192 0xb4 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* gpmc_csn0 */
193 0xc4 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale */
194 0xc8 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren */
195 0xd0 (PIN_OUTPUT | MUX_MODE0) /* gpmc_be0n_cle */
196 >;
197 };
198 118
199 cpsw_default: cpsw_default { 119 USER1 {
200 pinctrl-single,pins = < 120 label = "btnUser1";
201 /* Slave 1 */ 121 linux,code = <BTN_0>;
202 0x250 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txc.rgmii0_txc */ 122 gpios = <&pcf_lcd 2 GPIO_ACTIVE_LOW>;
203 0x254 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txctl.rgmii0_txctl */ 123 };
204 0x258 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_td3.rgmii0_txd3 */
205 0x25c (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd2.rgmii0_txd2 */
206 0x260 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd1.rgmii0_txd1 */
207 0x264 (PIN_OUTPUT | MUX_MODE0) /* rgmii0_txd0.rgmii0_txd0 */
208 0x268 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxc.rgmii0_rxc */
209 0x26c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxctl.rgmii0_rxctl */
210 0x270 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd3.rgmii0_rxd3 */
211 0x274 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd2.rgmii0_rxd2 */
212 0x278 (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd1.rgmii0_rxd1 */
213 0x27c (PIN_INPUT | MUX_MODE0) /* rgmii0_rxd0.rgmii0_rxd0 */
214
215 /* Slave 2 */
216 0x198 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d12.rgmii1_txc */
217 0x19c (PIN_OUTPUT | MUX_MODE3) /* vin2a_d13.rgmii1_tctl */
218 0x1a0 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d14.rgmii1_td3 */
219 0x1a4 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d15.rgmii1_td2 */
220 0x1a8 (PIN_OUTPUT | MUX_MODE3) /* vin2a_d16.rgmii1_td1 */
221 0x1ac (PIN_OUTPUT | MUX_MODE3) /* vin2a_d17.rgmii1_td0 */
222 0x1b0 (PIN_INPUT | MUX_MODE3) /* vin2a_d18.rgmii1_rclk */
223 0x1b4 (PIN_INPUT | MUX_MODE3) /* vin2a_d19.rgmii1_rctl */
224 0x1b8 (PIN_INPUT | MUX_MODE3) /* vin2a_d20.rgmii1_rd3 */
225 0x1bc (PIN_INPUT | MUX_MODE3) /* vin2a_d21.rgmii1_rd2 */
226 0x1c0 (PIN_INPUT | MUX_MODE3) /* vin2a_d22.rgmii1_rd1 */
227 0x1c4 (PIN_INPUT | MUX_MODE3) /* vin2a_d23.rgmii1_rd0 */
228 >;
229 124
125 USER2 {
126 label = "btnUser2";
127 linux,code = <BTN_1>;
128 gpios = <&pcf_lcd 3 GPIO_ACTIVE_LOW>;
129 };
230 }; 130 };
131};
231 132
232 cpsw_sleep: cpsw_sleep { 133&dra7_pmx_core {
134 dcan1_pins_default: dcan1_pins_default {
233 pinctrl-single,pins = < 135 pinctrl-single,pins = <
234 /* Slave 1 */ 136 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
235 0x250 (MUX_MODE15) 137 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
236 0x254 (MUX_MODE15)
237 0x258 (MUX_MODE15)
238 0x25c (MUX_MODE15)
239 0x260 (MUX_MODE15)
240 0x264 (MUX_MODE15)
241 0x268 (MUX_MODE15)
242 0x26c (MUX_MODE15)
243 0x270 (MUX_MODE15)
244 0x274 (MUX_MODE15)
245 0x278 (MUX_MODE15)
246 0x27c (MUX_MODE15)
247
248 /* Slave 2 */
249 0x198 (MUX_MODE15)
250 0x19c (MUX_MODE15)
251 0x1a0 (MUX_MODE15)
252 0x1a4 (MUX_MODE15)
253 0x1a8 (MUX_MODE15)
254 0x1ac (MUX_MODE15)
255 0x1b0 (MUX_MODE15)
256 0x1b4 (MUX_MODE15)
257 0x1b8 (MUX_MODE15)
258 0x1bc (MUX_MODE15)
259 0x1c0 (MUX_MODE15)
260 0x1c4 (MUX_MODE15)
261 >; 138 >;
262 }; 139 };
263 140
264 davinci_mdio_default: davinci_mdio_default { 141 dcan1_pins_sleep: dcan1_pins_sleep {
265 pinctrl-single,pins = < 142 pinctrl-single,pins = <
266 0x23c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_d.mdio_d */ 143 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
267 0x240 (PIN_INPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */ 144 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
268 >; 145 >;
269 }; 146 };
270 147
271 davinci_mdio_sleep: davinci_mdio_sleep { 148 hdmi_i2c_sel_pin: pinmux_hdmi_i2c_sel_pin {
272 pinctrl-single,pins = < 149 pinctrl-single,pins = <
273 0x23c (MUX_MODE15) 150 /* this pin is used as a GPIO via mcasp */
274 0x240 (MUX_MODE15) 151 0x2fc (PIN_OUTPUT | MUX_MODE1) /* mcasp8_axr2 */
275 >; 152 >;
276 }; 153 };
277 154
278 dcan1_pins_default: dcan1_pins_default { 155 hdmi_i2c_pins_i2c: pinmux_hdmi_i2c_pins_default {
279 pinctrl-single,pins = < 156 pinctrl-single,pins = <
280 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */ 157 0x408 (PIN_INPUT | MUX_MODE0) /* i2c2_sda.i2c2_sda */
281 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */ 158 0x40c (PIN_INPUT | MUX_MODE0) /* i2c2_scl.i2c2_scl */
282 >; 159 >;
283 }; 160 };
284 161
285 dcan1_pins_sleep: dcan1_pins_sleep { 162 hdmi_i2c_pins_ddc: pinmux_hdmi_i2c_pins_ddc {
286 pinctrl-single,pins = < 163 pinctrl-single,pins = <
287 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */ 164 0x408 (PIN_INPUT | MUX_MODE1) /* i2c2_sda.hdmi1_ddc_scl */
288 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */ 165 0x40c (PIN_INPUT | MUX_MODE1) /* i2c2_scl.hdmi1_ddc_sda */
289 >; 166 >;
290 }; 167 };
291 168
@@ -623,8 +500,6 @@
623 500
624&i2c1 { 501&i2c1 {
625 status = "okay"; 502 status = "okay";
626 pinctrl-names = "default";
627 pinctrl-0 = <&i2c1_pins>;
628 clock-frequency = <400000>; 503 clock-frequency = <400000>;
629 504
630 tps659038: tps659038@58 { 505 tps659038: tps659038@58 {
@@ -648,7 +523,7 @@
648 /* VDD_DSPEVE */ 523 /* VDD_DSPEVE */
649 regulator-name = "smps45"; 524 regulator-name = "smps45";
650 regulator-min-microvolt = < 850000>; 525 regulator-min-microvolt = < 850000>;
651 regulator-max-microvolt = <1150000>; 526 regulator-max-microvolt = <1250000>;
652 regulator-always-on; 527 regulator-always-on;
653 regulator-boot-on; 528 regulator-boot-on;
654 }; 529 };
@@ -666,7 +541,7 @@
666 /* CORE_VDD */ 541 /* CORE_VDD */
667 regulator-name = "smps7"; 542 regulator-name = "smps7";
668 regulator-min-microvolt = <850000>; 543 regulator-min-microvolt = <850000>;
669 regulator-max-microvolt = <1060000>; 544 regulator-max-microvolt = <1150000>;
670 regulator-always-on; 545 regulator-always-on;
671 regulator-boot-on; 546 regulator-boot-on;
672 }; 547 };
@@ -694,6 +569,7 @@
694 regulator-name = "ldo1"; 569 regulator-name = "ldo1";
695 regulator-min-microvolt = <1800000>; 570 regulator-min-microvolt = <1800000>;
696 regulator-max-microvolt = <3300000>; 571 regulator-max-microvolt = <3300000>;
572 regulator-always-on;
697 regulator-boot-on; 573 regulator-boot-on;
698 }; 574 };
699 575
@@ -723,6 +599,7 @@
723 regulator-max-microvolt = <1050000>; 599 regulator-max-microvolt = <1050000>;
724 regulator-always-on; 600 regulator-always-on;
725 regulator-boot-on; 601 regulator-boot-on;
602 regulator-allow-bypass;
726 }; 603 };
727 604
728 ldoln_reg: ldoln { 605 ldoln_reg: ldoln {
@@ -741,10 +618,46 @@
741 regulator-max-microvolt = <3300000>; 618 regulator-max-microvolt = <3300000>;
742 regulator-boot-on; 619 regulator-boot-on;
743 }; 620 };
621
622 /* REGEN1 is unused */
623
624 regen2: regen2 {
625 /* Needed for PMIC internal resources */
626 regulator-name = "regen2";
627 regulator-boot-on;
628 regulator-always-on;
629 };
630
631 /* REGEN3 is unused */
632
633 sysen1: sysen1 {
634 /* PMIC_REGEN_3V3 */
635 regulator-name = "sysen1";
636 regulator-boot-on;
637 regulator-always-on;
638 };
639
640 sysen2: sysen2 {
641 /* PMIC_REGEN_DDR */
642 regulator-name = "sysen2";
643 regulator-boot-on;
644 regulator-always-on;
645 };
744 }; 646 };
745 }; 647 };
746 }; 648 };
747 649
650 pcf_lcd: gpio@20 {
651 compatible = "nxp,pcf8575";
652 reg = <0x20>;
653 gpio-controller;
654 #gpio-cells = <2>;
655 interrupt-parent = <&gpio6>;
656 interrupts = <11 IRQ_TYPE_EDGE_FALLING>;
657 interrupt-controller;
658 #interrupt-cells = <2>;
659 };
660
748 pcf_gpio_21: gpio@21 { 661 pcf_gpio_21: gpio@21 {
749 compatible = "ti,pcf8575"; 662 compatible = "ti,pcf8575";
750 reg = <0x21>; 663 reg = <0x21>;
@@ -757,52 +670,66 @@
757 #interrupt-cells = <2>; 670 #interrupt-cells = <2>;
758 }; 671 };
759 672
673 tlv320aic3106: tlv320aic3106@19 {
674 #sound-dai-cells = <0>;
675 compatible = "ti,tlv320aic3106";
676 reg = <0x19>;
677 adc-settle-ms = <40>;
678 ai3x-micbias-vg = <1>; /* 2.0V */
679 status = "okay";
680
681 /* Regulators */
682 AVDD-supply = <&evm_3v3_sw>;
683 IOVDD-supply = <&evm_3v3_sw>;
684 DRVDD-supply = <&evm_3v3_sw>;
685 DVDD-supply = <&aic_dvdd>;
686 };
760}; 687};
761 688
762&i2c2 { 689&i2c2 {
763 status = "okay"; 690 status = "okay";
764 pinctrl-names = "default";
765 pinctrl-0 = <&i2c2_pins>;
766 clock-frequency = <400000>; 691 clock-frequency = <400000>;
692
693 pcf_hdmi: gpio@26 {
694 compatible = "nxp,pcf8575";
695 reg = <0x26>;
696 gpio-controller;
697 #gpio-cells = <2>;
698 p1 {
699 /* vin6_sel_s0: high: VIN6, low: audio */
700 gpio-hog;
701 gpios = <1 GPIO_ACTIVE_HIGH>;
702 output-low;
703 line-name = "vin6_sel_s0";
704 };
705 };
767}; 706};
768 707
769&i2c3 { 708&i2c3 {
770 status = "okay"; 709 status = "okay";
771 pinctrl-names = "default";
772 pinctrl-0 = <&i2c3_pins>;
773 clock-frequency = <400000>; 710 clock-frequency = <400000>;
774}; 711};
775 712
776&mcspi1 { 713&mcspi1 {
777 status = "okay"; 714 status = "okay";
778 pinctrl-names = "default";
779 pinctrl-0 = <&mcspi1_pins>;
780}; 715};
781 716
782&mcspi2 { 717&mcspi2 {
783 status = "okay"; 718 status = "okay";
784 pinctrl-names = "default";
785 pinctrl-0 = <&mcspi2_pins>;
786}; 719};
787 720
788&uart1 { 721&uart1 {
789 status = "okay"; 722 status = "okay";
790 pinctrl-names = "default";
791 pinctrl-0 = <&uart1_pins>;
792 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>, 723 interrupts-extended = <&crossbar_mpu GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>,
793 <&dra7_pmx_core 0x3e0>; 724 <&dra7_pmx_core 0x3e0>;
794}; 725};
795 726
796&uart2 { 727&uart2 {
797 status = "okay"; 728 status = "okay";
798 pinctrl-names = "default";
799 pinctrl-0 = <&uart2_pins>;
800}; 729};
801 730
802&uart3 { 731&uart3 {
803 status = "okay"; 732 status = "okay";
804 pinctrl-names = "default";
805 pinctrl-0 = <&uart3_pins>;
806}; 733};
807 734
808&mmc1 { 735&mmc1 {
@@ -830,7 +757,7 @@
830 757
831&mmc2 { 758&mmc2 {
832 status = "okay"; 759 status = "okay";
833 vmmc-supply = <&mmc2_3v3>; 760 vmmc-supply = <&evm_3v3_sw>;
834 bus-width = <8>; 761 bus-width = <8>;
835 max-frequency = <192000000>; 762 max-frequency = <192000000>;
836 pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v"; 763 pinctrl-names = "default", "hs", "ddr_1_8v-rev11", "ddr_1_8v", "hs200_1_8v-rev11", "hs200_1_8v";
@@ -848,12 +775,10 @@
848 775
849&qspi { 776&qspi {
850 status = "okay"; 777 status = "okay";
851 pinctrl-names = "default";
852 pinctrl-0 = <&qspi1_pins>;
853 778
854 spi-max-frequency = <64000000>; 779 spi-max-frequency = <76800000>;
855 m25p80@0 { 780 m25p80@0 {
856 compatible = "s25fl256s1","spi-flash"; 781 compatible = "s25fl256s1";
857 spi-max-frequency = <76800000>; 782 spi-max-frequency = <76800000>;
858 reg = <0>; 783 reg = <0>;
859 spi-tx-bus-width = <1>; 784 spi-tx-bus-width = <1>;
@@ -868,41 +793,29 @@
868 */ 793 */
869 partition@0 { 794 partition@0 {
870 label = "QSPI.SPL"; 795 label = "QSPI.SPL";
871 reg = <0x00000000 0x000010000>; 796 reg = <0x00000000 0x000040000>;
872 }; 797 };
873 partition@1 { 798 partition@1 {
874 label = "QSPI.SPL.backup1";
875 reg = <0x00010000 0x00010000>;
876 };
877 partition@2 {
878 label = "QSPI.SPL.backup2";
879 reg = <0x00020000 0x00010000>;
880 };
881 partition@3 {
882 label = "QSPI.SPL.backup3";
883 reg = <0x00030000 0x00010000>;
884 };
885 partition@4 {
886 label = "QSPI.u-boot"; 799 label = "QSPI.u-boot";
887 reg = <0x00040000 0x00100000>; 800 reg = <0x00040000 0x00100000>;
888 }; 801 };
889 partition@5 { 802 partition@2 {
890 label = "QSPI.u-boot-spl-os"; 803 label = "QSPI.u-boot-spl-os";
891 reg = <0x00140000 0x00080000>; 804 reg = <0x00140000 0x00080000>;
892 }; 805 };
893 partition@6 { 806 partition@3 {
894 label = "QSPI.u-boot-env"; 807 label = "QSPI.u-boot-env";
895 reg = <0x001c0000 0x00010000>; 808 reg = <0x001c0000 0x00010000>;
896 }; 809 };
897 partition@7 { 810 partition@4 {
898 label = "QSPI.u-boot-env.backup1"; 811 label = "QSPI.u-boot-env.backup1";
899 reg = <0x001d0000 0x0010000>; 812 reg = <0x001d0000 0x0010000>;
900 }; 813 };
901 partition@8 { 814 partition@5 {
902 label = "QSPI.kernel"; 815 label = "QSPI.kernel";
903 reg = <0x001e0000 0x0800000>; 816 reg = <0x001e0000 0x0800000>;
904 }; 817 };
905 partition@9 { 818 partition@6 {
906 label = "QSPI.file-system"; 819 label = "QSPI.file-system";
907 reg = <0x009e0000 0x01620000>; 820 reg = <0x009e0000 0x01620000>;
908 }; 821 };
@@ -919,14 +832,10 @@
919 832
920&usb1 { 833&usb1 {
921 dr_mode = "peripheral"; 834 dr_mode = "peripheral";
922 pinctrl-names = "default";
923 pinctrl-0 = <&usb1_pins>;
924}; 835};
925 836
926&usb2 { 837&usb2 {
927 dr_mode = "host"; 838 dr_mode = "host";
928 pinctrl-names = "default";
929 pinctrl-0 = <&usb2_pins>;
930}; 839};
931 840
932&elm { 841&elm {
@@ -935,8 +844,6 @@
935 844
936&gpmc { 845&gpmc {
937 status = "okay"; 846 status = "okay";
938 pinctrl-names = "default";
939 pinctrl-0 = <&nand_flash_x16>;
940 ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */ 847 ranges = <0 0 0 0x01000000>; /* minimum GPMC partition = 16MB */
941 nand@0,0 { 848 nand@0,0 {
942 reg = <0 0 4>; /* device IO registers */ 849 reg = <0 0 4>; /* device IO registers */
@@ -1028,9 +935,6 @@
1028 935
1029&mac { 936&mac {
1030 status = "okay"; 937 status = "okay";
1031 pinctrl-names = "default", "sleep";
1032 pinctrl-0 = <&cpsw_default>;
1033 pinctrl-1 = <&cpsw_sleep>;
1034 dual_emac; 938 dual_emac;
1035}; 939};
1036 940
@@ -1046,12 +950,6 @@
1046 dual_emac_res_vlan = <2>; 950 dual_emac_res_vlan = <2>;
1047}; 951};
1048 952
1049&davinci_mdio {
1050 pinctrl-names = "default", "sleep";
1051 pinctrl-0 = <&davinci_mdio_default>;
1052 pinctrl-1 = <&davinci_mdio_sleep>;
1053};
1054
1055&dcan1 { 953&dcan1 {
1056 status = "ok"; 954 status = "ok";
1057 pinctrl-names = "default", "sleep", "active"; 955 pinctrl-names = "default", "sleep", "active";