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authorJean-Jacques Hiblot2017-06-15 09:00:02 -0500
committerJean-Jacques Hiblot2017-08-25 08:09:25 -0500
commit9266bcd14ea2280b17a567c7885c2583908e051a (patch)
tree1e1efff160e71dbfa7a15377292bbdeaad9c1157
parentcb3e5f98c4d64de83fcf06de03a2eb082f064bcc (diff)
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arm: omap: enable high speed mode support in SPL for the eMMC on DRA76x
commit 8fbc46c73738 ("arm: omap: enable high speed mode support in SPL for the eMMC on DRA76x") branch ti-u-boot-2017.01 Supporting DDR52 and HS200 modes requires that the pinmux and iodelays are properly programmed with platform specific values. This commit provides the same information as the dts does but in a manner that's usable by the SPL. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--board/ti/dra7xx/evm.c10
-rw-r--r--board/ti/dra7xx/mux_data.h29
2 files changed, 39 insertions, 0 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 1b10126330..9c1f53190a 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -884,6 +884,14 @@ static struct pinctrl_desc pinctrl_descs_hsmmc2_dra72x[] = {
884 {NULL} 884 {NULL}
885}; 885};
886 886
887static struct pinctrl_desc pinctrl_descs_hsmmc2_dra76x[] = {
888 {"default", &hsmmc2_default_hs},
889 {"hs", &hsmmc2_default_hs},
890 {"ddr_1_8v", &hsmmc2_default_hs},
891 {"hs200_1_8v", &hsmmc2_hs200_1v8_dra76},
892 {NULL}
893};
894
887struct omap_hsmmc_pinctrl_state *platform_fixup_get_pinctrl_by_mode 895struct omap_hsmmc_pinctrl_state *platform_fixup_get_pinctrl_by_mode
888 (struct hsmmc *base, const char *mode) 896 (struct hsmmc *base, const char *mode)
889{ 897{
@@ -899,6 +907,8 @@ struct omap_hsmmc_pinctrl_state *platform_fixup_get_pinctrl_by_mode
899 p = pinctrl_descs_hsmmc2_rev11; 907 p = pinctrl_descs_hsmmc2_rev11;
900 else if (is_dra72x()) 908 else if (is_dra72x())
901 p = pinctrl_descs_hsmmc2_dra72x; 909 p = pinctrl_descs_hsmmc2_dra72x;
910 else if (is_dra76x())
911 p = pinctrl_descs_hsmmc2_dra76x;
902 else if (is_dra7xx()) 912 else if (is_dra7xx())
903 p = pinctrl_descs_hsmmc2_rev20; 913 p = pinctrl_descs_hsmmc2_rev20;
904 break; 914 break;
diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h
index 8612c52787..7ea4504bed 100644
--- a/board/ti/dra7xx/mux_data.h
+++ b/board/ti/dra7xx/mux_data.h
@@ -1324,6 +1324,28 @@ static struct iodelay_cfg_entry mmc2_iodelay_hs200_1_8v_dra72_conf[] = {
1324 {0x364, 1039 , 0 /* CFG_GPMC_CS1_OEN */}, 1324 {0x364, 1039 , 0 /* CFG_GPMC_CS1_OEN */},
1325}; 1325};
1326 1326
1327static struct iodelay_cfg_entry mmc2_iodelay_hs200_1_8v_dra76_conf[] = {
1328 {0x190, 384 , 0 /* CFG_GPMC_A19_OEN */},
1329 {0x194, 0 , 174 /* CFG_GPMC_A19_OUT */},
1330 {0x1A8, 410 , 0 /* CFG_GPMC_A20_OEN */},
1331 {0x1AC, 85 , 0 /* CFG_GPMC_A20_OUT */},
1332 {0x1B4, 468 , 0 /* CFG_GPMC_A21_OEN */},
1333 {0x1B8, 139 , 0 /* CFG_GPMC_A21_OUT */},
1334 {0x1C0, 676 , 0 /* CFG_GPMC_A22_OEN */},
1335 {0x1C4, 69 , 0 /* CFG_GPMC_A22_OUT */},
1336 {0x1D0, 1062, 154 /* CFG_GPMC_A23_OUT */},
1337 {0x1D8, 640 , 0 /* CFG_GPMC_A24_OEN */},
1338 {0x1DC, 0 , 0 /* CFG_GPMC_A24_OUT */},
1339 {0x1E4, 356 , 0 /* CFG_GPMC_A25_OEN */},
1340 {0x1E8, 0 , 0 /* CFG_GPMC_A25_OUT */},
1341 {0x1F0, 579 , 0 /* CFG_GPMC_A26_OEN */},
1342 {0x1F4, 0 , 0 /* CFG_GPMC_A26_OUT */},
1343 {0x1FC, 435 , 0 /* CFG_GPMC_A27_OEN */},
1344 {0x200, 36 , 0 /* CFG_GPMC_A27_OUT */},
1345 {0x364, 759 , 0 /* CFG_GPMC_CS1_OEN */},
1346 {0x368, 72 , 0 /* CFG_GPMC_CS1_OUT */},
1347};
1348
1327#define dimof(t) (sizeof(t) / sizeof(t[0])) 1349#define dimof(t) (sizeof(t) / sizeof(t[0]))
1328static struct omap_hsmmc_pinctrl_state hsmmc1_default = { 1350static struct omap_hsmmc_pinctrl_state hsmmc1_default = {
1329 .padconf = hsmmc1_default_padconf, 1351 .padconf = hsmmc1_default_padconf,
@@ -1381,6 +1403,13 @@ static struct omap_hsmmc_pinctrl_state hsmmc2_hs200_1v8_dra72 = {
1381 .iodelay = mmc2_iodelay_hs200_1_8v_dra72_conf, 1403 .iodelay = mmc2_iodelay_hs200_1_8v_dra72_conf,
1382 .niodelays = dimof(mmc2_iodelay_hs200_1_8v_dra72_conf), 1404 .niodelays = dimof(mmc2_iodelay_hs200_1_8v_dra72_conf),
1383}; 1405};
1406
1407static struct omap_hsmmc_pinctrl_state hsmmc2_hs200_1v8_dra76 = {
1408 .padconf = mmc2_pins_ddr_hs200_1_8v,
1409 .npads = dimof(mmc2_pins_ddr_hs200_1_8v),
1410 .iodelay = mmc2_iodelay_hs200_1_8v_dra76_conf,
1411 .niodelays = dimof(mmc2_iodelay_hs200_1_8v_dra76_conf),
1412};
1384#endif 1413#endif
1385 1414
1386#endif /* _MUX_DATA_DRA7XX_H_ */ 1415#endif /* _MUX_DATA_DRA7XX_H_ */