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authorSuman Anna2017-04-18 01:36:43 -0500
committerVishal Mahaveer2017-04-26 22:27:05 -0500
commit9816d9eddab35f901db3784e35b499e6ad2d2c36 (patch)
tree6ffcd4addfc34607eea08b32dbb14acb203bb44f
parent5add3416563848784ebee445dbeb61de440010f4 (diff)
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board: ti: dra71-evm: Update vcores_data for OPP_HIGH on DSPEVE & IVA
The DRA71x SoCs initially supported only OPP_NOM for all voltage domains. Commit 052ec124be4c ("board: dra71: Fix selection of OPPs") has enabled the selection of OPP_HIGH for the DSPEVE and IVA voltage domains based on the updated Data Manual, but has failed to add the corresponding values in the dra718_volts vcores_data structure required for a proper AVS/ABB setup. Add these values to make sure ABB setup can be done properly. Fixes: 052ec124be4c ("board: dra71: Fix selection of OPPs") Signed-off-by: Suman Anna <s-anna@ti.com> [Extended the patch to LCARD board] Signed-off-by: Vishal Mahaveer <vishalm@ti.com> Change-Id: Ie12f56a396ba38de75f76f17a138198ff8b40494
-rw-r--r--board/ti/dra7xx/evm.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index aac2ec8a18..5666a38fdd 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -439,14 +439,18 @@ struct vcores_data dra718_volts = {
439 * and are powered by BUCK1 of LP873X PMIC 439 * and are powered by BUCK1 of LP873X PMIC
440 */ 440 */
441 .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, 441 .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
442 .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
442 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, 443 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
444 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
443 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, 445 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
444 .eve.addr = LP873X_REG_ADDR_BUCK1, 446 .eve.addr = LP873X_REG_ADDR_BUCK1,
445 .eve.pmic = &lp8733, 447 .eve.pmic = &lp8733,
446 .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, 448 .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
447 449
448 .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, 450 .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
451 .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
449 .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, 452 .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
453 .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
450 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, 454 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
451 .iva.addr = LP873X_REG_ADDR_BUCK1, 455 .iva.addr = LP873X_REG_ADDR_BUCK1,
452 .iva.pmic = &lp8733, 456 .iva.pmic = &lp8733,
@@ -483,14 +487,18 @@ struct vcores_data dra718_lcard_volts = {
483 * and are powered by SMPS3 487 * and are powered by SMPS3
484 */ 488 */
485 .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM, 489 .eve.value[OPP_NOM] = VDD_EVE_DRA7_NOM,
490 .eve.value[OPP_HIGH] = VDD_EVE_DRA7_HIGH,
486 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM, 491 .eve.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_DSPEVE_NOM,
492 .eve.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_DSPEVE_HIGH,
487 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS, 493 .eve.efuse.reg_bits = DRA752_EFUSE_REGBITS,
488 .eve.addr = TPS65917_REG_ADDR_SMPS3, 494 .eve.addr = TPS65917_REG_ADDR_SMPS3,
489 .eve.pmic = &tps659038, 495 .eve.pmic = &tps659038,
490 .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK, 496 .eve.abb_tx_done_mask = OMAP_ABB_EVE_TXDONE_MASK,
491 497
492 .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM, 498 .iva.value[OPP_NOM] = VDD_IVA_DRA7_NOM,
499 .iva.value[OPP_HIGH] = VDD_IVA_DRA7_HIGH,
493 .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM, 500 .iva.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_IVA_NOM,
501 .iva.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_IVA_HIGH,
494 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS, 502 .iva.efuse.reg_bits = DRA752_EFUSE_REGBITS,
495 .iva.addr = TPS65917_REG_ADDR_SMPS3, 503 .iva.addr = TPS65917_REG_ADDR_SMPS3,
496 .iva.pmic = &tps659038, 504 .iva.pmic = &tps659038,