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authorLokesh Vutla2017-09-22 05:49:31 -0500
committerJean-Jacques Hiblot2017-10-04 08:52:58 -0500
commitb8ed28f9d8d3dfb0b73466b3d8b3d1a92447d87d (patch)
treeb30dca072994300c8cda495b7b64366d52d810b9
parent7e7c98489f2babcf2b4d86e3a7a1cf3cbfe1b275 (diff)
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board: ti: dra7xx: Fix iodelay execution sequence
commit 2f2928878591 ("board: ti: dra7xx: Fix iodelay execution sequence") branch ti-u-boot-2017.01 commit c3ca2d1a40877 ("board: ti: dra7xx: Select MCAN instead of DCAN on DRA76 EVM") selects MCAN pinmux. As part of this commit, iodelay_start() sequence is moved before pads selection. Once this start sequence is called, SoC will be in isolated state. On DRA71 EVM NAND pins are selected based on an i2c read, which will fail as SoC is in isolation. Also subsequent i2c reads/writes on the same bus are timedout(failing avs programming). Fix it by calling the iodelay_start() sequence just before configuring pinmux. Acked-by: Nishanth Menon <nm@ti.com> Tested-by: Tero Kristo <t-kristo@ti.com> Reviewed-by: Franklin S Cooper Jr. <fcooper@ti.com> Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com> Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--board/ti/dra7xx/evm.c18
1 files changed, 10 insertions, 8 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 53c9fc89e6..aa5e13dea0 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -751,11 +751,6 @@ void recalibrate_iodelay(void)
751 int npads, niodelays, delta_npads = 0; 751 int npads, niodelays, delta_npads = 0;
752 int ret; 752 int ret;
753 753
754 /* Setup I/O isolation */
755 ret = __recalibrate_iodelay_start();
756 if (ret)
757 goto err;
758
759 switch (omap_revision()) { 754 switch (omap_revision()) {
760 case DRA722_ES1_0: 755 case DRA722_ES1_0:
761 case DRA722_ES2_0: 756 case DRA722_ES2_0:
@@ -793,9 +788,6 @@ void recalibrate_iodelay(void)
793 npads = ARRAY_SIZE(dra76x_core_padconf_array); 788 npads = ARRAY_SIZE(dra76x_core_padconf_array);
794 iodelay = dra76x_es1_0_iodelay_cfg_array; 789 iodelay = dra76x_es1_0_iodelay_cfg_array;
795 niodelays = ARRAY_SIZE(dra76x_es1_0_iodelay_cfg_array); 790 niodelays = ARRAY_SIZE(dra76x_es1_0_iodelay_cfg_array);
796 /* Set mux for MCAN instead of DCAN1 */
797 clrsetbits_le32((*ctrl)->control_core_control_spare_rw,
798 MCAN_SEL_ALT_MASK, MCAN_SEL);
799 break; 791 break;
800 default: 792 default:
801 case DRA752_ES2_0: 793 case DRA752_ES2_0:
@@ -809,6 +801,11 @@ void recalibrate_iodelay(void)
809 break; 801 break;
810 } 802 }
811 803
804 /* Setup I/O isolation */
805 ret = __recalibrate_iodelay_start();
806 if (ret)
807 goto err;
808
812 /* Do the muxing here */ 809 /* Do the muxing here */
813 do_set_mux32((*ctrl)->control_padconf_core_base, pads, npads); 810 do_set_mux32((*ctrl)->control_padconf_core_base, pads, npads);
814 811
@@ -817,6 +814,11 @@ void recalibrate_iodelay(void)
817 do_set_mux32((*ctrl)->control_padconf_core_base, 814 do_set_mux32((*ctrl)->control_padconf_core_base,
818 delta_pads, delta_npads); 815 delta_pads, delta_npads);
819 816
817 if (is_dra76x())
818 /* Set mux for MCAN instead of DCAN1 */
819 clrsetbits_le32((*ctrl)->control_core_control_spare_rw,
820 MCAN_SEL_ALT_MASK, MCAN_SEL);
821
820 /* Setup IOdelay configuration */ 822 /* Setup IOdelay configuration */
821 ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays); 823 ret = do_set_iodelay((*ctrl)->iodelay_config_base, iodelay, niodelays);
822err: 824err: