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authorJean-Jacques Hiblot2017-08-24 09:08:36 -0500
committerJean-Jacques Hiblot2017-08-25 08:09:24 -0500
commitecd2699e51a4522738791e1cfdb2622e2a7e7991 (patch)
treeaaa2e7705c0cdf2d0261087fbed359f9e086b9ca
parent3fe44a0ed93c99d22a3f5119d9ec83c314887e7b (diff)
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ARM: dts: dra76x: create a common file with MMC/SD IOdelay data
commit 0651917fe691 ("ARM: dts: dra76x: create a common file with MMC/SD IOdelay data") branch ti-u-boot-2017.01 Add a common device-tree include file with MMC/SD IOdelay data for DRA76x SoC based on the linux DTSI file. In the most common case, IOdelay data available in datamanual can directly be used. This file caters to that common case. Data is based on DRA76x datamanual, SPRS993A, revised July 2017. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com>
-rw-r--r--arch/arm/dts/dra76x-mmc-iodelay.dtsi244
1 files changed, 244 insertions, 0 deletions
diff --git a/arch/arm/dts/dra76x-mmc-iodelay.dtsi b/arch/arm/dts/dra76x-mmc-iodelay.dtsi
new file mode 100644
index 0000000000..ff578843eb
--- /dev/null
+++ b/arch/arm/dts/dra76x-mmc-iodelay.dtsi
@@ -0,0 +1,244 @@
1/*
2 * MMC IOdelay values for TI's DRA76x and AM576x SoCs.
3 *
4 * Copyright (C) 2017 Texas Instruments Incorporated - http://www.ti.com/
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2.
9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 */
15
16/*
17 * Rules for modifying this file:
18 * a) Update of this file should typically correspond to a datamanual revision.
19 * Datamanual revision that was used should be updated in comment below.
20 * If there is no update to datamanual, do not update the values. If you
21 * need to use values different from that recommended by the datamanual
22 * for your design, then you should consider adding values to the device-
23 * -tree file for your board directly.
24 * b) We keep the mode names as close to the datamanual as possible. So
25 * if the manual calls a mode, DDR50, or DDR or DDR 1.8v or DDR 3.3v,
26 * we follow that in code too.
27 * c) If the values change between multiple revisions of silicon, we add
28 * a revision tag to both the new and old entry. Use 'rev11' for PG 1.1,
29 * 'rev20' for PG 2.0 and so on.
30 * d) The node name and node label should be the exact same string. This is
31 * to curb naming creativity and achieve consistency.
32 *
33 * Datamanual Revisions:
34 *
35 * DRA76x Silicon Revision 1.0: SPRS993A, Revised July 2017
36 *
37 */
38
39&dra7_pmx_core {
40 mmc1_pins_default: mmc1_pins_default {
41 pinctrl-single,pins = <
42 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
43 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
44 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
45 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
46 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
47 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
48 >;
49 };
50
51 mmc1_pins_sdr12: mmc1_pins_sdr12 {
52 pinctrl-single,pins = <
53 0x354 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_clk.clk */
54 0x358 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
55 0x35c (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
56 0x360 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
57 0x364 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
58 0x368 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
59 >;
60 };
61
62 mmc1_pins_hs: mmc1_pins_hs {
63 pinctrl-single,pins = <
64 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
65 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
66 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
67 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
68 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
69 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
70 >;
71 };
72
73 mmc1_pins_sdr25: mmc1_pins_sdr25 {
74 pinctrl-single,pins = <
75 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_clk.clk */
76 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_cmd.cmd */
77 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat0.dat0 */
78 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat1.dat1 */
79 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat2.dat2 */
80 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE11 | MUX_MODE0) /* mmc1_dat3.dat3 */
81 >;
82 };
83
84 mmc1_pins_sdr50: mmc1_pins_sdr50 {
85 pinctrl-single,pins = <
86 0x354 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_clk.clk */
87 0x358 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_cmd.cmd */
88 0x35c (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat0.dat0 */
89 0x360 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat1.dat1 */
90 0x364 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat2.dat2 */
91 0x368 (PIN_INPUT_PULLUP | MUX_VIRTUAL_MODE10 | MUX_MODE0) /* mmc1_dat3.dat3 */
92 >;
93 };
94
95 mmc1_pins_ddr50: mmc1_pins_ddr50 {
96 pinctrl-single,pins = <
97 0x354 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
98 0x358 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
99 0x35c (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
100 0x360 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */
101 0x364 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */
102 0x368 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */
103 >;
104 };
105
106 mmc1_pins_sdr104: mmc1_pins_sdr104 {
107 pinctrl-single,pins = <
108 0x354 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_clk.clk */
109 0x358 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_cmd.cmd */
110 0x35c (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat0.dat0 */
111 0x360 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat1.dat1 */
112 0x364 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat2.dat2 */
113 0x368 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0) /* mmc1_dat3.dat3 */
114 >;
115 };
116
117 mmc2_pins_default: mmc2_pins_default {
118 pinctrl-single,pins = <
119 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
120 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
121 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
122 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
123 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
124 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
125 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
126 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
127 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
128 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
129 >;
130 };
131
132 mmc2_pins_hs: mmc2_pins_hs {
133 pinctrl-single,pins = <
134 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
135 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
136 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
137 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
138 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
139 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
140 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
141 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
142 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
143 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
144 >;
145 };
146
147 mmc2_pins_ddr: mmc2_pins_ddr {
148 pinctrl-single,pins = <
149 0x9c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a23.mmc2_clk */
150 0xb0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
151 0xa0 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
152 0xa4 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
153 0xa8 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
154 0xac (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
155 0x8c (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
156 0x90 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
157 0x94 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
158 0x98 (PIN_INPUT_PULLUP | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
159 >;
160 };
161
162 mmc2_pins_hs200: mmc2_pins_hs200 {
163 pinctrl-single,pins = <
164 0x9c (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a23.mmc2_clk */
165 0xb0 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_cs1.mmc2_cmd */
166 0xa0 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a24.mmc2_dat0 */
167 0xa4 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a25.mmc2_dat1 */
168 0xa8 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a26.mmc2_dat2 */
169 0xac (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a27.mmc2_dat3 */
170 0x8c (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a19.mmc2_dat4 */
171 0x90 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a20.mmc2_dat5 */
172 0x94 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a21.mmc2_dat6 */
173 0x98 (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE1) /* gpmc_a22.mmc2_dat7 */
174 >;
175 };
176};
177
178&dra7_iodelay_core {
179
180 /* Corresponds to MMC1_DDR_MANUAL1 in datamanual */
181 mmc1_iodelay_ddr_conf: mmc1_iodelay_ddr_conf {
182 pinctrl-single,pins = <
183 0x618 (A_DELAY(489) | G_DELAY(0)) /* CFG_MMC1_CLK_IN */
184 0x624 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_IN */
185 0x630 (A_DELAY(374) | G_DELAY(0)) /* CFG_MMC1_DAT0_IN */
186 0x63c (A_DELAY(31) | G_DELAY(0)) /* CFG_MMC1_DAT1_IN */
187 0x648 (A_DELAY(56) | G_DELAY(0)) /* CFG_MMC1_DAT2_IN */
188 0x654 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_IN */
189 0x620 (A_DELAY(1355) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
190 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
191 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
192 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
193 0x638 (A_DELAY(0) | G_DELAY(4)) /* CFG_MMC1_DAT0_OUT */
194 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
195 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
196 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
197 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
198 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
199 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
200 >;
201 };
202
203 /* Corresponds to MMC1_SDR104_MANUAL1 in datamanual */
204 mmc1_iodelay_sdr104_conf: mmc1_iodelay_sdr104_conf {
205 pinctrl-single,pins = <
206 0x620 (A_DELAY(892) | G_DELAY(0)) /* CFG_MMC1_CLK_OUT */
207 0x628 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OEN */
208 0x62c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_CMD_OUT */
209 0x634 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OEN */
210 0x638 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT0_OUT */
211 0x640 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OEN */
212 0x644 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT1_OUT */
213 0x64c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OEN */
214 0x650 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT2_OUT */
215 0x658 (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OEN */
216 0x65c (A_DELAY(0) | G_DELAY(0)) /* CFG_MMC1_DAT3_OUT */
217 >;
218 };
219
220 /* Corresponds to MMC2_HS200_MANUAL1 in datamanual */
221 mmc2_iodelay_hs200_conf: mmc2_iodelay_hs200_conf {
222 pinctrl-single,pins = <
223 0x190 (A_DELAY(384) | G_DELAY(0)) /* CFG_GPMC_A19_OEN */
224 0x194 (A_DELAY(0) | G_DELAY(174)) /* CFG_GPMC_A19_OUT */
225 0x1a8 (A_DELAY(410) | G_DELAY(0)) /* CFG_GPMC_A20_OEN */
226 0x1ac (A_DELAY(85) | G_DELAY(0)) /* CFG_GPMC_A20_OUT */
227 0x1b4 (A_DELAY(468) | G_DELAY(0)) /* CFG_GPMC_A21_OEN */
228 0x1b8 (A_DELAY(139) | G_DELAY(0)) /* CFG_GPMC_A21_OUT */
229 0x1c0 (A_DELAY(676) | G_DELAY(0)) /* CFG_GPMC_A22_OEN */
230 0x1c4 (A_DELAY(69) | G_DELAY(0)) /* CFG_GPMC_A22_OUT */
231 0x1d0 (A_DELAY(1062) | G_DELAY(154)) /* CFG_GPMC_A23_OUT */
232 0x1d8 (A_DELAY(640) | G_DELAY(0)) /* CFG_GPMC_A24_OEN */
233 0x1dc (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A24_OUT */
234 0x1e4 (A_DELAY(356) | G_DELAY(0)) /* CFG_GPMC_A25_OEN */
235 0x1e8 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A25_OUT */
236 0x1f0 (A_DELAY(579) | G_DELAY(0)) /* CFG_GPMC_A26_OEN */
237 0x1f4 (A_DELAY(0) | G_DELAY(0)) /* CFG_GPMC_A26_OUT */
238 0x1fc (A_DELAY(435) | G_DELAY(0)) /* CFG_GPMC_A27_OEN */
239 0x200 (A_DELAY(36) | G_DELAY(0)) /* CFG_GPMC_A27_OUT */
240 0x364 (A_DELAY(759) | G_DELAY(0)) /* CFG_GPMC_CS1_OEN */
241 0x368 (A_DELAY(72) | G_DELAY(0)) /* CFG_GPMC_CS1_OUT */
242 >;
243 };
244};