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authorLubomir Popov2013-04-08 16:49:37 -0500
committerTom Rini2013-05-10 07:25:55 -0500
commit3935277dbf4614215cc2510121ca837c8d321cc9 (patch)
tree77aad6a58fc68716f6925293fa5560e1df1419d3
parentda2cc4545b7dfcff32eb2bb7feab43e1be9792f6 (diff)
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OMAP5: I2C: Enable i2c5 clocks
I2C4 and I2C5 are utilized on all known OMAP5 hardware platforms. The i2c5 clock was however not enabled; do this here. Signed-off-by: Lubomir Popov <lpopov@mm-sol.com>
-rw-r--r--arch/arm/cpu/armv7/omap5/hw_data.c1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c
index ced274e4db..3a9352f215 100644
--- a/arch/arm/cpu/armv7/omap5/hw_data.c
+++ b/arch/arm/cpu/armv7/omap5/hw_data.c
@@ -411,6 +411,7 @@ void enable_basic_uboot_clocks(void)
411 (*prcm)->cm_l4per_i2c2_clkctrl, 411 (*prcm)->cm_l4per_i2c2_clkctrl,
412 (*prcm)->cm_l4per_i2c3_clkctrl, 412 (*prcm)->cm_l4per_i2c3_clkctrl,
413 (*prcm)->cm_l4per_i2c4_clkctrl, 413 (*prcm)->cm_l4per_i2c4_clkctrl,
414 (*prcm)->cm_l4per_i2c5_clkctrl,
414 (*prcm)->cm_l3init_hsusbtll_clkctrl, 415 (*prcm)->cm_l3init_hsusbtll_clkctrl,
415 (*prcm)->cm_l3init_hsusbhost_clkctrl, 416 (*prcm)->cm_l3init_hsusbhost_clkctrl,
416 (*prcm)->cm_l3init_fsusb_clkctrl, 417 (*prcm)->cm_l3init_fsusb_clkctrl,