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authorLokesh Vutla2013-05-22 00:55:34 -0500
committerLokesh Vutla2013-05-29 04:33:56 -0500
commit66dfe8541f53b3c2e2f13154a9a112ccf587087b (patch)
tree1036eabbe162bdf4a5b486986f8793afadfb1cad
parent47c6ea076eb51e624f8744d93db5cd70b97dc25d (diff)
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ARM: OMAP4+: Cleanup header files
After having the u-boot clean up series, there are many definitions that are unused in header files. Removing all those unused ones. Signed-off-by: Lokesh Vutla <lokeshvutla@ti.com>
-rw-r--r--arch/arm/cpu/armv7/omap4/prcm-regs.c3
-rw-r--r--arch/arm/cpu/armv7/omap5/prcm-regs.c2
-rw-r--r--arch/arm/include/asm/arch-omap4/clocks.h28
-rw-r--r--arch/arm/include/asm/arch-omap4/cpu.h12
-rw-r--r--arch/arm/include/asm/arch-omap4/omap.h14
-rw-r--r--arch/arm/include/asm/arch-omap5/clocks.h22
-rw-r--r--arch/arm/include/asm/arch-omap5/cpu.h12
-rw-r--r--arch/arm/include/asm/arch-omap5/omap.h31
-rw-r--r--arch/arm/include/asm/omap_common.h4
-rw-r--r--board/ti/omap5_uevm/evm.c12
-rw-r--r--board/ti/panda/panda.c20
-rw-r--r--board/ti/sdp4430/sdp.c16
-rw-r--r--drivers/usb/musb/omap3.c4
13 files changed, 40 insertions, 140 deletions
diff --git a/arch/arm/cpu/armv7/omap4/prcm-regs.c b/arch/arm/cpu/armv7/omap4/prcm-regs.c
index 7225a301b1..7e71ca0a26 100644
--- a/arch/arm/cpu/armv7/omap4/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap4/prcm-regs.c
@@ -301,6 +301,8 @@ struct omap_sys_ctrl_regs const omap4_ctrl = {
301 .control_ldosram_iva_voltage_ctrl = 0x4A002320, 301 .control_ldosram_iva_voltage_ctrl = 0x4A002320,
302 .control_ldosram_mpu_voltage_ctrl = 0x4A002324, 302 .control_ldosram_mpu_voltage_ctrl = 0x4A002324,
303 .control_ldosram_core_voltage_ctrl = 0x4A002328, 303 .control_ldosram_core_voltage_ctrl = 0x4A002328,
304 .control_usbotghs_ctrl = 0x4A00233C,
305 .control_padconf_core_base = 0x4A100000,
304 .control_pbiaslite = 0x4A100600, 306 .control_pbiaslite = 0x4A100600,
305 .control_lpddr2io1_0 = 0x4A100638, 307 .control_lpddr2io1_0 = 0x4A100638,
306 .control_lpddr2io1_1 = 0x4A10063C, 308 .control_lpddr2io1_1 = 0x4A10063C,
@@ -312,4 +314,5 @@ struct omap_sys_ctrl_regs const omap4_ctrl = {
312 .control_lpddr2io2_3 = 0x4A100654, 314 .control_lpddr2io2_3 = 0x4A100654,
313 .control_efuse_1 = 0x4A100700, 315 .control_efuse_1 = 0x4A100700,
314 .control_efuse_2 = 0x4A100704, 316 .control_efuse_2 = 0x4A100704,
317 .control_padconf_wkup_base = 0x4A31E000,
315}; 318};
diff --git a/arch/arm/cpu/armv7/omap5/prcm-regs.c b/arch/arm/cpu/armv7/omap5/prcm-regs.c
index e9f6a32653..db779f2d62 100644
--- a/arch/arm/cpu/armv7/omap5/prcm-regs.c
+++ b/arch/arm/cpu/armv7/omap5/prcm-regs.c
@@ -311,6 +311,7 @@ struct prcm_regs const omap5_es1_prcm = {
311 311
312struct omap_sys_ctrl_regs const omap5_ctrl = { 312struct omap_sys_ctrl_regs const omap5_ctrl = {
313 .control_status = 0x4A002134, 313 .control_status = 0x4A002134,
314 .control_padconf_core_base = 0x4A002800,
314 .control_paconf_global = 0x4A002DA0, 315 .control_paconf_global = 0x4A002DA0,
315 .control_paconf_mode = 0x4A002DA4, 316 .control_paconf_mode = 0x4A002DA4,
316 .control_smart1io_padconf_0 = 0x4A002DA8, 317 .control_smart1io_padconf_0 = 0x4A002DA8,
@@ -358,6 +359,7 @@ struct omap_sys_ctrl_regs const omap5_ctrl = {
358 .control_port_emif2_sdram_config = 0x4AE0C118, 359 .control_port_emif2_sdram_config = 0x4AE0C118,
359 .control_emif1_sdram_config_ext = 0x4AE0C144, 360 .control_emif1_sdram_config_ext = 0x4AE0C144,
360 .control_emif2_sdram_config_ext = 0x4AE0C148, 361 .control_emif2_sdram_config_ext = 0x4AE0C148,
362 .control_padconf_wkup_base = 0x4AE0C800,
361 .control_smart1nopmio_padconf_0 = 0x4AE0CDA0, 363 .control_smart1nopmio_padconf_0 = 0x4AE0CDA0,
362 .control_smart1nopmio_padconf_1 = 0x4AE0CDA4, 364 .control_smart1nopmio_padconf_1 = 0x4AE0CDA4,
363 .control_padconf_mode = 0x4AE0CDA8, 365 .control_padconf_mode = 0x4AE0CDA8,
diff --git a/arch/arm/include/asm/arch-omap4/clocks.h b/arch/arm/include/asm/arch-omap4/clocks.h
index ed7a1c8be7..f544edfbd0 100644
--- a/arch/arm/include/asm/arch-omap4/clocks.h
+++ b/arch/arm/include/asm/arch-omap4/clocks.h
@@ -34,25 +34,6 @@
34 */ 34 */
35#define LDELAY 1000000 35#define LDELAY 1000000
36 36
37#define CM_CLKMODE_DPLL_CORE 0x4A004120
38#define CM_CLKMODE_DPLL_PER 0x4A008140
39#define CM_CLKMODE_DPLL_MPU 0x4A004160
40#define CM_CLKSEL_CORE 0x4A004100
41
42/* DPLL register offsets */
43#define CM_CLKMODE_DPLL 0
44#define CM_IDLEST_DPLL 0x4
45#define CM_AUTOIDLE_DPLL 0x8
46#define CM_CLKSEL_DPLL 0xC
47#define CM_DIV_M2_DPLL 0x10
48#define CM_DIV_M3_DPLL 0x14
49#define CM_DIV_M4_DPLL 0x18
50#define CM_DIV_M5_DPLL 0x1C
51#define CM_DIV_M6_DPLL 0x20
52#define CM_DIV_M7_DPLL 0x24
53
54#define DPLL_CLKOUT_DIV_MASK 0x1F /* post-divider mask */
55
56/* CM_DLL_CTRL */ 37/* CM_DLL_CTRL */
57#define CM_DLL_CTRL_OVERRIDE_SHIFT 0 38#define CM_DLL_CTRL_OVERRIDE_SHIFT 0
58#define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0) 39#define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0)
@@ -94,8 +75,6 @@
94#define CM_CLKSEL_DCC_EN_SHIFT 22 75#define CM_CLKSEL_DCC_EN_SHIFT 22
95#define CM_CLKSEL_DCC_EN_MASK (1 << 22) 76#define CM_CLKSEL_DCC_EN_MASK (1 << 22)
96 77
97#define OMAP4_DPLL_MAX_N 127
98
99/* CM_SYS_CLKSEL */ 78/* CM_SYS_CLKSEL */
100#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7 79#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7
101 80
@@ -181,9 +160,7 @@
181#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 25) 160#define MPU_CLKCTRL_CLKSEL_ABE_DIV_MODE_MASK (1 << 25)
182 161
183/* Clock frequencies */ 162/* Clock frequencies */
184#define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000
185#define OMAP_SYS_CLK_IND_38_4_MHZ 6 163#define OMAP_SYS_CLK_IND_38_4_MHZ 6
186#define OMAP_32K_CLK_FREQ 32768
187 164
188/* PRM_VC_VAL_BYPASS */ 165/* PRM_VC_VAL_BYPASS */
189#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400 166#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400
@@ -234,11 +211,6 @@
234 211
235#define ALTCLKSRC_MODE_ACTIVE 1 212#define ALTCLKSRC_MODE_ACTIVE 1
236 213
237/* Defines for DPLL setup */
238#define DPLL_LOCKED_FREQ_TOLERANCE_0 0
239#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500
240#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000
241
242#define DPLL_NO_LOCK 0 214#define DPLL_NO_LOCK 0
243#define DPLL_LOCK 1 215#define DPLL_LOCK 1
244 216
diff --git a/arch/arm/include/asm/arch-omap4/cpu.h b/arch/arm/include/asm/arch-omap4/cpu.h
index 3a0bfbf0c6..311c6ff522 100644
--- a/arch/arm/include/asm/arch-omap4/cpu.h
+++ b/arch/arm/include/asm/arch-omap4/cpu.h
@@ -115,18 +115,6 @@ struct watchdog {
115#define WD_UNLOCK1 0xAAAA 115#define WD_UNLOCK1 0xAAAA
116#define WD_UNLOCK2 0x5555 116#define WD_UNLOCK2 0x5555
117 117
118#define SYSCLKDIV_1 (0x1 << 6)
119#define SYSCLKDIV_2 (0x1 << 7)
120
121#define CLKSEL_GPT1 (0x1 << 0)
122
123#define EN_GPT1 (0x1 << 0)
124#define EN_32KSYNC (0x1 << 2)
125
126#define ST_WDT2 (0x1 << 5)
127
128#define RESETDONE (0x1 << 0)
129
130#define TCLR_ST (0x1 << 0) 118#define TCLR_ST (0x1 << 0)
131#define TCLR_AR (0x1 << 1) 119#define TCLR_AR (0x1 << 1)
132#define TCLR_PRE (0x1 << 5) 120#define TCLR_PRE (0x1 << 5)
diff --git a/arch/arm/include/asm/arch-omap4/omap.h b/arch/arm/include/asm/arch-omap4/omap.h
index e9a6ffeb83..2cd034e48d 100644
--- a/arch/arm/include/asm/arch-omap4/omap.h
+++ b/arch/arm/include/asm/arch-omap4/omap.h
@@ -47,14 +47,6 @@
47#define DRAM_ADDR_SPACE_START OMAP44XX_DRAM_ADDR_SPACE_START 47#define DRAM_ADDR_SPACE_START OMAP44XX_DRAM_ADDR_SPACE_START
48#define DRAM_ADDR_SPACE_END OMAP44XX_DRAM_ADDR_SPACE_END 48#define DRAM_ADDR_SPACE_END OMAP44XX_DRAM_ADDR_SPACE_END
49 49
50/* CONTROL */
51#define CTRL_BASE (OMAP44XX_L4_CORE_BASE + 0x2000)
52#define CONTROL_PADCONF_CORE (OMAP44XX_L4_CORE_BASE + 0x100000)
53#define CONTROL_PADCONF_WKUP (OMAP44XX_L4_CORE_BASE + 0x31E000)
54
55/* LPDDR2 IO regs */
56#define LPDDR2_IO_REGS_BASE 0x4A100638
57
58/* CONTROL_ID_CODE */ 50/* CONTROL_ID_CODE */
59#define CONTROL_ID_CODE 0x4A002204 51#define CONTROL_ID_CODE 0x4A002204
60 52
@@ -79,15 +71,9 @@
79/* Watchdog Timer2 - MPU watchdog */ 71/* Watchdog Timer2 - MPU watchdog */
80#define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000) 72#define WDT2_BASE (OMAP44XX_L4_WKUP_BASE + 0x14000)
81 73
82/* 32KTIMER */
83#define SYNC_32KTIMER_BASE (OMAP44XX_L4_WKUP_BASE + 0x4000)
84
85/* GPMC */ 74/* GPMC */
86#define OMAP44XX_GPMC_BASE 0x50000000 75#define OMAP44XX_GPMC_BASE 0x50000000
87 76
88/* SYSTEM CONTROL MODULE */
89#define SYSCTRL_GENERAL_CORE_BASE 0x4A002000
90
91/* 77/*
92 * Hardware Register Details 78 * Hardware Register Details
93 */ 79 */
diff --git a/arch/arm/include/asm/arch-omap5/clocks.h b/arch/arm/include/asm/arch-omap5/clocks.h
index 68afa76696..6673a025f5 100644
--- a/arch/arm/include/asm/arch-omap5/clocks.h
+++ b/arch/arm/include/asm/arch-omap5/clocks.h
@@ -35,19 +35,6 @@
35 */ 35 */
36#define LDELAY 1000000 36#define LDELAY 1000000
37 37
38#define CM_CLKMODE_DPLL_CORE (OMAP54XX_L4_CORE_BASE + 0x4120)
39#define CM_CLKMODE_DPLL_PER (OMAP54XX_L4_CORE_BASE + 0x8140)
40#define CM_CLKMODE_DPLL_MPU (OMAP54XX_L4_CORE_BASE + 0x4160)
41#define CM_CLKSEL_CORE (OMAP54XX_L4_CORE_BASE + 0x4100)
42
43/* DPLL register offsets */
44#define CM_CLKMODE_DPLL 0
45#define CM_IDLEST_DPLL 0x4
46#define CM_AUTOIDLE_DPLL 0x8
47#define CM_CLKSEL_DPLL 0xC
48
49#define DPLL_CLKOUT_DIV_MASK 0x1F /* post-divider mask */
50
51/* CM_DLL_CTRL */ 38/* CM_DLL_CTRL */
52#define CM_DLL_CTRL_OVERRIDE_SHIFT 0 39#define CM_DLL_CTRL_OVERRIDE_SHIFT 0
53#define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0) 40#define CM_DLL_CTRL_OVERRIDE_MASK (1 << 0)
@@ -93,8 +80,6 @@
93#define CM_CLKSEL_DCC_EN_SHIFT 22 80#define CM_CLKSEL_DCC_EN_SHIFT 22
94#define CM_CLKSEL_DCC_EN_MASK (1 << 22) 81#define CM_CLKSEL_DCC_EN_MASK (1 << 22)
95 82
96#define OMAP4_DPLL_MAX_N 127
97
98/* CM_SYS_CLKSEL */ 83/* CM_SYS_CLKSEL */
99#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7 84#define CM_SYS_CLKSEL_SYS_CLKSEL_MASK 7
100 85
@@ -195,9 +180,7 @@
195#define RSTTIME1_MASK (0x3ff << 0) 180#define RSTTIME1_MASK (0x3ff << 0)
196 181
197/* Clock frequencies */ 182/* Clock frequencies */
198#define OMAP_SYS_CLK_FREQ_38_4_MHZ 38400000
199#define OMAP_SYS_CLK_IND_38_4_MHZ 6 183#define OMAP_SYS_CLK_IND_38_4_MHZ 6
200#define OMAP_32K_CLK_FREQ 32768
201 184
202/* PRM_VC_VAL_BYPASS */ 185/* PRM_VC_VAL_BYPASS */
203#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400 186#define PRM_VC_I2C_CHANNEL_FREQ_KHZ 400
@@ -247,11 +230,6 @@
247#define TPS62361_BASE_VOLT_MV 500 230#define TPS62361_BASE_VOLT_MV 500
248#define TPS62361_VSEL0_GPIO 7 231#define TPS62361_VSEL0_GPIO 7
249 232
250/* Defines for DPLL setup */
251#define DPLL_LOCKED_FREQ_TOLERANCE_0 0
252#define DPLL_LOCKED_FREQ_TOLERANCE_500_KHZ 500
253#define DPLL_LOCKED_FREQ_TOLERANCE_1_MHZ 1000
254
255#define DPLL_NO_LOCK 0 233#define DPLL_NO_LOCK 0
256#define DPLL_LOCK 1 234#define DPLL_LOCK 1
257 235
diff --git a/arch/arm/include/asm/arch-omap5/cpu.h b/arch/arm/include/asm/arch-omap5/cpu.h
index 044ab5581a..4753f4624e 100644
--- a/arch/arm/include/asm/arch-omap5/cpu.h
+++ b/arch/arm/include/asm/arch-omap5/cpu.h
@@ -119,18 +119,6 @@ struct watchdog {
119#define WD_UNLOCK1 0xAAAA 119#define WD_UNLOCK1 0xAAAA
120#define WD_UNLOCK2 0x5555 120#define WD_UNLOCK2 0x5555
121 121
122#define SYSCLKDIV_1 (0x1 << 6)
123#define SYSCLKDIV_2 (0x1 << 7)
124
125#define CLKSEL_GPT1 (0x1 << 0)
126
127#define EN_GPT1 (0x1 << 0)
128#define EN_32KSYNC (0x1 << 2)
129
130#define ST_WDT2 (0x1 << 5)
131
132#define RESETDONE (0x1 << 0)
133
134#define TCLR_ST (0x1 << 0) 122#define TCLR_ST (0x1 << 0)
135#define TCLR_AR (0x1 << 1) 123#define TCLR_AR (0x1 << 1)
136#define TCLR_PRE (0x1 << 5) 124#define TCLR_PRE (0x1 << 5)
diff --git a/arch/arm/include/asm/arch-omap5/omap.h b/arch/arm/include/asm/arch-omap5/omap.h
index 4f43a903d8..6dfedf42a6 100644
--- a/arch/arm/include/asm/arch-omap5/omap.h
+++ b/arch/arm/include/asm/arch-omap5/omap.h
@@ -44,16 +44,8 @@
44#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START 44#define DRAM_ADDR_SPACE_START OMAP54XX_DRAM_ADDR_SPACE_START
45#define DRAM_ADDR_SPACE_END OMAP54XX_DRAM_ADDR_SPACE_END 45#define DRAM_ADDR_SPACE_END OMAP54XX_DRAM_ADDR_SPACE_END
46 46
47/* CONTROL */
48#define CTRL_BASE (OMAP54XX_L4_CORE_BASE + 0x2000)
49#define CONTROL_PADCONF_CORE (CTRL_BASE + 0x0800)
50#define CONTROL_PADCONF_WKUP (OMAP54XX_L4_WKUP_BASE + 0xc800)
51
52/* LPDDR2 IO regs. To be verified */
53#define LPDDR2_IO_REGS_BASE 0x4A100638
54
55/* CONTROL_ID_CODE */ 47/* CONTROL_ID_CODE */
56#define CONTROL_ID_CODE (CTRL_BASE + 0x204) 48#define CONTROL_ID_CODE 0x4A002204
57 49
58/* To be verified */ 50/* To be verified */
59#define OMAP5430_CONTROL_ID_CODE_ES1_0 0x0B94202F 51#define OMAP5430_CONTROL_ID_CODE_ES1_0 0x0B94202F
@@ -62,11 +54,6 @@
62#define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F 54#define OMAP5432_CONTROL_ID_CODE_ES2_0 0x1B99802F
63#define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F 55#define DRA752_CONTROL_ID_CODE_ES1_0 0x0B99002F
64 56
65/* STD_FUSE_PROD_ID_1 */
66#define STD_FUSE_PROD_ID_1 (CTRL_BASE + 0x218)
67#define PROD_ID_1_SILICON_TYPE_SHIFT 16
68#define PROD_ID_1_SILICON_TYPE_MASK (3 << 16)
69
70/* UART */ 57/* UART */
71#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000) 58#define UART1_BASE (OMAP54XX_L4_PER_BASE + 0x6a000)
72#define UART2_BASE (OMAP54XX_L4_PER_BASE + 0x6c000) 59#define UART2_BASE (OMAP54XX_L4_PER_BASE + 0x6c000)
@@ -80,15 +67,9 @@
80/* Watchdog Timer2 - MPU watchdog */ 67/* Watchdog Timer2 - MPU watchdog */
81#define WDT2_BASE (OMAP54XX_L4_WKUP_BASE + 0x14000) 68#define WDT2_BASE (OMAP54XX_L4_WKUP_BASE + 0x14000)
82 69
83/* 32KTIMER */
84#define SYNC_32KTIMER_BASE (OMAP54XX_L4_WKUP_BASE + 0x4000)
85
86/* GPMC */ 70/* GPMC */
87#define OMAP54XX_GPMC_BASE 0x50000000 71#define OMAP54XX_GPMC_BASE 0x50000000
88 72
89/* SYSTEM CONTROL MODULE */
90#define SYSCTRL_GENERAL_CORE_BASE 0x4A002000
91
92/* 73/*
93 * Hardware Register Details 74 * Hardware Register Details
94 */ 75 */
@@ -191,16 +172,6 @@ struct s32ktimer {
191/* base address for indirect vectors (internal boot mode) */ 172/* base address for indirect vectors (internal boot mode) */
192#define SRAM_ROM_VECT_BASE 0x4031F000 173#define SRAM_ROM_VECT_BASE 0x4031F000
193 174
194/* Silicon revisions */
195#define OMAP4430_SILICON_ID_INVALID 0xFFFFFFFF
196#define OMAP4430_ES1_0 0x44300100
197#define OMAP4430_ES2_0 0x44300200
198#define OMAP4430_ES2_1 0x44300210
199#define OMAP4430_ES2_2 0x44300220
200#define OMAP4430_ES2_3 0x44300230
201#define OMAP4460_ES1_0 0x44600100
202#define OMAP4460_ES1_1 0x44600110
203
204/* CONTROL_SRCOMP_XXX_SIDE */ 175/* CONTROL_SRCOMP_XXX_SIDE */
205#define OVERRIDE_XS_SHIFT 30 176#define OVERRIDE_XS_SHIFT 30
206#define OVERRIDE_XS_MASK (1 << 30) 177#define OVERRIDE_XS_MASK (1 << 30)
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index ee7b188d3a..8747bff07b 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -362,6 +362,7 @@ struct omap_sys_ctrl_regs {
362 u32 control_ldosram_iva_voltage_ctrl; 362 u32 control_ldosram_iva_voltage_ctrl;
363 u32 control_ldosram_mpu_voltage_ctrl; 363 u32 control_ldosram_mpu_voltage_ctrl;
364 u32 control_ldosram_core_voltage_ctrl; 364 u32 control_ldosram_core_voltage_ctrl;
365 u32 control_usbotghs_ctrl;
365 u32 control_padconf_core_base; 366 u32 control_padconf_core_base;
366 u32 control_paconf_global; 367 u32 control_paconf_global;
367 u32 control_paconf_mode; 368 u32 control_paconf_mode;
@@ -546,9 +547,6 @@ void scale_vcores(struct vcores_data const *);
546u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic); 547u32 get_offset_code(u32 volt_offset, struct pmic_data *pmic);
547void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic); 548void do_scale_vcore(u32 vcore_reg, u32 volt_mv, struct pmic_data *pmic);
548 549
549/* Max value for DPLL multiplier M */
550#define OMAP_DPLL_MAX_N 127
551
552/* HW Init Context */ 550/* HW Init Context */
553#define OMAP_INIT_CONTEXT_SPL 0 551#define OMAP_INIT_CONTEXT_SPL 0
554#define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1 552#define OMAP_INIT_CONTEXT_UBOOT_FROM_NOR 1
diff --git a/board/ti/omap5_uevm/evm.c b/board/ti/omap5_uevm/evm.c
index 46db1bfe66..90046e896e 100644
--- a/board/ti/omap5_uevm/evm.c
+++ b/board/ti/omap5_uevm/evm.c
@@ -71,22 +71,26 @@ int misc_init_r(void)
71 71
72void set_muxconf_regs_essential(void) 72void set_muxconf_regs_essential(void)
73{ 73{
74 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential, 74 do_set_mux((*ctrl)->control_padconf_core_base,
75 core_padconf_array_essential,
75 sizeof(core_padconf_array_essential) / 76 sizeof(core_padconf_array_essential) /
76 sizeof(struct pad_conf_entry)); 77 sizeof(struct pad_conf_entry));
77 78
78 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential, 79 do_set_mux((*ctrl)->control_padconf_wkup_base,
80 wkup_padconf_array_essential,
79 sizeof(wkup_padconf_array_essential) / 81 sizeof(wkup_padconf_array_essential) /
80 sizeof(struct pad_conf_entry)); 82 sizeof(struct pad_conf_entry));
81} 83}
82 84
83void set_muxconf_regs_non_essential(void) 85void set_muxconf_regs_non_essential(void)
84{ 86{
85 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, 87 do_set_mux((*ctrl)->control_padconf_core_base,
88 core_padconf_array_non_essential,
86 sizeof(core_padconf_array_non_essential) / 89 sizeof(core_padconf_array_non_essential) /
87 sizeof(struct pad_conf_entry)); 90 sizeof(struct pad_conf_entry));
88 91
89 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, 92 do_set_mux((*ctrl)->control_padconf_wkup_base,
93 wkup_padconf_array_non_essential,
90 sizeof(wkup_padconf_array_non_essential) / 94 sizeof(wkup_padconf_array_non_essential) /
91 sizeof(struct pad_conf_entry)); 95 sizeof(struct pad_conf_entry));
92} 96}
diff --git a/board/ti/panda/panda.c b/board/ti/panda/panda.c
index 2bbe392d81..4335259e58 100644
--- a/board/ti/panda/panda.c
+++ b/board/ti/panda/panda.c
@@ -139,16 +139,18 @@ int misc_init_r(void)
139 139
140void set_muxconf_regs_essential(void) 140void set_muxconf_regs_essential(void)
141{ 141{
142 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential, 142 do_set_mux((*ctrl)->control_padconf_core_base,
143 core_padconf_array_essential,
143 sizeof(core_padconf_array_essential) / 144 sizeof(core_padconf_array_essential) /
144 sizeof(struct pad_conf_entry)); 145 sizeof(struct pad_conf_entry));
145 146
146 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential, 147 do_set_mux((*ctrl)->control_padconf_wkup_base,
148 wkup_padconf_array_essential,
147 sizeof(wkup_padconf_array_essential) / 149 sizeof(wkup_padconf_array_essential) /
148 sizeof(struct pad_conf_entry)); 150 sizeof(struct pad_conf_entry));
149 151
150 if (omap_revision() >= OMAP4460_ES1_0) 152 if (omap_revision() >= OMAP4460_ES1_0)
151 do_set_mux(CONTROL_PADCONF_WKUP, 153 do_set_mux((*ctrl)->control_padconf_wkup_base,
152 wkup_padconf_array_essential_4460, 154 wkup_padconf_array_essential_4460,
153 sizeof(wkup_padconf_array_essential_4460) / 155 sizeof(wkup_padconf_array_essential_4460) /
154 sizeof(struct pad_conf_entry)); 156 sizeof(struct pad_conf_entry));
@@ -156,27 +158,29 @@ void set_muxconf_regs_essential(void)
156 158
157void set_muxconf_regs_non_essential(void) 159void set_muxconf_regs_non_essential(void)
158{ 160{
159 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, 161 do_set_mux((*ctrl)->control_padconf_core_base,
162 core_padconf_array_non_essential,
160 sizeof(core_padconf_array_non_essential) / 163 sizeof(core_padconf_array_non_essential) /
161 sizeof(struct pad_conf_entry)); 164 sizeof(struct pad_conf_entry));
162 165
163 if (omap_revision() < OMAP4460_ES1_0) 166 if (omap_revision() < OMAP4460_ES1_0)
164 do_set_mux(CONTROL_PADCONF_CORE, 167 do_set_mux((*ctrl)->control_padconf_core_base,
165 core_padconf_array_non_essential_4430, 168 core_padconf_array_non_essential_4430,
166 sizeof(core_padconf_array_non_essential_4430) / 169 sizeof(core_padconf_array_non_essential_4430) /
167 sizeof(struct pad_conf_entry)); 170 sizeof(struct pad_conf_entry));
168 else 171 else
169 do_set_mux(CONTROL_PADCONF_CORE, 172 do_set_mux((*ctrl)->control_padconf_core_base,
170 core_padconf_array_non_essential_4460, 173 core_padconf_array_non_essential_4460,
171 sizeof(core_padconf_array_non_essential_4460) / 174 sizeof(core_padconf_array_non_essential_4460) /
172 sizeof(struct pad_conf_entry)); 175 sizeof(struct pad_conf_entry));
173 176
174 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, 177 do_set_mux((*ctrl)->control_padconf_wkup_base,
178 wkup_padconf_array_non_essential,
175 sizeof(wkup_padconf_array_non_essential) / 179 sizeof(wkup_padconf_array_non_essential) /
176 sizeof(struct pad_conf_entry)); 180 sizeof(struct pad_conf_entry));
177 181
178 if (omap_revision() < OMAP4460_ES1_0) 182 if (omap_revision() < OMAP4460_ES1_0)
179 do_set_mux(CONTROL_PADCONF_WKUP, 183 do_set_mux((*ctrl)->control_padconf_wkup_base,
180 wkup_padconf_array_non_essential_4430, 184 wkup_padconf_array_non_essential_4430,
181 sizeof(wkup_padconf_array_non_essential_4430) / 185 sizeof(wkup_padconf_array_non_essential_4430) /
182 sizeof(struct pad_conf_entry)); 186 sizeof(struct pad_conf_entry));
diff --git a/board/ti/sdp4430/sdp.c b/board/ti/sdp4430/sdp.c
index 4c1a4f7e78..5dd1ba3cb4 100644
--- a/board/ti/sdp4430/sdp.c
+++ b/board/ti/sdp4430/sdp.c
@@ -72,16 +72,18 @@ int misc_init_r(void)
72 72
73void set_muxconf_regs_essential(void) 73void set_muxconf_regs_essential(void)
74{ 74{
75 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_essential, 75 do_set_mux((*ctrl)->control_padconf_core_base,
76 core_padconf_array_essential,
76 sizeof(core_padconf_array_essential) / 77 sizeof(core_padconf_array_essential) /
77 sizeof(struct pad_conf_entry)); 78 sizeof(struct pad_conf_entry));
78 79
79 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_essential, 80 do_set_mux((*ctrl)->control_padconf_wkup_base,
81 wkup_padconf_array_essential,
80 sizeof(wkup_padconf_array_essential) / 82 sizeof(wkup_padconf_array_essential) /
81 sizeof(struct pad_conf_entry)); 83 sizeof(struct pad_conf_entry));
82 84
83 if (omap_revision() >= OMAP4460_ES1_0) 85 if (omap_revision() >= OMAP4460_ES1_0)
84 do_set_mux(CONTROL_PADCONF_WKUP, 86 do_set_mux((*ctrl)->control_padconf_wkup_base,
85 wkup_padconf_array_essential_4460, 87 wkup_padconf_array_essential_4460,
86 sizeof(wkup_padconf_array_essential_4460) / 88 sizeof(wkup_padconf_array_essential_4460) /
87 sizeof(struct pad_conf_entry)); 89 sizeof(struct pad_conf_entry));
@@ -89,16 +91,18 @@ void set_muxconf_regs_essential(void)
89 91
90void set_muxconf_regs_non_essential(void) 92void set_muxconf_regs_non_essential(void)
91{ 93{
92 do_set_mux(CONTROL_PADCONF_CORE, core_padconf_array_non_essential, 94 do_set_mux((*ctrl)->control_padconf_core_base,
95 core_padconf_array_non_essential,
93 sizeof(core_padconf_array_non_essential) / 96 sizeof(core_padconf_array_non_essential) /
94 sizeof(struct pad_conf_entry)); 97 sizeof(struct pad_conf_entry));
95 98
96 do_set_mux(CONTROL_PADCONF_WKUP, wkup_padconf_array_non_essential, 99 do_set_mux((*ctrl)->control_padconf_wkup_base,
100 wkup_padconf_array_non_essential,
97 sizeof(wkup_padconf_array_non_essential) / 101 sizeof(wkup_padconf_array_non_essential) /
98 sizeof(struct pad_conf_entry)); 102 sizeof(struct pad_conf_entry));
99 103
100 if (omap_revision() < OMAP4460_ES1_0) { 104 if (omap_revision() < OMAP4460_ES1_0) {
101 do_set_mux(CONTROL_PADCONF_WKUP, 105 do_set_mux((*ctrl)->control_padconf_wkup_base,
102 wkup_padconf_array_non_essential_4430, 106 wkup_padconf_array_non_essential_4430,
103 sizeof(wkup_padconf_array_non_essential_4430) / 107 sizeof(wkup_padconf_array_non_essential_4430) /
104 sizeof(struct pad_conf_entry)); 108 sizeof(struct pad_conf_entry));
diff --git a/drivers/usb/musb/omap3.c b/drivers/usb/musb/omap3.c
index c7876ed094..a395ebcc67 100644
--- a/drivers/usb/musb/omap3.c
+++ b/drivers/usb/musb/omap3.c
@@ -30,6 +30,7 @@
30 * MA 02111-1307 USA 30 * MA 02111-1307 USA
31 */ 31 */
32 32
33#include <asm/omap_common.h>
33#include <twl4030.h> 34#include <twl4030.h>
34#include <twl6030.h> 35#include <twl6030.h>
35#include "omap3.h" 36#include "omap3.h"
@@ -135,7 +136,8 @@ int musb_platform_init(void)
135#endif 136#endif
136 137
137#ifdef CONFIG_OMAP4430 138#ifdef CONFIG_OMAP4430
138 u32 *usbotghs_control = (u32 *)(CTRL_BASE + 0x33C); 139 u32 *usbotghs_control =
140 (u32 *)((*ctrl)->control_usbotghs_ctrl);
139 *usbotghs_control = 0x15; 141 *usbotghs_control = 0x15;
140#endif 142#endif
141 platform_needs_initialization = 0; 143 platform_needs_initialization = 0;