diff options
Diffstat (limited to 'arch/arm/include/asm/arch-omap5/clock.h')
-rw-r--r-- | arch/arm/include/asm/arch-omap5/clock.h | 13 |
1 files changed, 10 insertions, 3 deletions
diff --git a/arch/arm/include/asm/arch-omap5/clock.h b/arch/arm/include/asm/arch-omap5/clock.h index 489815e644..80077d7b71 100644 --- a/arch/arm/include/asm/arch-omap5/clock.h +++ b/arch/arm/include/asm/arch-omap5/clock.h | |||
@@ -256,6 +256,9 @@ | |||
256 | #define VDD_GPU_DRA7_HIGH 1250 | 256 | #define VDD_GPU_DRA7_HIGH 1250 |
257 | #define VDD_IVA_DRA7_HIGH 1250 | 257 | #define VDD_IVA_DRA7_HIGH 1250 |
258 | 258 | ||
259 | /* DRA76x voltage settings in mv for OPP_PLUS per DM */ | ||
260 | #define VDD_GPU_DRA7_PLUS 1250 | ||
261 | |||
259 | /* Efuse register offsets for DRA7xx platform */ | 262 | /* Efuse register offsets for DRA7xx platform */ |
260 | #define DRA752_EFUSE_BASE 0x4A002000 | 263 | #define DRA752_EFUSE_BASE 0x4A002000 |
261 | #define DRA752_EFUSE_REGBITS 16 | 264 | #define DRA752_EFUSE_REGBITS 16 |
@@ -279,6 +282,8 @@ | |||
279 | #define STD_FUSE_OPP_VMIN_GPU_OD (DRA752_EFUSE_BASE + 0x1B0C) | 282 | #define STD_FUSE_OPP_VMIN_GPU_OD (DRA752_EFUSE_BASE + 0x1B0C) |
280 | /* STD_FUSE_OPP_VMIN_GPU_4 */ | 283 | /* STD_FUSE_OPP_VMIN_GPU_4 */ |
281 | #define STD_FUSE_OPP_VMIN_GPU_HIGH (DRA752_EFUSE_BASE + 0x1B10) | 284 | #define STD_FUSE_OPP_VMIN_GPU_HIGH (DRA752_EFUSE_BASE + 0x1B10) |
285 | /* STD_FUSE_OPP_VMIN_GPU_5 */ | ||
286 | #define STD_FUSE_OPP_VMIN_GPU_PLUS (DRA752_EFUSE_BASE + 0x1B14) | ||
282 | /* STD_FUSE_OPP_VMIN_MPU_2 */ | 287 | /* STD_FUSE_OPP_VMIN_MPU_2 */ |
283 | #define STD_FUSE_OPP_VMIN_MPU_NOM (DRA752_EFUSE_BASE + 0x1B20) | 288 | #define STD_FUSE_OPP_VMIN_MPU_NOM (DRA752_EFUSE_BASE + 0x1B20) |
284 | /* STD_FUSE_OPP_VMIN_MPU_3 */ | 289 | /* STD_FUSE_OPP_VMIN_MPU_3 */ |
@@ -291,13 +296,13 @@ | |||
291 | #define VDD_MPU_DRA7 VDD_MPU_DRA7_NOM | 296 | #define VDD_MPU_DRA7 VDD_MPU_DRA7_NOM |
292 | #define VDD_CORE_DRA7 VDD_CORE_DRA7_NOM | 297 | #define VDD_CORE_DRA7 VDD_CORE_DRA7_NOM |
293 | #define VDD_EVE_DRA7 VDD_EVE_DRA7_HIGH | 298 | #define VDD_EVE_DRA7 VDD_EVE_DRA7_HIGH |
294 | #define VDD_GPU_DRA7 VDD_GPU_DRA7_HIGH | 299 | #define VDD_GPU_DRA7 VDD_GPU_DRA7_PLUS |
295 | #define VDD_IVA_DRA7 VDD_IVA_DRA7_HIGH | 300 | #define VDD_IVA_DRA7 VDD_IVA_DRA7_HIGH |
296 | 301 | ||
297 | #define STD_FUSE_OPP_VMIN_MPU STD_FUSE_OPP_VMIN_MPU_NOM | 302 | #define STD_FUSE_OPP_VMIN_MPU STD_FUSE_OPP_VMIN_MPU_NOM |
298 | #define STD_FUSE_OPP_VMIN_CORE STD_FUSE_OPP_VMIN_CORE_NOM | 303 | #define STD_FUSE_OPP_VMIN_CORE STD_FUSE_OPP_VMIN_CORE_NOM |
299 | #define STD_FUSE_OPP_VMIN_DSPEVE STD_FUSE_OPP_VMIN_DSPEVE_HIGH | 304 | #define STD_FUSE_OPP_VMIN_DSPEVE STD_FUSE_OPP_VMIN_DSPEVE_HIGH |
300 | #define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_HIGH | 305 | #define STD_FUSE_OPP_VMIN_GPU STD_FUSE_OPP_VMIN_GPU_PLUS |
301 | #define STD_FUSE_OPP_VMIN_IVA STD_FUSE_OPP_VMIN_IVA_HIGH | 306 | #define STD_FUSE_OPP_VMIN_IVA STD_FUSE_OPP_VMIN_IVA_HIGH |
302 | 307 | ||
303 | /* Common OPP selection for DRA7xx devices */ | 308 | /* Common OPP selection for DRA7xx devices */ |
@@ -327,7 +332,9 @@ | |||
327 | #define DRA7_IVA_OPP OPP_NOM | 332 | #define DRA7_IVA_OPP OPP_NOM |
328 | #endif | 333 | #endif |
329 | 334 | ||
330 | #if defined(CONFIG_DRA7_GPU_OPP_HIGH) | 335 | #if defined(CONFIG_DRA7_GPU_OPP_PLUS) |
336 | #define DRA7_GPU_OPP OPP_PLUS | ||
337 | #elif defined(CONFIG_DRA7_GPU_OPP_HIGH) | ||
331 | #define DRA7_GPU_OPP OPP_HIGH | 338 | #define DRA7_GPU_OPP OPP_HIGH |
332 | #elif defined(CONFIG_DRA7_GPU_OPP_OD) | 339 | #elif defined(CONFIG_DRA7_GPU_OPP_OD) |
333 | #define DRA7_GPU_OPP OPP_OD | 340 | #define DRA7_GPU_OPP OPP_OD |