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Diffstat (limited to 'board/ti/dra7xx/evm.c')
-rw-r--r--board/ti/dra7xx/evm.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/board/ti/dra7xx/evm.c b/board/ti/dra7xx/evm.c
index 685edf07c8..08c0987afe 100644
--- a/board/ti/dra7xx/evm.c
+++ b/board/ti/dra7xx/evm.c
@@ -391,9 +391,11 @@ struct vcores_data dra752_volts = {
391 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 391 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
392 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 392 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
393 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 393 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
394 .gpu.value[OPP_PLUS] = VDD_GPU_DRA7_PLUS,
394 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 395 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
395 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 396 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
396 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 397 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
398 .gpu.efuse.reg[OPP_PLUS] = STD_FUSE_OPP_VMIN_GPU_PLUS,
397 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 399 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
398 .gpu.addr = TPS659038_REG_ADDR_SMPS6, 400 .gpu.addr = TPS659038_REG_ADDR_SMPS6,
399 .gpu.pmic = &tps659038, 401 .gpu.pmic = &tps659038,
@@ -439,9 +441,11 @@ struct vcores_data dra76x_volts = {
439 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 441 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
440 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 442 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
441 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 443 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
444 .gpu.value[OPP_PLUS] = VDD_GPU_DRA7_PLUS,
442 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 445 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
443 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 446 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
444 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 447 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
448 .gpu.efuse.reg[OPP_PLUS] = STD_FUSE_OPP_VMIN_GPU_PLUS,
445 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 449 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
446 .gpu.addr = LP87565_REG_ADDR_BUCK23, 450 .gpu.addr = LP87565_REG_ADDR_BUCK23,
447 .gpu.pmic = &lp87565, 451 .gpu.pmic = &lp87565,
@@ -486,9 +490,11 @@ struct vcores_data dra722_volts = {
486 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM, 490 .gpu.value[OPP_NOM] = VDD_GPU_DRA7_NOM,
487 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD, 491 .gpu.value[OPP_OD] = VDD_GPU_DRA7_OD,
488 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH, 492 .gpu.value[OPP_HIGH] = VDD_GPU_DRA7_HIGH,
493 .gpu.value[OPP_PLUS] = VDD_GPU_DRA7_PLUS,
489 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM, 494 .gpu.efuse.reg[OPP_NOM] = STD_FUSE_OPP_VMIN_GPU_NOM,
490 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD, 495 .gpu.efuse.reg[OPP_OD] = STD_FUSE_OPP_VMIN_GPU_OD,
491 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH, 496 .gpu.efuse.reg[OPP_HIGH] = STD_FUSE_OPP_VMIN_GPU_HIGH,
497 .gpu.efuse.reg[OPP_PLUS] = STD_FUSE_OPP_VMIN_GPU_PLUS,
492 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS, 498 .gpu.efuse.reg_bits = DRA752_EFUSE_REGBITS,
493 .gpu.addr = TPS65917_REG_ADDR_SMPS3, 499 .gpu.addr = TPS65917_REG_ADDR_SMPS3,
494 .gpu.pmic = &tps659038, 500 .gpu.pmic = &tps659038,
@@ -587,6 +593,8 @@ int get_voltrail_opp(int rail_offset)
587 /* DRA71x supports only OPP_NOM for GPU */ 593 /* DRA71x supports only OPP_NOM for GPU */
588 if (board_is_dra71x_evm()) 594 if (board_is_dra71x_evm())
589 opp = OPP_NOM; 595 opp = OPP_NOM;
596 else if (!board_is_dra76x_evm() && opp == OPP_PLUS)
597 opp = OPP_HIGH;
590 break; 598 break;
591 case VOLT_EVE: 599 case VOLT_EVE:
592 opp = DRA7_DSPEVE_OPP; 600 opp = DRA7_DSPEVE_OPP;