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authorHawking Zhang2017-05-27 01:49:19 -0500
committerAlex Deucher2017-08-04 07:25:00 -0500
commit4d0e05eb2a611eef83609678de27f45a9a3ad806 (patch)
tree0947205e528c286ee6def910dfa27426eda2c3d5
parent517df5f5134af207c90ac92185dc8c7ed5a86f92 (diff)
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tests/amdgpu: bypass VCE tests on raven
raven doesn't support VCE Signed-off-by: Hawking Zhang <Hawking.Zhang@amd.com> Reviewed-by: Xiaojie Yuan <Xiaojie.Yuan@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--tests/amdgpu/vce_tests.c17
1 files changed, 17 insertions, 0 deletions
diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c
index b03807b2..8d61a3b1 100644
--- a/tests/amdgpu/vce_tests.c
+++ b/tests/amdgpu/vce_tests.c
@@ -106,6 +106,11 @@ int suite_vce_tests_init(void)
106 family_id = device_handle->info.family_id; 106 family_id = device_handle->info.family_id;
107 vce_harvest_config = device_handle->info.vce_harvest_config; 107 vce_harvest_config = device_handle->info.vce_harvest_config;
108 108
109 if (family_id >= AMDGPU_FAMILY_RV) {
110 printf("\n\nThe ASIC NOT support VCE, all sub-tests will pass\n");
111 return CUE_SUCCESS;
112 }
113
109 r = amdgpu_cs_ctx_create(device_handle, &context_handle); 114 r = amdgpu_cs_ctx_create(device_handle, &context_handle);
110 if (r) 115 if (r)
111 return CUE_SINIT_FAILED; 116 return CUE_SINIT_FAILED;
@@ -126,6 +131,9 @@ int suite_vce_tests_clean(void)
126{ 131{
127 int r; 132 int r;
128 133
134 if (family_id >= AMDGPU_FAMILY_RV)
135 return CUE_SUCCESS;
136
129 r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle, 137 r = amdgpu_bo_unmap_and_free(ib_handle, ib_va_handle,
130 ib_mc_address, IB_SIZE); 138 ib_mc_address, IB_SIZE);
131 if (r) 139 if (r)
@@ -237,6 +245,9 @@ static void amdgpu_cs_vce_create(void)
237 unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16; 245 unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
238 int len, r; 246 int len, r;
239 247
248 if (family_id >= AMDGPU_FAMILY_RV)
249 return;
250
240 enc.width = vce_create[6]; 251 enc.width = vce_create[6];
241 enc.height = vce_create[7]; 252 enc.height = vce_create[7];
242 253
@@ -430,6 +441,9 @@ static void amdgpu_cs_vce_encode(void)
430 unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16; 441 unsigned align = (family_id >= AMDGPU_FAMILY_AI) ? 256 : 16;
431 int i, r; 442 int i, r;
432 443
444 if (family_id >= AMDGPU_FAMILY_RV)
445 return;
446
433 vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5; 447 vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5;
434 cpb_size = vbuf_size * 10; 448 cpb_size = vbuf_size * 10;
435 num_resources = 0; 449 num_resources = 0;
@@ -508,6 +522,9 @@ static void amdgpu_cs_vce_destroy(void)
508{ 522{
509 int len, r; 523 int len, r;
510 524
525 if (family_id >= AMDGPU_FAMILY_RV)
526 return;
527
511 num_resources = 0; 528 num_resources = 0;
512 alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT); 529 alloc_resource(&enc.fb[0], 4096, AMDGPU_GEM_DOMAIN_GTT);
513 resources[num_resources++] = enc.fb[0].handle; 530 resources[num_resources++] = enc.fb[0].handle;