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authorJesse Barnes2008-12-10 17:47:28 -0600
committerJesse Barnes2008-12-10 17:50:22 -0600
commit9583c099b4a08b49e03f7b461c344b6d277fd262 (patch)
treee3c17d4b9ee2c2a063c3e30e0a650fc0c9b6cfa7
parentc34539e8bb5568b1d6059abf139dd08e07e84eea (diff)
downloadexternal-libdrm-9583c099b4a08b49e03f7b461c344b6d277fd262.tar.gz
external-libdrm-9583c099b4a08b49e03f7b461c344b6d277fd262.tar.xz
external-libdrm-9583c099b4a08b49e03f7b461c344b6d277fd262.zip
Revert "Merge branch 'modesetting-gem'"
This reverts commit 6656db10551bbb8770dd945b6d81d5138521f208. We really just want the libdrm and ioctl bits, not all the driver stuff.
-rw-r--r--configure.ac1
-rw-r--r--libdrm/Makefile.am5
-rw-r--r--libdrm/intel/intel_bufmgr.h5
-rw-r--r--libdrm/intel/intel_bufmgr_fake.c3
-rw-r--r--libdrm/intel/intel_bufmgr_gem.c9
-rw-r--r--libdrm/radeon/Makefile.am48
-rw-r--r--libdrm/radeon/radeon_bo.h167
-rw-r--r--libdrm/radeon/radeon_bo_gem.c208
-rw-r--r--libdrm/radeon/radeon_bo_gem.h40
-rw-r--r--libdrm/radeon/radeon_cs.h168
-rw-r--r--libdrm/radeon/radeon_cs_gem.c438
-rw-r--r--libdrm/radeon/radeon_cs_gem.h41
-rw-r--r--libdrm/radeon/radeon_track.c140
-rw-r--r--libdrm/radeon/radeon_track.h64
-rw-r--r--libdrm/xf86drm.c42
-rw-r--r--libdrm/xf86drm.h5
-rw-r--r--libdrm/xf86drmMode.c684
-rw-r--r--libdrm/xf86drmMode.h256
-rw-r--r--linux-core/Makefile9
-rw-r--r--linux-core/Makefile.kernel31
-rw-r--r--linux-core/ObjectID.h518
l---------linux-core/amd.h1
l---------linux-core/amd_legacy.h1
l---------linux-core/amd_legacy_cbuffer.c1
l---------linux-core/amd_legacy_fence.h1
-rw-r--r--linux-core/ati_pcigart.c199
-rw-r--r--linux-core/atom-bits.h48
-rw-r--r--linux-core/atom-names.h100
-rw-r--r--linux-core/atom-types.h42
-rw-r--r--linux-core/atom.c1143
-rw-r--r--linux-core/atom.h148
-rw-r--r--linux-core/atombios.h5025
-rw-r--r--linux-core/atombios_crtc.c462
-rw-r--r--linux-core/drmP.h151
-rw-r--r--linux-core/drm_auth.c28
-rw-r--r--linux-core/drm_bo.c821
-rw-r--r--linux-core/drm_bo_lock.c189
-rw-r--r--linux-core/drm_bo_move.c76
-rw-r--r--linux-core/drm_bufs.c25
-rw-r--r--linux-core/drm_compat.c59
-rw-r--r--linux-core/drm_compat.h36
-rw-r--r--linux-core/drm_context.c10
-rw-r--r--linux-core/drm_crtc.c2383
-rw-r--r--linux-core/drm_crtc.h716
-rw-r--r--linux-core/drm_crtc_helper.c833
-rw-r--r--linux-core/drm_crtc_helper.h98
-rw-r--r--linux-core/drm_dma.c2
-rw-r--r--linux-core/drm_drv.c145
-rw-r--r--linux-core/drm_edid.c737
-rw-r--r--linux-core/drm_edid.h178
-rw-r--r--linux-core/drm_fb.c432
-rw-r--r--linux-core/drm_fence.c301
-rw-r--r--linux-core/drm_fops.c228
-rw-r--r--linux-core/drm_gem.c4
-rw-r--r--linux-core/drm_ioctl.c50
-rw-r--r--linux-core/drm_irq.c122
-rw-r--r--linux-core/drm_lock.c63
-rw-r--r--linux-core/drm_memory.c1
-rw-r--r--linux-core/drm_mm.c1
l---------linux-core/drm_mode.h1
-rw-r--r--linux-core/drm_modes.c570
-rw-r--r--linux-core/drm_object.c294
-rw-r--r--linux-core/drm_objects.h323
-rw-r--r--linux-core/drm_proc.c8
-rw-r--r--linux-core/drm_stub.c149
-rw-r--r--linux-core/drm_sysfs.c351
-rw-r--r--linux-core/drm_ttm.c29
-rw-r--r--linux-core/drm_uncached.c138
-rw-r--r--linux-core/drm_vm.c9
-rw-r--r--linux-core/dvo.h159
-rw-r--r--linux-core/dvo_ch7017.c454
-rw-r--r--linux-core/dvo_ch7xxx.c368
-rw-r--r--linux-core/dvo_ivch.c463
-rw-r--r--linux-core/dvo_sil164.c302
-rw-r--r--linux-core/dvo_tfp410.c335
-rw-r--r--linux-core/i915_buffer.c303
-rw-r--r--linux-core/i915_drv.c44
-rw-r--r--linux-core/i915_execbuf.c917
-rw-r--r--linux-core/i915_fence.c273
-rw-r--r--linux-core/i915_gem.c103
-rw-r--r--linux-core/i915_gem_debug.c4
-rw-r--r--linux-core/i915_gem_proc.c12
-rw-r--r--linux-core/i915_gem_tiling.c9
l---------linux-core/i915_init.c1
-rw-r--r--linux-core/i915_ioc32.c61
-rw-r--r--linux-core/intel_bios.c242
-rw-r--r--linux-core/intel_bios.h405
-rw-r--r--linux-core/intel_crt.c296
-rw-r--r--linux-core/intel_display.c1636
-rw-r--r--linux-core/intel_drv.h125
-rw-r--r--linux-core/intel_dvo.c507
-rw-r--r--linux-core/intel_fb.c1148
-rw-r--r--linux-core/intel_i2c.c190
-rw-r--r--linux-core/intel_lvds.c515
-rw-r--r--linux-core/intel_modes.c61
-rw-r--r--linux-core/intel_sdvo.c1153
-rw-r--r--linux-core/intel_sdvo_regs.h328
-rw-r--r--linux-core/intel_tv.c1734
-rw-r--r--linux-core/nouveau_bios.c854
-rw-r--r--linux-core/nouveau_bios.h151
-rw-r--r--linux-core/nouveau_drv.c7
-rw-r--r--linux-core/nv50_connector.c245
-rw-r--r--linux-core/nv50_connector.h62
-rw-r--r--linux-core/nv50_crtc.c533
-rw-r--r--linux-core/nv50_crtc.h73
-rw-r--r--linux-core/nv50_cursor.c193
-rw-r--r--linux-core/nv50_cursor.h52
-rw-r--r--linux-core/nv50_dac.c265
-rw-r--r--linux-core/nv50_display.c359
-rw-r--r--linux-core/nv50_display.h83
-rw-r--r--linux-core/nv50_display_commands.h196
-rw-r--r--linux-core/nv50_fb.c142
-rw-r--r--linux-core/nv50_fb.h57
-rw-r--r--linux-core/nv50_fbcon.c627
-rw-r--r--linux-core/nv50_fbcon.h41
-rw-r--r--linux-core/nv50_i2c.c400
-rw-r--r--linux-core/nv50_i2c.h47
-rw-r--r--linux-core/nv50_kms_wrapper.c1454
-rw-r--r--linux-core/nv50_kms_wrapper.h95
-rw-r--r--linux-core/nv50_lut.c193
-rw-r--r--linux-core/nv50_lut.h45
-rw-r--r--linux-core/nv50_output.c33
-rw-r--r--linux-core/nv50_output.h62
-rw-r--r--linux-core/nv50_sor.c240
-rw-r--r--linux-core/radeon_atombios.c757
-rw-r--r--linux-core/radeon_buffer.c453
-rw-r--r--linux-core/radeon_combios.c1400
-rw-r--r--linux-core/radeon_connectors.c392
l---------linux-core/radeon_cs.c1
-rw-r--r--linux-core/radeon_cursor.c247
-rw-r--r--linux-core/radeon_display.c718
-rw-r--r--linux-core/radeon_drv.c77
-rw-r--r--linux-core/radeon_encoders.c1103
-rw-r--r--linux-core/radeon_fb.c1167
-rw-r--r--linux-core/radeon_fence.c99
-rw-r--r--linux-core/radeon_gem.c1608
-rw-r--r--linux-core/radeon_gem_proc.c146
-rw-r--r--linux-core/radeon_i2c.c196
-rw-r--r--linux-core/radeon_legacy_crtc.c1075
-rw-r--r--linux-core/radeon_legacy_encoders.c1371
-rw-r--r--linux-core/radeon_mode.h357
l---------linux-core/radeon_ms.h1
l---------linux-core/radeon_ms_bo.c1
l---------linux-core/radeon_ms_bus.c1
l---------linux-core/radeon_ms_combios.c1
l---------linux-core/radeon_ms_combios.h1
-rw-r--r--linux-core/radeon_ms_compat.c67
l---------linux-core/radeon_ms_cp.c1
l---------linux-core/radeon_ms_cp_mc.c1
l---------linux-core/radeon_ms_crtc.c1
l---------linux-core/radeon_ms_dac.c1
l---------linux-core/radeon_ms_drm.c1
l---------linux-core/radeon_ms_drm.h1
-rw-r--r--linux-core/radeon_ms_drv.c144
-rw-r--r--linux-core/radeon_ms_drv.h46
l---------linux-core/radeon_ms_exec.c1
l---------linux-core/radeon_ms_family.c1
-rw-r--r--linux-core/radeon_ms_fb.c462
l---------linux-core/radeon_ms_fence.c1
l---------linux-core/radeon_ms_gpu.c1
l---------linux-core/radeon_ms_i2c.c1
l---------linux-core/radeon_ms_irq.c1
l---------linux-core/radeon_ms_output.c1
l---------linux-core/radeon_ms_properties.c1
l---------linux-core/radeon_ms_properties.h1
l---------linux-core/radeon_ms_reg.h1
l---------linux-core/radeon_ms_rom.c1
l---------linux-core/radeon_ms_rom.h1
l---------linux-core/radeon_ms_state.c1
-rw-r--r--linux-core/radeon_pm.c248
-rw-r--r--linux-core/radeon_reg.h5331
-rw-r--r--linux-core/via_fence.c4
-rw-r--r--shared-core/Makefile.am2
-rw-r--r--shared-core/amd.h94
-rw-r--r--shared-core/amd_legacy.h33
-rw-r--r--shared-core/amd_legacy_cbuffer.c320
-rw-r--r--shared-core/amd_legacy_fence.h39
-rw-r--r--shared-core/drm.h380
-rw-r--r--shared-core/drm_mode.h271
-rw-r--r--shared-core/drm_pciids.txt4
-rw-r--r--shared-core/i915_dma.c459
-rw-r--r--shared-core/i915_drm.h60
-rw-r--r--shared-core/i915_drv.h129
-rw-r--r--shared-core/i915_init.c552
-rw-r--r--shared-core/i915_irq.c346
-rw-r--r--shared-core/i915_mem.c23
-rw-r--r--shared-core/nouveau_dma.h5
-rw-r--r--shared-core/nouveau_drv.h25
-rw-r--r--shared-core/nouveau_irq.c91
-rw-r--r--shared-core/nouveau_mem.c36
-rw-r--r--shared-core/nouveau_reg.h240
-rw-r--r--shared-core/nouveau_state.c57
-rw-r--r--shared-core/r300_cmdbuf.c140
-rw-r--r--shared-core/r300_reg.h16
-rw-r--r--shared-core/radeon_cp.c1333
-rw-r--r--shared-core/radeon_cs.c667
-rw-r--r--shared-core/radeon_drm.h148
-rw-r--r--shared-core/radeon_drv.h512
-rw-r--r--shared-core/radeon_irq.c29
-rw-r--r--shared-core/radeon_mem.c2
-rw-r--r--shared-core/radeon_ms.h591
-rw-r--r--shared-core/radeon_ms_bo.c321
-rw-r--r--shared-core/radeon_ms_bus.c461
-rw-r--r--shared-core/radeon_ms_combios.c411
-rw-r--r--shared-core/radeon_ms_combios.h385
-rw-r--r--shared-core/radeon_ms_cp.c371
-rw-r--r--shared-core/radeon_ms_cp_mc.c801
-rw-r--r--shared-core/radeon_ms_crtc.c765
-rw-r--r--shared-core/radeon_ms_dac.c400
-rw-r--r--shared-core/radeon_ms_drm.c341
-rw-r--r--shared-core/radeon_ms_drm.h80
-rw-r--r--shared-core/radeon_ms_exec.c404
-rw-r--r--shared-core/radeon_ms_family.c142
-rw-r--r--shared-core/radeon_ms_fence.c275
-rw-r--r--shared-core/radeon_ms_gpu.c599
-rw-r--r--shared-core/radeon_ms_i2c.c336
-rw-r--r--shared-core/radeon_ms_irq.c161
-rw-r--r--shared-core/radeon_ms_output.c361
-rw-r--r--shared-core/radeon_ms_properties.c123
-rw-r--r--shared-core/radeon_ms_properties.h50
-rw-r--r--shared-core/radeon_ms_reg.h1787
-rw-r--r--shared-core/radeon_ms_rom.c91
-rw-r--r--shared-core/radeon_ms_rom.h51
-rw-r--r--shared-core/radeon_ms_state.c45
-rw-r--r--shared-core/radeon_state.c190
-rw-r--r--tests/Makefile.am4
-rw-r--r--tests/dristat.c2
-rw-r--r--tests/modedemo/Makefile14
-rw-r--r--tests/modedemo/demo.c634
-rwxr-xr-xtests/modedemo/test1
-rw-r--r--tests/modefb/Makefile14
-rw-r--r--tests/modefb/demo.c230
-rwxr-xr-xtests/modefb/test1
-rw-r--r--tests/modehotplug/Makefile14
-rw-r--r--tests/modehotplug/demo.c157
-rwxr-xr-xtests/modehotplug/test1
-rw-r--r--tests/modeprint/Makefile14
-rw-r--r--tests/modeprint/modetest.c371
-rwxr-xr-xtests/modeprint/test1
-rw-r--r--tests/modetest/Makefile14
-rw-r--r--tests/modetest/modetest.c410
-rwxr-xr-xtests/modetest/test2
-rw-r--r--tests/radeon_gem_basic.c114
-rw-r--r--tests/radeon_gem_mmap.c132
244 files changed, 4978 insertions, 68471 deletions
diff --git a/configure.ac b/configure.ac
index b142554f..f4179faa 100644
--- a/configure.ac
+++ b/configure.ac
@@ -117,7 +117,6 @@ AC_OUTPUT([
117 Makefile 117 Makefile
118 libdrm/Makefile 118 libdrm/Makefile
119 libdrm/intel/Makefile 119 libdrm/intel/Makefile
120 libdrm/radeon/Makefile
121 shared-core/Makefile 120 shared-core/Makefile
122 tests/Makefile 121 tests/Makefile
123 libdrm.pc]) 122 libdrm.pc])
diff --git a/libdrm/Makefile.am b/libdrm/Makefile.am
index edc302f7..a5be36e0 100644
--- a/libdrm/Makefile.am
+++ b/libdrm/Makefile.am
@@ -18,7 +18,7 @@
18# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN 18# IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 19# CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
20 20
21SUBDIRS = . intel radeon 21SUBDIRS = . intel
22 22
23libdrm_la_LTLIBRARIES = libdrm.la 23libdrm_la_LTLIBRARIES = libdrm.la
24libdrm_ladir = $(libdir) 24libdrm_ladir = $(libdir)
@@ -26,10 +26,9 @@ libdrm_la_LDFLAGS = -version-number 2:4:0 -no-undefined
26 26
27AM_CFLAGS = -I$(top_srcdir)/shared-core 27AM_CFLAGS = -I$(top_srcdir)/shared-core
28libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c \ 28libdrm_la_SOURCES = xf86drm.c xf86drmHash.c xf86drmRandom.c xf86drmSL.c \
29 xf86drmMode.c libdrm_lists.h
30 libdrm_lists.h 29 libdrm_lists.h
31 30
32libdrmincludedir = ${includedir} 31libdrmincludedir = ${includedir}
33libdrminclude_HEADERS = xf86drm.h xf86drmMode.h 32libdrminclude_HEADERS = xf86drm.h
34 33
35EXTRA_DIST = ChangeLog TODO 34EXTRA_DIST = ChangeLog TODO
diff --git a/libdrm/intel/intel_bufmgr.h b/libdrm/intel/intel_bufmgr.h
index e8c2e063..f134f169 100644
--- a/libdrm/intel/intel_bufmgr.h
+++ b/libdrm/intel/intel_bufmgr.h
@@ -66,11 +66,6 @@ struct _drm_intel_bo {
66 66
67 /** Buffer manager context associated with this buffer object */ 67 /** Buffer manager context associated with this buffer object */
68 drm_intel_bufmgr *bufmgr; 68 drm_intel_bufmgr *bufmgr;
69
70 /**
71 * MM-specific handle for accessing object
72 */
73 int handle;
74}; 69};
75 70
76drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name, 71drm_intel_bo *drm_intel_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
diff --git a/libdrm/intel/intel_bufmgr_fake.c b/libdrm/intel/intel_bufmgr_fake.c
index 0e465303..6d8ee85a 100644
--- a/libdrm/intel/intel_bufmgr_fake.c
+++ b/libdrm/intel/intel_bufmgr_fake.c
@@ -833,7 +833,7 @@ drm_intel_bo_fake_alloc_static(drm_intel_bufmgr *bufmgr, const char *name,
833 bo_fake->refcount = 1; 833 bo_fake->refcount = 1;
834 bo_fake->id = ++bufmgr_fake->buf_nr; 834 bo_fake->id = ++bufmgr_fake->buf_nr;
835 bo_fake->name = name; 835 bo_fake->name = name;
836 bo_fake->flags = BM_PINNED; 836 bo_fake->flags = BM_PINNED | DRM_BO_FLAG_NO_MOVE;
837 bo_fake->is_static = 1; 837 bo_fake->is_static = 1;
838 838
839 DBG("drm_bo_alloc_static: (buf %d: %s, %d kb)\n", bo_fake->id, bo_fake->name, 839 DBG("drm_bo_alloc_static: (buf %d: %s, %d kb)\n", bo_fake->id, bo_fake->name,
@@ -1070,6 +1070,7 @@ drm_intel_fake_kick_all_locked(drm_intel_bufmgr_fake *bufmgr_fake)
1070 if (!(bo_fake->flags & BM_NO_BACKING_STORE)) 1070 if (!(bo_fake->flags & BM_NO_BACKING_STORE))
1071 bo_fake->dirty = 1; 1071 bo_fake->dirty = 1;
1072 } 1072 }
1073
1073} 1074}
1074 1075
1075static int 1076static int
diff --git a/libdrm/intel/intel_bufmgr_gem.c b/libdrm/intel/intel_bufmgr_gem.c
index f7ad7571..e681eee7 100644
--- a/libdrm/intel/intel_bufmgr_gem.c
+++ b/libdrm/intel/intel_bufmgr_gem.c
@@ -352,7 +352,6 @@ drm_intel_gem_bo_alloc(drm_intel_bufmgr *bufmgr, const char *name,
352 352
353 ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CREATE, &create); 353 ret = ioctl(bufmgr_gem->fd, DRM_IOCTL_I915_GEM_CREATE, &create);
354 bo_gem->gem_handle = create.handle; 354 bo_gem->gem_handle = create.handle;
355 bo_gem->bo.handle = bo_gem->gem_handle;
356 if (ret != 0) { 355 if (ret != 0) {
357 free(bo_gem); 356 free(bo_gem);
358 return NULL; 357 return NULL;
@@ -427,14 +426,6 @@ drm_intel_gem_bo_reference(drm_intel_bo *bo)
427} 426}
428 427
429static void 428static void
430dri_gem_bo_reference_locked(dri_bo *bo)
431{
432 drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
433
434 bo_gem->refcount++;
435}
436
437static void
438drm_intel_gem_bo_reference_locked(drm_intel_bo *bo) 429drm_intel_gem_bo_reference_locked(drm_intel_bo *bo)
439{ 430{
440 drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo; 431 drm_intel_bo_gem *bo_gem = (drm_intel_bo_gem *)bo;
diff --git a/libdrm/radeon/Makefile.am b/libdrm/radeon/Makefile.am
deleted file mode 100644
index 39ee021f..00000000
--- a/libdrm/radeon/Makefile.am
+++ /dev/null
@@ -1,48 +0,0 @@
1# Copyright © 2008 Jérôme Glisse
2#
3# Permission is hereby granted, free of charge, to any person obtaining a
4# copy of this software and associated documentation files (the "Software"),
5# to deal in the Software without restriction, including without limitation
6# the rights to use, copy, modify, merge, publish, distribute, sublicense,
7# and/or sell copies of the Software, and to permit persons to whom the
8# Software is furnished to do so, subject to the following conditions:
9#
10# The above copyright notice and this permission notice (including the next
11# paragraph) shall be included in all copies or substantial portions of the
12# Software.
13#
14# THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15# IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16# FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17# THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18# LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19# FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
20# IN THE SOFTWARE.
21#
22# Authors:
23# Jérôme Glisse <glisse@freedesktop.org>
24
25AM_CFLAGS = \
26 $(WARN_CFLAGS) \
27 -I$(top_srcdir)/libdrm \
28 -I$(top_srcdir)/libdrm/radeon \
29 $(PTHREADSTUBS_CFLAGS) \
30 -I$(top_srcdir)/shared-core
31
32libdrm_radeon_la_LTLIBRARIES = libdrm-radeon.la
33libdrm_radeon_ladir = $(libdir)
34libdrm_radeon_la_LDFLAGS = -version-number 1:0:0 -no-undefined
35libdrm_radeon_la_LIBADD = ../libdrm.la @PTHREADSTUBS_LIBS@
36
37libdrm_radeon_la_SOURCES = \
38 radeon_bo_gem.c \
39 radeon_cs_gem.c \
40 radeon_track.c
41
42libdrm_radeonincludedir = ${includedir}/drm
43libdrm_radeoninclude_HEADERS = \
44 radeon_bo.h \
45 radeon_cs.h \
46 radeon_bo_gem.h \
47 radeon_cs_gem.h \
48 radeon_track.h
diff --git a/libdrm/radeon/radeon_bo.h b/libdrm/radeon/radeon_bo.h
deleted file mode 100644
index 44dc0901..00000000
--- a/libdrm/radeon/radeon_bo.h
+++ /dev/null
@@ -1,167 +0,0 @@
1/*
2 * Copyright © 2008 Jérôme Glisse
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors:
28 * Jérôme Glisse <glisse@freedesktop.org>
29 */
30#ifndef RADEON_BO_H
31#define RADEON_BO_H
32
33#include <stdio.h>
34#include <stdint.h>
35#include "radeon_track.h"
36
37/* bo object */
38#define RADEON_BO_FLAGS_MACRO_TILE 1
39#define RADEON_BO_FLAGS_MICRO_TILE 2
40
41struct radeon_bo_manager;
42
43struct radeon_bo {
44 uint32_t alignment;
45 uint32_t handle;
46 uint32_t size;
47 uint32_t domains;
48 uint32_t flags;
49 unsigned cref;
50#ifdef RADEON_BO_TRACK
51 struct radeon_track *track;
52#endif
53 void *ptr;
54 struct radeon_bo_manager *bom;
55};
56
57/* bo functions */
58struct radeon_bo_funcs {
59 struct radeon_bo *(*bo_open)(struct radeon_bo_manager *bom,
60 uint32_t handle,
61 uint32_t size,
62 uint32_t alignment,
63 uint32_t domains,
64 uint32_t flags);
65 void (*bo_ref)(struct radeon_bo *bo);
66 struct radeon_bo *(*bo_unref)(struct radeon_bo *bo);
67 int (*bo_map)(struct radeon_bo *bo, int write);
68 int (*bo_unmap)(struct radeon_bo *bo);
69};
70
71struct radeon_bo_manager {
72 struct radeon_bo_funcs *funcs;
73 int fd;
74 struct radeon_tracker tracker;
75};
76
77static inline void _radeon_bo_debug(struct radeon_bo *bo,
78 const char *op,
79 const char *file,
80 const char *func,
81 int line)
82{
83 fprintf(stderr, "%s %p 0x%08X 0x%08X 0x%08X [%s %s %d]\n",
84 op, bo, bo->handle, bo->size, bo->cref, file, func, line);
85}
86
87static inline struct radeon_bo *_radeon_bo_open(struct radeon_bo_manager *bom,
88 uint32_t handle,
89 uint32_t size,
90 uint32_t alignment,
91 uint32_t domains,
92 uint32_t flags,
93 const char *file,
94 const char *func,
95 int line)
96{
97 struct radeon_bo *bo;
98
99 bo = bom->funcs->bo_open(bom, handle, size, alignment, domains, flags);
100#ifdef RADEON_BO_TRACK
101 if (bo) {
102 bo->track = radeon_tracker_add_track(&bom->tracker, bo->handle);
103 radeon_track_add_event(bo->track, file, func, "open", line);
104 }
105#endif
106 return bo;
107}
108
109static inline void _radeon_bo_ref(struct radeon_bo *bo,
110 const char *file,
111 const char *func,
112 int line)
113{
114 bo->cref++;
115#ifdef RADEON_BO_TRACK
116 radeon_track_add_event(bo->track, file, func, "ref", line);
117#endif
118 bo->bom->funcs->bo_ref(bo);
119}
120
121static inline struct radeon_bo *_radeon_bo_unref(struct radeon_bo *bo,
122 const char *file,
123 const char *func,
124 int line)
125{
126 bo->cref--;
127#ifdef RADEON_BO_TRACK
128 radeon_track_add_event(bo->track, file, func, "unref", line);
129 if (bo->cref <= 0) {
130 radeon_tracker_remove_track(&bo->bom->tracker, bo->track);
131 bo->track = NULL;
132 }
133#endif
134 return bo->bom->funcs->bo_unref(bo);
135}
136
137static inline int _radeon_bo_map(struct radeon_bo *bo,
138 int write,
139 const char *file,
140 const char *func,
141 int line)
142{
143 return bo->bom->funcs->bo_map(bo, write);
144}
145
146static inline int _radeon_bo_unmap(struct radeon_bo *bo,
147 const char *file,
148 const char *func,
149 int line)
150{
151 return bo->bom->funcs->bo_unmap(bo);
152}
153
154#define radeon_bo_open(bom, h, s, a, d, f)\
155 _radeon_bo_open(bom, h, s, a, d, f, __FILE__, __FUNCTION__, __LINE__)
156#define radeon_bo_ref(bo)\
157 _radeon_bo_ref(bo, __FILE__, __FUNCTION__, __LINE__)
158#define radeon_bo_unref(bo)\
159 _radeon_bo_unref(bo, __FILE__, __FUNCTION__, __LINE__)
160#define radeon_bo_map(bo, w)\
161 _radeon_bo_map(bo, w, __FILE__, __FUNCTION__, __LINE__)
162#define radeon_bo_unmap(bo)\
163 _radeon_bo_unmap(bo, __FILE__, __FUNCTION__, __LINE__)
164#define radeon_bo_debug(bo, opcode)\
165 _radeon_bo_debug(bo, opcode, __FILE__, __FUNCTION__, __LINE__)
166
167#endif
diff --git a/libdrm/radeon/radeon_bo_gem.c b/libdrm/radeon/radeon_bo_gem.c
deleted file mode 100644
index fdf852a2..00000000
--- a/libdrm/radeon/radeon_bo_gem.c
+++ /dev/null
@@ -1,208 +0,0 @@
1/*
2 * Copyright © 2008 Dave Airlie
3 * Copyright © 2008 Jérôme Glisse
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
25 * of the Software.
26 */
27/*
28 * Authors:
29 * Dave Airlie
30 * Jérôme Glisse <glisse@freedesktop.org>
31 */
32#include <stdio.h>
33#include <stdint.h>
34#include <stdlib.h>
35#include <string.h>
36#include <sys/mman.h>
37#include <sys/ioctl.h>
38#include "xf86drm.h"
39#include "drm.h"
40#include "radeon_drm.h"
41#include "radeon_bo.h"
42#include "radeon_bo_gem.h"
43
44struct radeon_bo_gem {
45 struct radeon_bo base;
46 uint32_t name;
47 int map_count;
48};
49
50struct bo_manager_gem {
51 struct radeon_bo_manager base;
52};
53
54static struct radeon_bo *bo_open(struct radeon_bo_manager *bom,
55 uint32_t handle,
56 uint32_t size,
57 uint32_t alignment,
58 uint32_t domains,
59 uint32_t flags)
60{
61 struct radeon_bo_gem *bo;
62 int r;
63
64 bo = (struct radeon_bo_gem*)calloc(1, sizeof(struct radeon_bo_gem));
65 if (bo == NULL) {
66 return NULL;
67 }
68
69 bo->base.bom = bom;
70 bo->base.handle = 0;
71 bo->base.size = size;
72 bo->base.alignment = alignment;
73 bo->base.domains = domains;
74 bo->base.flags = flags;
75 bo->base.ptr = NULL;
76 bo->map_count = 0;
77 if (handle) {
78 struct drm_gem_open open_arg;
79
80 memset(&open_arg, 0, sizeof(open_arg));
81 open_arg.name = handle;
82 r = ioctl(bom->fd, DRM_IOCTL_GEM_OPEN, &open_arg);
83 if (r != 0) {
84 free(bo);
85 return NULL;
86 }
87 bo->base.handle = open_arg.handle;
88 bo->base.size = open_arg.size;
89 bo->name = handle;
90 } else {
91 struct drm_radeon_gem_create args;
92
93 args.size = size;
94 args.alignment = alignment;
95 args.initial_domain = bo->base.domains;
96 args.no_backing_store = 0;
97 args.handle = 0;
98 r = drmCommandWriteRead(bom->fd, DRM_RADEON_GEM_CREATE,
99 &args, sizeof(args));
100 bo->base.handle = args.handle;
101 if (r) {
102 fprintf(stderr, "Failed to allocate :\n");
103 fprintf(stderr, " size : %d bytes\n", size);
104 fprintf(stderr, " alignment : %d bytes\n", alignment);
105 fprintf(stderr, " domains : %d\n", bo->base.domains);
106 free(bo);
107 return NULL;
108 }
109 }
110 radeon_bo_ref((struct radeon_bo*)bo);
111 return (struct radeon_bo*)bo;
112}
113
114static void bo_ref(struct radeon_bo *bo)
115{
116}
117
118static struct radeon_bo *bo_unref(struct radeon_bo *bo)
119{
120 struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
121 struct drm_gem_close args;
122
123 if (bo == NULL) {
124 return NULL;
125 }
126 if (bo->cref) {
127 return bo;
128 }
129 if (bo_gem->map_count) {
130 munmap(bo->ptr, bo->size);
131 }
132
133 /* close object */
134 args.handle = bo->handle;
135 ioctl(bo->bom->fd, DRM_IOCTL_GEM_CLOSE, &args);
136 memset(bo_gem, 0, sizeof(struct radeon_bo_gem));
137 free(bo_gem);
138 return NULL;
139}
140
141static int bo_map(struct radeon_bo *bo, int write)
142{
143 struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
144 struct drm_radeon_gem_mmap args;
145 int r;
146
147 if (bo_gem->map_count++ != 0) {
148 return 0;
149 }
150 bo->ptr = NULL;
151 args.handle = bo->handle;
152 args.offset = 0;
153 args.size = (uint64_t)bo->size;
154 r = drmCommandWriteRead(bo->bom->fd,
155 DRM_RADEON_GEM_MMAP,
156 &args,
157 sizeof(args));
158 if (!r) {
159 bo->ptr = (void *)(unsigned long)args.addr_ptr;
160 } else {
161 fprintf(stderr, "error mapping %p 0x%08X (error = %d)\n",
162 bo, bo->handle, r);
163 }
164 return r;
165}
166
167static int bo_unmap(struct radeon_bo *bo)
168{
169 struct radeon_bo_gem *bo_gem = (struct radeon_bo_gem*)bo;
170
171 if (--bo_gem->map_count > 0) {
172 return 0;
173 }
174 munmap(bo->ptr, bo->size);
175 bo->ptr = NULL;
176 return 0;
177}
178
179static struct radeon_bo_funcs bo_gem_funcs = {
180 bo_open,
181 bo_ref,
182 bo_unref,
183 bo_map,
184 bo_unmap
185};
186
187struct radeon_bo_manager *radeon_bo_manager_gem_ctor(int fd)
188{
189 struct bo_manager_gem *bomg;
190
191 bomg = (struct bo_manager_gem*)calloc(1, sizeof(struct bo_manager_gem));
192 if (bomg == NULL) {
193 return NULL;
194 }
195 bomg->base.funcs = &bo_gem_funcs;
196 bomg->base.fd = fd;
197 return (struct radeon_bo_manager*)bomg;
198}
199
200void radeon_bo_manager_gem_dtor(struct radeon_bo_manager *bom)
201{
202 struct bo_manager_gem *bomg = (struct bo_manager_gem*)bom;
203
204 if (bom == NULL) {
205 return;
206 }
207 free(bomg);
208}
diff --git a/libdrm/radeon/radeon_bo_gem.h b/libdrm/radeon/radeon_bo_gem.h
deleted file mode 100644
index c0f68e6d..00000000
--- a/libdrm/radeon/radeon_bo_gem.h
+++ /dev/null
@@ -1,40 +0,0 @@
1/*
2 * Copyright © 2008 Dave Airlie
3 * Copyright © 2008 Jérôme Glisse
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
25 * of the Software.
26 */
27/*
28 * Authors:
29 * Dave Airlie
30 * Jérôme Glisse <glisse@freedesktop.org>
31 */
32#ifndef RADEON_BO_GEM_H
33#define RADEON_BO_GEM_H
34
35#include "radeon_bo.h"
36
37struct radeon_bo_manager *radeon_bo_manager_gem_ctor(int fd);
38void radeon_bo_manager_gem_dtor(struct radeon_bo_manager *bom);
39
40#endif
diff --git a/libdrm/radeon/radeon_cs.h b/libdrm/radeon/radeon_cs.h
deleted file mode 100644
index e76121ea..00000000
--- a/libdrm/radeon/radeon_cs.h
+++ /dev/null
@@ -1,168 +0,0 @@
1/*
2 * Copyright © 2008 Nicolai Haehnle
3 * Copyright © 2008 Jérôme Glisse
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
18 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
19 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors:
28 * Aapo Tahkola <aet@rasterburn.org>
29 * Nicolai Haehnle <prefect_@gmx.net>
30 * Jérôme Glisse <glisse@freedesktop.org>
31 */
32#ifndef RADEON_CS_H
33#define RADEON_CS_H
34
35#include <stdint.h>
36#include "radeon_bo.h"
37
38struct radeon_cs_reloc {
39 struct radeon_bo *bo;
40 uint32_t start_offset;
41 uint32_t end_offset;
42 uint32_t read_domain;
43 uint32_t write_domain;
44 uint32_t flags;
45};
46
47struct radeon_cs_manager;
48
49struct radeon_cs {
50 struct radeon_cs_manager *csm;
51 void *relocs;
52 uint32_t *packets;
53 unsigned crelocs;
54 unsigned relocs_total_size;
55 unsigned cdw;
56 unsigned ndw;
57 int section;
58 unsigned section_ndw;
59 unsigned section_cdw;
60 const char *section_file;
61 const char *section_func;
62 int section_line;
63};
64
65/* cs functions */
66struct radeon_cs_funcs {
67 struct radeon_cs *(*cs_create)(struct radeon_cs_manager *csm,
68 uint32_t ndw);
69 int (*cs_write_dword)(struct radeon_cs *cs, uint32_t dword);
70 int (*cs_write_reloc)(struct radeon_cs *cs,
71 struct radeon_bo *bo,
72 uint32_t start_offset,
73 uint32_t end_offset,
74 uint32_t read_domain,
75 uint32_t write_domain,
76 uint32_t flags);
77 int (*cs_begin)(struct radeon_cs *cs,
78 uint32_t ndw,
79 const char *file,
80 const char *func,
81 int line);
82 int (*cs_end)(struct radeon_cs *cs,
83 const char *file,
84 const char *func,
85 int line);
86 int (*cs_emit)(struct radeon_cs *cs);
87 int (*cs_destroy)(struct radeon_cs *cs);
88 int (*cs_erase)(struct radeon_cs *cs);
89 int (*cs_need_flush)(struct radeon_cs *cs);
90 void (*cs_print)(struct radeon_cs *cs, FILE *file);
91};
92
93struct radeon_cs_manager {
94 struct radeon_cs_funcs *funcs;
95 int fd;
96};
97
98static inline struct radeon_cs *radeon_cs_create(struct radeon_cs_manager *csm,
99 uint32_t ndw)
100{
101 return csm->funcs->cs_create(csm, ndw);
102}
103
104static inline int radeon_cs_write_dword(struct radeon_cs *cs, uint32_t dword)
105{
106 return cs->csm->funcs->cs_write_dword(cs, dword);
107}
108
109static inline int radeon_cs_write_reloc(struct radeon_cs *cs,
110 struct radeon_bo *bo,
111 uint32_t start_offset,
112 uint32_t end_offset,
113 uint32_t read_domain,
114 uint32_t write_domain,
115 uint32_t flags)
116{
117 return cs->csm->funcs->cs_write_reloc(cs,
118 bo,
119 start_offset,
120 end_offset,
121 read_domain,
122 write_domain,
123 flags);
124}
125
126static inline int radeon_cs_begin(struct radeon_cs *cs,
127 uint32_t ndw,
128 const char *file,
129 const char *func,
130 int line)
131{
132 return cs->csm->funcs->cs_begin(cs, ndw, file, func, line);
133}
134
135static inline int radeon_cs_end(struct radeon_cs *cs,
136 const char *file,
137 const char *func,
138 int line)
139{
140 return cs->csm->funcs->cs_end(cs, file, func, line);
141}
142
143static inline int radeon_cs_emit(struct radeon_cs *cs)
144{
145 return cs->csm->funcs->cs_emit(cs);
146}
147
148static inline int radeon_cs_destroy(struct radeon_cs *cs)
149{
150 return cs->csm->funcs->cs_destroy(cs);
151}
152
153static inline int radeon_cs_erase(struct radeon_cs *cs)
154{
155 return cs->csm->funcs->cs_erase(cs);
156}
157
158static inline int radeon_cs_need_flush(struct radeon_cs *cs)
159{
160 return cs->csm->funcs->cs_need_flush(cs);
161}
162
163static inline void radeon_cs_print(struct radeon_cs *cs, FILE *file)
164{
165 cs->csm->funcs->cs_print(cs, file);
166}
167
168#endif
diff --git a/libdrm/radeon/radeon_cs_gem.c b/libdrm/radeon/radeon_cs_gem.c
deleted file mode 100644
index 319d1b9e..00000000
--- a/libdrm/radeon/radeon_cs_gem.c
+++ /dev/null
@@ -1,438 +0,0 @@
1/*
2 * Copyright © 2008 Jérôme Glisse
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors:
28 * Aapo Tahkola <aet@rasterburn.org>
29 * Nicolai Haehnle <prefect_@gmx.net>
30 * Jérôme Glisse <glisse@freedesktop.org>
31 */
32#include <errno.h>
33#include <stdlib.h>
34#include <sys/mman.h>
35#include <sys/ioctl.h>
36#include "radeon_cs.h"
37#include "radeon_cs_gem.h"
38#include "radeon_bo_gem.h"
39#include "drm.h"
40#include "xf86drm.h"
41#include "radeon_drm.h"
42
43#pragma pack(1)
44struct cs_reloc_gem {
45 uint32_t handle;
46 uint32_t start_offset;
47 uint32_t end_offset;
48 uint32_t read_domain;
49 uint32_t write_domain;
50 uint32_t flags;
51};
52#pragma pack()
53
54struct cs_gem {
55 struct radeon_cs base;
56 struct drm_radeon_cs2 cs;
57 struct drm_radeon_cs_chunk chunks[2];
58 unsigned nrelocs;
59 uint32_t *relocs;
60 struct radeon_bo **relocs_bo;
61};
62
63static struct radeon_cs *cs_gem_create(struct radeon_cs_manager *csm,
64 uint32_t ndw)
65{
66 struct cs_gem *csg;
67
68 /* max cmd buffer size is 64Kb */
69 if (ndw > (64 * 1024 / 4)) {
70 return NULL;
71 }
72 csg = (struct cs_gem*)calloc(1, sizeof(struct cs_gem));
73 if (csg == NULL) {
74 return NULL;
75 }
76 csg->base.csm = csm;
77 csg->base.ndw = 64 * 1024 / 4;
78 csg->base.packets = (uint32_t*)calloc(1, 64 * 1024);
79 if (csg->base.packets == NULL) {
80 free(csg);
81 return NULL;
82 }
83 csg->base.relocs_total_size = 0;
84 csg->base.crelocs = 0;
85 csg->nrelocs = 4096 / (4 * 4) ;
86 csg->relocs_bo = (struct radeon_bo**)calloc(1,
87 csg->nrelocs*sizeof(void*));
88 if (csg->relocs_bo == NULL) {
89 free(csg->base.packets);
90 free(csg);
91 return NULL;
92 }
93 csg->base.relocs = csg->relocs = (uint32_t*)calloc(1, 4096);
94 if (csg->relocs == NULL) {
95 free(csg->relocs_bo);
96 free(csg->base.packets);
97 free(csg);
98 return NULL;
99 }
100 csg->chunks[0].chunk_id = RADEON_CHUNK_ID_IB;
101 csg->chunks[0].length_dw = 0;
102 csg->chunks[0].chunk_data = (uint64_t)(intptr_t)csg->base.packets;
103 csg->chunks[1].chunk_id = RADEON_CHUNK_ID_RELOCS;
104 csg->chunks[1].length_dw = 0;
105 csg->chunks[1].chunk_data = (uint64_t)(intptr_t)csg->relocs;
106 return (struct radeon_cs*)csg;
107}
108
109static int cs_gem_write_dword(struct radeon_cs *cs, uint32_t dword)
110{
111 struct cs_gem *csg = (struct cs_gem*)cs;
112 if (cs->cdw >= cs->ndw) {
113 uint32_t tmp, *ptr;
114 tmp = (cs->cdw + 1 + 0x3FF) & (~0x3FF);
115 ptr = (uint32_t*)realloc(cs->packets, 4 * tmp);
116 if (ptr == NULL) {
117 return -ENOMEM;
118 }
119 cs->packets = ptr;
120 cs->ndw = tmp;
121 csg->chunks[0].chunk_data = (uint64_t)(intptr_t)csg->base.packets;
122 }
123 cs->packets[cs->cdw++] = dword;
124 csg->chunks[0].length_dw += 1;
125 return 0;
126}
127
128static int cs_gem_write_reloc(struct radeon_cs *cs,
129 struct radeon_bo *bo,
130 uint32_t start_offset,
131 uint32_t end_offset,
132 uint32_t read_domain,
133 uint32_t write_domain,
134 uint32_t flags)
135{
136 struct cs_gem *csg = (struct cs_gem*)cs;
137 struct cs_reloc_gem *reloc;
138 uint32_t idx;
139 unsigned i;
140
141 /* check domains */
142 if ((read_domain && write_domain) || (!read_domain && !write_domain)) {
143 /* in one CS a bo can only be in read or write domain but not
144 * in read & write domain at the same sime
145 */
146 return -EINVAL;
147 }
148 if (read_domain == RADEON_GEM_DOMAIN_CPU) {
149 return -EINVAL;
150 }
151 if (write_domain == RADEON_GEM_DOMAIN_CPU) {
152 return -EINVAL;
153 }
154 /* check reloc window */
155 if (end_offset > bo->size) {
156 return -EINVAL;
157 }
158 if (start_offset > end_offset) {
159 return -EINVAL;
160 }
161 /* check if bo is already referenced */
162 for(i = 0; i < cs->crelocs; i++) {
163 idx = i * 6;
164 reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
165 if (reloc->handle == bo->handle) {
166 /* Check domains must be in read or write. As we check already
167 * checked that in argument one of the read or write domain was
168 * set we only need to check that if previous reloc as the read
169 * domain set then the read_domain should also be set for this
170 * new relocation.
171 */
172 if (reloc->read_domain && !read_domain) {
173 return -EINVAL;
174 }
175 if (reloc->write_domain && !write_domain) {
176 return -EINVAL;
177 }
178 reloc->read_domain |= read_domain;
179 reloc->write_domain |= write_domain;
180 /* update start and end offset */
181 if (start_offset < reloc->start_offset) {
182 reloc->start_offset = start_offset;
183 }
184 if (end_offset > reloc->end_offset) {
185 reloc->end_offset = end_offset;
186 }
187 /* update flags */
188 reloc->flags |= (flags & reloc->flags);
189 /* write relocation packet */
190 cs_gem_write_dword(cs, 0xc0001000);
191 cs_gem_write_dword(cs, idx);
192 return 0;
193 }
194 }
195 /* new relocation */
196 if (csg->base.crelocs >= csg->nrelocs) {
197 /* allocate more memory (TODO: should use a slab allocatore maybe) */
198 uint32_t *tmp, size;
199 size = ((csg->nrelocs + 1) * sizeof(struct radeon_bo*));
200 tmp = (uint32_t*)realloc(csg->relocs_bo, size);
201 if (tmp == NULL) {
202 return -ENOMEM;
203 }
204 csg->relocs_bo = (struct radeon_bo**)tmp;
205 size = ((csg->nrelocs + 1) * 6 * 4);
206 tmp = (uint32_t*)realloc(csg->relocs, size);
207 if (tmp == NULL) {
208 return -ENOMEM;
209 }
210 cs->relocs = csg->relocs = tmp;
211 csg->nrelocs += 1;
212 csg->chunks[1].chunk_data = (uint64_t)(intptr_t)csg->relocs;
213 }
214 csg->relocs_bo[csg->base.crelocs] = bo;
215 idx = (csg->base.crelocs++) * 6;
216 reloc = (struct cs_reloc_gem*)&csg->relocs[idx];
217 reloc->handle = bo->handle;
218 reloc->start_offset = start_offset;
219 reloc->end_offset = end_offset;
220 reloc->read_domain = read_domain;
221 reloc->write_domain = write_domain;
222 reloc->flags = flags;
223 csg->chunks[1].length_dw += 6;
224 radeon_bo_ref(bo);
225 cs->relocs_total_size += bo->size;
226 cs_gem_write_dword(cs, 0xc0001000);
227 cs_gem_write_dword(cs, idx);
228 return 0;
229}
230
231static int cs_gem_begin(struct radeon_cs *cs,
232 uint32_t ndw,
233 const char *file,
234 const char *func,
235 int line)
236{
237 return 0;
238}
239
240static int cs_gem_end(struct radeon_cs *cs,
241 const char *file,
242 const char *func,
243 int line)
244
245{
246 cs->section = 0;
247 return 0;
248}
249
250static int cs_gem_emit(struct radeon_cs *cs)
251{
252 struct cs_gem *csg = (struct cs_gem*)cs;
253 uint64_t chunk_array[2];
254 unsigned i;
255 int r;
256
257 csg->chunks[0].length_dw = cs->cdw;
258
259 chunk_array[0] = (uint64_t)(intptr_t)&csg->chunks[0];
260 chunk_array[1] = (uint64_t)(intptr_t)&csg->chunks[1];
261
262 csg->cs.num_chunks = 2;
263 csg->cs.chunks = (uint64_t)(intptr_t)chunk_array;
264
265 r = drmCommandWriteRead(cs->csm->fd, DRM_RADEON_CS2,
266 &csg->cs, sizeof(struct drm_radeon_cs2));
267 for (i = 0; i < csg->base.crelocs; i++) {
268 radeon_bo_unref(csg->relocs_bo[i]);
269 csg->relocs_bo[i] = NULL;
270 }
271 return r;
272}
273
274static int cs_gem_destroy(struct radeon_cs *cs)
275{
276 struct cs_gem *csg = (struct cs_gem*)cs;
277
278 free(csg->relocs_bo);
279 free(cs->relocs);
280 free(cs->packets);
281 free(cs);
282 return 0;
283}
284
285static int cs_gem_erase(struct radeon_cs *cs)
286{
287 struct cs_gem *csg = (struct cs_gem*)cs;
288 unsigned i;
289
290 if (csg->relocs_bo) {
291 for (i = 0; i < csg->base.crelocs; i++) {
292 if (csg->relocs_bo[i]) {
293 radeon_bo_unref(csg->relocs_bo[i]);
294 csg->relocs_bo[i] = NULL;
295 }
296 }
297 }
298 cs->relocs_total_size = 0;
299 cs->cdw = 0;
300 cs->section = 0;
301 cs->crelocs = 0;
302 csg->chunks[0].length_dw = 0;
303 csg->chunks[1].length_dw = 0;
304 return 0;
305}
306
307static int cs_gem_need_flush(struct radeon_cs *cs)
308{
309 return (cs->relocs_total_size > (32*1024*1024));
310}
311
312#define PACKET_TYPE0 0
313#define PACKET_TYPE1 1
314#define PACKET_TYPE2 2
315#define PACKET_TYPE3 3
316
317#define PACKET3_NOP 0x10
318#define PACKET3_SET_SCISSORS 0x1E
319#define PACKET3_3D_DRAW_VBUF 0x28
320#define PACKET3_3D_DRAW_IMMD 0x29
321#define PACKET3_3D_DRAW_INDX 0x2A
322#define PACKET3_3D_LOAD_VBPNTR 0x2F
323#define PACKET3_INDX_BUFFER 0x33
324#define PACKET3_3D_DRAW_VBUF_2 0x34
325#define PACKET3_3D_DRAW_IMMD_2 0x35
326#define PACKET3_3D_DRAW_INDX_2 0x36
327
328#define CP_PACKET_GET_TYPE(h) (((h) >> 30) & 3)
329#define CP_PACKET_GET_COUNT(h) (((h) >> 16) & 0x3FFF)
330#define CP_PACKET0_GET_REG(h) (((h) & 0x1FFF) << 2)
331#define CP_PACKET0_GET_ONE_REG_WR(h) (((h) >> 15) & 1)
332#define CP_PACKET3_GET_OPCODE(h) (((h) >> 8) & 0xFF)
333
334static void cs_gem_print(struct radeon_cs *cs, FILE *file)
335{
336 unsigned opcode;
337 unsigned reg;
338 unsigned cnt;
339 int i, j;
340
341 for (i = 0; i < cs->cdw;) {
342 cnt = CP_PACKET_GET_COUNT(cs->packets[i]);
343 switch (CP_PACKET_GET_TYPE(cs->packets[i])) {
344 case PACKET_TYPE0:
345 fprintf(file, "Pkt0 at %d (%d dwords):\n", i, cnt + 1);
346 reg = CP_PACKET0_GET_REG(cs->packets[i]);
347 if (CP_PACKET0_GET_ONE_REG_WR(cs->packets[i++])) {
348 for (j = 0; j <= cnt; j++) {
349 fprintf(file, " 0x%08X -> 0x%04X\n",
350 cs->packets[i++], reg);
351 }
352 } else {
353 for (j = 0; j <= cnt; j++) {
354 fprintf(file, " 0x%08X -> 0x%04X\n",
355 cs->packets[i++], reg);
356 reg += 4;
357 }
358 }
359 break;
360 case PACKET_TYPE3:
361 fprintf(file, "Pkt3 at %d :\n", i);
362 opcode = CP_PACKET3_GET_OPCODE(cs->packets[i++]);
363 switch (opcode) {
364 case PACKET3_NOP:
365 fprintf(file, " PACKET3_NOP:\n");
366 break;
367 case PACKET3_3D_DRAW_VBUF:
368 fprintf(file, " PACKET3_3D_DRAW_VBUF:\n");
369 break;
370 case PACKET3_3D_DRAW_IMMD:
371 fprintf(file, " PACKET3_3D_DRAW_IMMD:\n");
372 break;
373 case PACKET3_3D_DRAW_INDX:
374 fprintf(file, " PACKET3_3D_DRAW_INDX:\n");
375 break;
376 case PACKET3_3D_LOAD_VBPNTR:
377 fprintf(file, " PACKET3_3D_LOAD_VBPNTR:\n");
378 break;
379 case PACKET3_INDX_BUFFER:
380 fprintf(file, " PACKET3_INDX_BUFFER:\n");
381 break;
382 case PACKET3_3D_DRAW_VBUF_2:
383 fprintf(file, " PACKET3_3D_DRAW_VBUF_2:\n");
384 break;
385 case PACKET3_3D_DRAW_IMMD_2:
386 fprintf(file, " PACKET3_3D_DRAW_IMMD_2:\n");
387 break;
388 case PACKET3_3D_DRAW_INDX_2:
389 fprintf(file, " PACKET3_3D_DRAW_INDX_2:\n");
390 break;
391 default:
392 fprintf(file, "Unknow opcode 0x%02X at %d\n", opcode, i);
393 return;
394 }
395 for (j = 0; j <= cnt; j++) {
396 fprintf(file, " 0x%08X\n", cs->packets[i++]);
397 }
398 break;
399 case PACKET_TYPE1:
400 case PACKET_TYPE2:
401 default:
402 fprintf(file, "Unknow packet 0x%08X at %d\n", cs->packets[i], i);
403 return;
404 }
405 }
406}
407
408static struct radeon_cs_funcs radeon_cs_gem_funcs = {
409 cs_gem_create,
410 cs_gem_write_dword,
411 cs_gem_write_reloc,
412 cs_gem_begin,
413 cs_gem_end,
414 cs_gem_emit,
415 cs_gem_destroy,
416 cs_gem_erase,
417 cs_gem_need_flush,
418 cs_gem_print
419};
420
421struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd)
422{
423 struct radeon_cs_manager *csm;
424
425 csm = (struct radeon_cs_manager*)calloc(1,
426 sizeof(struct radeon_cs_manager));
427 if (csm == NULL) {
428 return NULL;
429 }
430 csm->funcs = &radeon_cs_gem_funcs;
431 csm->fd = fd;
432 return csm;
433}
434
435void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm)
436{
437 free(csm);
438}
diff --git a/libdrm/radeon/radeon_cs_gem.h b/libdrm/radeon/radeon_cs_gem.h
deleted file mode 100644
index 5efd146f..00000000
--- a/libdrm/radeon/radeon_cs_gem.h
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * Copyright © 2008 Nicolai Haehnle
3 * Copyright © 2008 Jérôme Glisse
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining
7 * a copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
15 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
16 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
17 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
18 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE.
22 *
23 * The above copyright notice and this permission notice (including the
24 * next paragraph) shall be included in all copies or substantial portions
25 * of the Software.
26 */
27/*
28 * Authors:
29 * Aapo Tahkola <aet@rasterburn.org>
30 * Nicolai Haehnle <prefect_@gmx.net>
31 * Jérôme Glisse <glisse@freedesktop.org>
32 */
33#ifndef RADEON_CS_GEM_H
34#define RADEON_CS_GEM_H
35
36#include "radeon_cs.h"
37
38struct radeon_cs_manager *radeon_cs_manager_gem_ctor(int fd);
39void radeon_cs_manager_gem_dtor(struct radeon_cs_manager *csm);
40
41#endif
diff --git a/libdrm/radeon/radeon_track.c b/libdrm/radeon/radeon_track.c
deleted file mode 100644
index 1623906f..00000000
--- a/libdrm/radeon/radeon_track.c
+++ /dev/null
@@ -1,140 +0,0 @@
1/*
2 * Copyright © 2008 Jérôme Glisse
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors:
28 * Jérôme Glisse <glisse@freedesktop.org>
29 */
30#include <stdio.h>
31#include <stdlib.h>
32#include <string.h>
33#include "radeon_track.h"
34
35void radeon_track_add_event(struct radeon_track *track,
36 const char *file,
37 const char *func,
38 const char *op,
39 unsigned line)
40{
41 struct radeon_track_event *event;
42
43 if (track == NULL) {
44 return;
45 }
46 event = (void*)calloc(1,sizeof(struct radeon_track_event));
47 if (event == NULL) {
48 return;
49 }
50 event->line = line;
51 event->file = strdup(file);
52 event->func = strdup(func);
53 event->op = strdup(op);
54 if (event->file == NULL || event->func == NULL || event->op == NULL) {
55 free(event->file);
56 free(event->func);
57 free(event->op);
58 free(event);
59 return;
60 }
61 event->next = track->events;
62 track->events = event;
63}
64
65struct radeon_track *radeon_tracker_add_track(struct radeon_tracker *tracker,
66 unsigned key)
67{
68 struct radeon_track *track;
69
70 track = (struct radeon_track*)calloc(1, sizeof(struct radeon_track));
71 if (track) {
72 track->next = tracker->tracks.next;
73 track->prev = &tracker->tracks;
74 tracker->tracks.next = track;
75 if (track->next) {
76 track->next->prev = track;
77 }
78 track->key = key;
79 track->events = NULL;
80 }
81 return track;
82}
83
84void radeon_tracker_remove_track(struct radeon_tracker *tracker,
85 struct radeon_track *track)
86{
87 struct radeon_track_event *event;
88 void *tmp;
89
90 if (track == NULL) {
91 return;
92 }
93 track->prev->next = track->next;
94 if (track->next) {
95 track->next->prev = track->prev;
96 }
97 track->next = track->prev = NULL;
98 event = track->events;
99 while (event) {
100 tmp = event;
101 free(event->file);
102 free(event->func);
103 free(event->op);
104 event = event->next;
105 free(tmp);
106 }
107 track->events = NULL;
108 free(track);
109}
110
111void radeon_tracker_print(struct radeon_tracker *tracker, FILE *file)
112{
113 struct radeon_track *track;
114 struct radeon_track_event *event;
115 void *tmp;
116
117 track = tracker->tracks.next;
118 while (track) {
119 event = track->events;
120 fprintf(file, "[0x%08X] :\n", track->key);
121 while (event) {
122 tmp = event;
123 fprintf(file, " [0x%08X:%s](%s:%s:%d)\n",
124 track->key, event->op, event->file,
125 event->func, event->line);
126 free(event->file);
127 free(event->func);
128 free(event->op);
129 event->file = NULL;
130 event->func = NULL;
131 event->op = NULL;
132 event = event->next;
133 free(tmp);
134 }
135 track->events = NULL;
136 tmp = track;
137 track = track->next;
138 free(tmp);
139 }
140}
diff --git a/libdrm/radeon/radeon_track.h b/libdrm/radeon/radeon_track.h
deleted file mode 100644
index 838d1f38..00000000
--- a/libdrm/radeon/radeon_track.h
+++ /dev/null
@@ -1,64 +0,0 @@
1/*
2 * Copyright © 2008 Jérôme Glisse
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26/*
27 * Authors:
28 * Jérôme Glisse <glisse@freedesktop.org>
29 */
30#ifndef RADEON_TRACK_H
31#define RADEON_TRACK_H
32
33struct radeon_track_event {
34 struct radeon_track_event *next;
35 char *file;
36 char *func;
37 char *op;
38 unsigned line;
39};
40
41struct radeon_track {
42 struct radeon_track *next;
43 struct radeon_track *prev;
44 unsigned key;
45 struct radeon_track_event *events;
46};
47
48struct radeon_tracker {
49 struct radeon_track tracks;
50};
51
52void radeon_track_add_event(struct radeon_track *track,
53 const char *file,
54 const char *func,
55 const char *op,
56 unsigned line);
57struct radeon_track *radeon_tracker_add_track(struct radeon_tracker *tracker,
58 unsigned key);
59void radeon_tracker_remove_track(struct radeon_tracker *tracker,
60 struct radeon_track *track);
61void radeon_tracker_print(struct radeon_tracker *tracker,
62 FILE *file);
63
64#endif
diff --git a/libdrm/xf86drm.c b/libdrm/xf86drm.c
index 94f5dfad..c36f1964 100644
--- a/libdrm/xf86drm.c
+++ b/libdrm/xf86drm.c
@@ -87,9 +87,6 @@
87 87
88#define DRM_MSG_VERBOSITY 3 88#define DRM_MSG_VERBOSITY 3
89 89
90#define DRM_NODE_CONTROL 0
91#define DRM_NODE_RENDER 1
92
93static drmServerInfoPtr drm_server_info; 90static drmServerInfoPtr drm_server_info;
94 91
95void drmSetServerInfo(drmServerInfoPtr info) 92void drmSetServerInfo(drmServerInfoPtr info)
@@ -280,7 +277,7 @@ static int drmMatchBusID(const char *id1, const char *id2)
280 * special file node with the major and minor numbers specified by \p dev and 277 * special file node with the major and minor numbers specified by \p dev and
281 * parent directory if necessary and was called by root. 278 * parent directory if necessary and was called by root.
282 */ 279 */
283static int drmOpenDevice(long dev, int minor, int type) 280static int drmOpenDevice(long dev, int minor)
284{ 281{
285 stat_t st; 282 stat_t st;
286 char buf[64]; 283 char buf[64];
@@ -290,7 +287,7 @@ static int drmOpenDevice(long dev, int minor, int type)
290 uid_t user = DRM_DEV_UID; 287 uid_t user = DRM_DEV_UID;
291 gid_t group = DRM_DEV_GID, serv_group; 288 gid_t group = DRM_DEV_GID, serv_group;
292 289
293 sprintf(buf, type ? DRM_DEV_NAME : DRM_CONTROL_DEV_NAME, DRM_DIR_NAME, minor); 290 sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
294 drmMsg("drmOpenDevice: node name is %s\n", buf); 291 drmMsg("drmOpenDevice: node name is %s\n", buf);
295 292
296 if (drm_server_info) { 293 if (drm_server_info) {
@@ -389,15 +386,15 @@ wait_for_udev:
389 * Calls drmOpenDevice() if \p create is set, otherwise assembles the device 386 * Calls drmOpenDevice() if \p create is set, otherwise assembles the device
390 * name from \p minor and opens it. 387 * name from \p minor and opens it.
391 */ 388 */
392static int drmOpenMinor(int minor, int create, int type) 389static int drmOpenMinor(int minor, int create)
393{ 390{
394 int fd; 391 int fd;
395 char buf[64]; 392 char buf[64];
396 393
397 if (create) 394 if (create)
398 return drmOpenDevice(makedev(DRM_MAJOR, minor), minor, type); 395 return drmOpenDevice(makedev(DRM_MAJOR, minor), minor);
399 396
400 sprintf(buf, type ? DRM_DEV_NAME : DRM_CONTROL_DEV_NAME, DRM_DIR_NAME, minor); 397 sprintf(buf, DRM_DEV_NAME, DRM_DIR_NAME, minor);
401 if ((fd = open(buf, O_RDWR, 0)) >= 0) 398 if ((fd = open(buf, O_RDWR, 0)) >= 0)
402 return fd; 399 return fd;
403 return -errno; 400 return -errno;
@@ -420,7 +417,7 @@ int drmAvailable(void)
420 int retval = 0; 417 int retval = 0;
421 int fd; 418 int fd;
422 419
423 if ((fd = drmOpenMinor(0, 1, DRM_NODE_RENDER)) < 0) { 420 if ((fd = drmOpenMinor(0, 1)) < 0) {
424#ifdef __linux__ 421#ifdef __linux__
425 /* Try proc for backward Linux compatibility */ 422 /* Try proc for backward Linux compatibility */
426 if (!access("/proc/dri/0", R_OK)) 423 if (!access("/proc/dri/0", R_OK))
@@ -461,7 +458,7 @@ static int drmOpenByBusid(const char *busid)
461 458
462 drmMsg("drmOpenByBusid: Searching for BusID %s\n", busid); 459 drmMsg("drmOpenByBusid: Searching for BusID %s\n", busid);
463 for (i = 0; i < DRM_MAX_MINOR; i++) { 460 for (i = 0; i < DRM_MAX_MINOR; i++) {
464 fd = drmOpenMinor(i, 1, DRM_NODE_RENDER); 461 fd = drmOpenMinor(i, 1);
465 drmMsg("drmOpenByBusid: drmOpenMinor returns %d\n", fd); 462 drmMsg("drmOpenByBusid: drmOpenMinor returns %d\n", fd);
466 if (fd >= 0) { 463 if (fd >= 0) {
467 sv.drm_di_major = 1; 464 sv.drm_di_major = 1;
@@ -523,7 +520,7 @@ static int drmOpenByName(const char *name)
523 * already in use. If it's in use it will have a busid assigned already. 520 * already in use. If it's in use it will have a busid assigned already.
524 */ 521 */
525 for (i = 0; i < DRM_MAX_MINOR; i++) { 522 for (i = 0; i < DRM_MAX_MINOR; i++) {
526 if ((fd = drmOpenMinor(i, 1, DRM_NODE_RENDER)) >= 0) { 523 if ((fd = drmOpenMinor(i, 1)) >= 0) {
527 if ((version = drmGetVersion(fd))) { 524 if ((version = drmGetVersion(fd))) {
528 if (!strcmp(version->name, name)) { 525 if (!strcmp(version->name, name)) {
529 drmFreeVersion(version); 526 drmFreeVersion(version);
@@ -567,7 +564,7 @@ static int drmOpenByName(const char *name)
567 if (*pt) { /* Found busid */ 564 if (*pt) { /* Found busid */
568 return drmOpenByBusid(++pt); 565 return drmOpenByBusid(++pt);
569 } else { /* No busid */ 566 } else { /* No busid */
570 return drmOpenDevice(strtol(devstring, NULL, 0),i, DRM_NODE_RENDER); 567 return drmOpenDevice(strtol(devstring, NULL, 0),i);
571 } 568 }
572 } 569 }
573 } 570 }
@@ -617,10 +614,6 @@ int drmOpen(const char *name, const char *busid)
617 return -1; 614 return -1;
618} 615}
619 616
620int drmOpenControl(int minor)
621{
622 return drmOpenMinor(minor, 0, DRM_NODE_CONTROL);
623}
624 617
625/** 618/**
626 * Free the version information returned by drmGetVersion(). 619 * Free the version information returned by drmGetVersion().
@@ -2441,20 +2434,3 @@ void drmCloseOnce(int fd)
2441 } 2434 }
2442 } 2435 }
2443} 2436}
2444
2445int drmSetMaster(int fd)
2446{
2447 int ret;
2448
2449 fprintf(stderr,"Setting master \n");
2450 ret = ioctl(fd, DRM_IOCTL_SET_MASTER, 0);
2451 return ret;
2452}
2453
2454int drmDropMaster(int fd)
2455{
2456 int ret;
2457 fprintf(stderr,"Dropping master \n");
2458 ret = ioctl(fd, DRM_IOCTL_DROP_MASTER, 0);
2459 return ret;
2460}
diff --git a/libdrm/xf86drm.h b/libdrm/xf86drm.h
index 584d2a41..f4fa71b0 100644
--- a/libdrm/xf86drm.h
+++ b/libdrm/xf86drm.h
@@ -49,7 +49,6 @@
49 49
50#define DRM_DIR_NAME "/dev/dri" 50#define DRM_DIR_NAME "/dev/dri"
51#define DRM_DEV_NAME "%s/card%d" 51#define DRM_DEV_NAME "%s/card%d"
52#define DRM_CONTROL_DEV_NAME "%s/controlD%d"
53#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */ 52#define DRM_PROC_NAME "/proc/dri/" /* For backward Linux compatibility */
54 53
55#define DRM_ERR_NO_DEVICE (-1001) 54#define DRM_ERR_NO_DEVICE (-1001)
@@ -509,7 +508,6 @@ do { register unsigned int __old __asm("o0"); \
509/* General user-level programmer's API: unprivileged */ 508/* General user-level programmer's API: unprivileged */
510extern int drmAvailable(void); 509extern int drmAvailable(void);
511extern int drmOpen(const char *name, const char *busid); 510extern int drmOpen(const char *name, const char *busid);
512extern int drmOpenControl(int minor);
513extern int drmClose(int fd); 511extern int drmClose(int fd);
514extern drmVersionPtr drmGetVersion(int fd); 512extern drmVersionPtr drmGetVersion(int fd);
515extern drmVersionPtr drmGetLibVersion(int fd); 513extern drmVersionPtr drmGetLibVersion(int fd);
@@ -661,7 +659,4 @@ extern int drmOpenOnce(void *unused, const char *BusID, int *newlyopened);
661extern void drmCloseOnce(int fd); 659extern void drmCloseOnce(int fd);
662extern void drmMsg(const char *format, ...); 660extern void drmMsg(const char *format, ...);
663 661
664extern int drmSetMaster(int fd);
665extern int drmDropMaster(int fd);
666
667#endif 662#endif
diff --git a/libdrm/xf86drmMode.c b/libdrm/xf86drmMode.c
deleted file mode 100644
index a0a164de..00000000
--- a/libdrm/xf86drmMode.c
+++ /dev/null
@@ -1,684 +0,0 @@
1/*
2 * \file xf86drmMode.c
3 * Header for DRM modesetting interface.
4 *
5 * \author Jakob Bornecrantz <wallbraker@gmail.com>
6 *
7 * \par Acknowledgements:
8 * Feb 2007, Dave Airlie <airlied@linux.ie>
9 */
10
11/*
12 * Copyright (c) <year> <copyright holders>
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
20 *
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 * IN THE SOFTWARE.
31 *
32 */
33
34/*
35 * TODO the types we are after are defined in diffrent headers on diffrent
36 * platforms find which headers to include to get uint32_t
37 */
38#include <stdint.h>
39#include <sys/ioctl.h>
40#include <stdio.h>
41
42#include "xf86drmMode.h"
43#include "xf86drm.h"
44#include <drm.h>
45#include <string.h>
46#include <dirent.h>
47#include <errno.h>
48
49#define U642VOID(x) ((void *)(unsigned long)(x))
50#define VOID2U64(x) ((uint64_t)(unsigned long)(x))
51
52/*
53 * Util functions
54 */
55
56void* drmAllocCpy(void *array, int count, int entry_size)
57{
58 char *r;
59 int i;
60
61 if (!count || !array || !entry_size)
62 return 0;
63
64 if (!(r = drmMalloc(count*entry_size)))
65 return 0;
66
67 for (i = 0; i < count; i++)
68 memcpy(r+(entry_size*i), array+(entry_size*i), entry_size);
69
70 return r;
71}
72
73/*
74 * A couple of free functions.
75 */
76
77void drmModeFreeModeInfo(struct drm_mode_modeinfo *ptr)
78{
79 if (!ptr)
80 return;
81
82 drmFree(ptr);
83}
84
85void drmModeFreeResources(drmModeResPtr ptr)
86{
87 if (!ptr)
88 return;
89
90 drmFree(ptr);
91
92}
93
94void drmModeFreeFB(drmModeFBPtr ptr)
95{
96 if (!ptr)
97 return;
98
99 /* we might add more frees later. */
100 drmFree(ptr);
101}
102
103void drmModeFreeCrtc(drmModeCrtcPtr ptr)
104{
105 if (!ptr)
106 return;
107
108 drmFree(ptr);
109
110}
111
112void drmModeFreeConnector(drmModeConnectorPtr ptr)
113{
114 if (!ptr)
115 return;
116
117 drmFree(ptr->modes);
118 drmFree(ptr);
119
120}
121
122void drmModeFreeEncoder(drmModeEncoderPtr ptr)
123{
124 drmFree(ptr);
125}
126
127/*
128 * ModeSetting functions.
129 */
130
131drmModeResPtr drmModeGetResources(int fd)
132{
133 struct drm_mode_card_res res;
134 drmModeResPtr r = 0;
135
136 memset(&res, 0, sizeof(struct drm_mode_card_res));
137
138 if (ioctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res))
139 return 0;
140
141 if (res.count_fbs)
142 res.fb_id_ptr = VOID2U64(drmMalloc(res.count_fbs*sizeof(uint32_t)));
143 if (res.count_crtcs)
144 res.crtc_id_ptr = VOID2U64(drmMalloc(res.count_crtcs*sizeof(uint32_t)));
145 if (res.count_connectors)
146 res.connector_id_ptr = VOID2U64(drmMalloc(res.count_connectors*sizeof(uint32_t)));
147 if (res.count_encoders)
148 res.encoder_id_ptr = VOID2U64(drmMalloc(res.count_encoders*sizeof(uint32_t)));
149
150 if (ioctl(fd, DRM_IOCTL_MODE_GETRESOURCES, &res)) {
151 r = NULL;
152 goto err_allocs;
153 }
154
155 /*
156 * return
157 */
158
159
160 if (!(r = drmMalloc(sizeof(*r))))
161 return 0;
162
163 r->min_width = res.min_width;
164 r->max_width = res.max_width;
165 r->min_height = res.min_height;
166 r->max_height = res.max_height;
167 r->count_fbs = res.count_fbs;
168 r->count_crtcs = res.count_crtcs;
169 r->count_connectors = res.count_connectors;
170 r->count_encoders = res.count_encoders;
171 /* TODO we realy should test if these allocs fails. */
172 r->fbs = drmAllocCpy(U642VOID(res.fb_id_ptr), res.count_fbs, sizeof(uint32_t));
173 r->crtcs = drmAllocCpy(U642VOID(res.crtc_id_ptr), res.count_crtcs, sizeof(uint32_t));
174 r->connectors = drmAllocCpy(U642VOID(res.connector_id_ptr), res.count_connectors, sizeof(uint32_t));
175 r->encoders = drmAllocCpy(U642VOID(res.encoder_id_ptr), res.count_encoders, sizeof(uint32_t));
176
177err_allocs:
178 drmFree(U642VOID(res.fb_id_ptr));
179 drmFree(U642VOID(res.crtc_id_ptr));
180 drmFree(U642VOID(res.connector_id_ptr));
181 drmFree(U642VOID(res.encoder_id_ptr));
182
183 return r;
184}
185
186int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth,
187 uint8_t bpp, uint32_t pitch, uint32_t bo_handle,
188 uint32_t *buf_id)
189{
190 struct drm_mode_fb_cmd f;
191 int ret;
192
193 f.width = width;
194 f.height = height;
195 f.pitch = pitch;
196 f.bpp = bpp;
197 f.depth = depth;
198 f.handle = bo_handle;
199
200 if ((ret = ioctl(fd, DRM_IOCTL_MODE_ADDFB, &f)))
201 return ret;
202
203 *buf_id = f.fb_id;
204 return 0;
205}
206
207int drmModeRmFB(int fd, uint32_t bufferId)
208{
209 return ioctl(fd, DRM_IOCTL_MODE_RMFB, &bufferId);
210
211
212}
213
214drmModeFBPtr drmModeGetFB(int fd, uint32_t buf)
215{
216 struct drm_mode_fb_cmd info;
217 drmModeFBPtr r;
218
219 info.fb_id = buf;
220
221 if (ioctl(fd, DRM_IOCTL_MODE_GETFB, &info))
222 return NULL;
223
224 if (!(r = drmMalloc(sizeof(*r))))
225 return NULL;
226
227 r->fb_id = info.fb_id;
228 r->width = info.width;
229 r->height = info.height;
230 r->pitch = info.pitch;
231 r->bpp = info.bpp;
232 r->handle = info.handle;
233 r->depth = info.depth;
234
235 return r;
236}
237
238
239/*
240 * Crtc functions
241 */
242
243drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId)
244{
245 struct drm_mode_crtc crtc;
246 drmModeCrtcPtr r;
247
248 crtc.crtc_id = crtcId;
249
250 if (ioctl(fd, DRM_IOCTL_MODE_GETCRTC, &crtc))
251 return 0;
252
253 /*
254 * return
255 */
256
257 if (!(r = drmMalloc(sizeof(*r))))
258 return 0;
259
260 r->crtc_id = crtc.crtc_id;
261 r->x = crtc.x;
262 r->y = crtc.y;
263 r->mode_valid = crtc.mode_valid;
264 if (r->mode_valid)
265 memcpy(&r->mode, &crtc.mode, sizeof(struct drm_mode_modeinfo));
266 r->buffer_id = crtc.fb_id;
267 r->gamma_size = crtc.gamma_size;
268 return r;
269}
270
271
272int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId,
273 uint32_t x, uint32_t y, uint32_t *connectors, int count,
274 struct drm_mode_modeinfo *mode)
275{
276 struct drm_mode_crtc crtc;
277
278 crtc.x = x;
279 crtc.y = y;
280 crtc.crtc_id = crtcId;
281 crtc.fb_id = bufferId;
282 crtc.set_connectors_ptr = VOID2U64(connectors);
283 crtc.count_connectors = count;
284 if (mode) {
285 memcpy(&crtc.mode, mode, sizeof(struct drm_mode_modeinfo));
286 crtc.mode_valid = 1;
287 } else
288 crtc.mode_valid = 0;
289
290 return ioctl(fd, DRM_IOCTL_MODE_SETCRTC, &crtc);
291}
292
293/*
294 * Cursor manipulation
295 */
296
297int drmModeSetCursor(int fd, uint32_t crtcId, uint32_t bo_handle, uint32_t width, uint32_t height)
298{
299 struct drm_mode_cursor arg;
300
301 arg.flags = DRM_MODE_CURSOR_BO;
302 arg.crtc_id = crtcId;
303 arg.width = width;
304 arg.height = height;
305 arg.handle = bo_handle;
306
307 return ioctl(fd, DRM_IOCTL_MODE_CURSOR, &arg);
308}
309
310int drmModeMoveCursor(int fd, uint32_t crtcId, int x, int y)
311{
312 struct drm_mode_cursor arg;
313
314 arg.flags = DRM_MODE_CURSOR_MOVE;
315 arg.crtc_id = crtcId;
316 arg.x = x;
317 arg.y = y;
318
319 return ioctl(fd, DRM_IOCTL_MODE_CURSOR, &arg);
320}
321
322/*
323 * Encoder get
324 */
325drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id)
326{
327 struct drm_mode_get_encoder enc;
328 drmModeEncoderPtr r = NULL;
329
330 enc.encoder_id = encoder_id;
331 enc.encoder_type = 0;
332 enc.possible_crtcs = 0;
333 enc.possible_clones = 0;
334
335 if (ioctl(fd, DRM_IOCTL_MODE_GETENCODER, &enc))
336 return 0;
337
338 if (!(r = drmMalloc(sizeof(*r))))
339 return 0;
340
341 r->encoder_id = enc.encoder_id;
342 r->crtc_id = enc.crtc_id;
343 r->encoder_type = enc.encoder_type;
344 r->possible_crtcs = enc.possible_crtcs;
345 r->possible_clones = enc.possible_clones;
346
347 return r;
348}
349
350/*
351 * Connector manipulation
352 */
353
354drmModeConnectorPtr drmModeGetConnector(int fd, uint32_t connector_id)
355{
356 struct drm_mode_get_connector conn;
357 drmModeConnectorPtr r = NULL;
358
359 conn.connector_id = connector_id;
360 conn.connector_type_id = 0;
361 conn.connector_type = 0;
362 conn.count_modes = 0;
363 conn.modes_ptr = 0;
364 conn.count_props = 0;
365 conn.props_ptr = 0;
366 conn.prop_values_ptr = 0;
367 conn.count_encoders = 0;
368 conn.encoders_ptr = 0;
369
370 if (ioctl(fd, DRM_IOCTL_MODE_GETCONNECTOR, &conn))
371 return 0;
372
373 if (conn.count_props) {
374 conn.props_ptr = VOID2U64(drmMalloc(conn.count_props*sizeof(uint32_t)));
375 conn.prop_values_ptr = VOID2U64(drmMalloc(conn.count_props*sizeof(uint64_t)));
376 }
377
378 if (conn.count_modes)
379 conn.modes_ptr = VOID2U64(drmMalloc(conn.count_modes*sizeof(struct drm_mode_modeinfo)));
380
381 if (conn.count_encoders)
382 conn.encoders_ptr = VOID2U64(drmMalloc(conn.count_encoders*sizeof(uint32_t)));
383
384 if (ioctl(fd, DRM_IOCTL_MODE_GETCONNECTOR, &conn))
385 goto err_allocs;
386
387 if(!(r = drmMalloc(sizeof(*r)))) {
388 goto err_allocs;
389 }
390
391 r->connector_id = conn.connector_id;
392 r->encoder_id = conn.encoder_id;
393 r->connection = conn.connection;
394 r->mmWidth = conn.mm_width;
395 r->mmHeight = conn.mm_height;
396 r->subpixel = conn.subpixel;
397 r->count_modes = conn.count_modes;
398 /* TODO we should test if these alloc & cpy fails. */
399 r->count_props = conn.count_props;
400 r->props = drmAllocCpy(U642VOID(conn.props_ptr), conn.count_props, sizeof(uint32_t));
401 r->prop_values = drmAllocCpy(U642VOID(conn.prop_values_ptr), conn.count_props, sizeof(uint64_t));
402 r->modes = drmAllocCpy(U642VOID(conn.modes_ptr), conn.count_modes, sizeof(struct drm_mode_modeinfo));
403 r->count_encoders = conn.count_encoders;
404 r->encoders = drmAllocCpy(U642VOID(conn.encoders_ptr), conn.count_encoders, sizeof(uint32_t));
405 r->connector_type = conn.connector_type;
406 r->connector_type_id = conn.connector_type_id;
407
408 if (!r->props || !r->prop_values || !r->modes || !r->encoders)
409 goto err_allocs;
410
411err_allocs:
412 drmFree(U642VOID(conn.prop_values_ptr));
413 drmFree(U642VOID(conn.props_ptr));
414 drmFree(U642VOID(conn.modes_ptr));
415 drmFree(U642VOID(conn.encoders_ptr));
416
417 return r;
418}
419
420int drmModeAttachMode(int fd, uint32_t connector_id, struct drm_mode_modeinfo *mode_info)
421{
422 struct drm_mode_mode_cmd res;
423
424 memcpy(&res.mode, mode_info, sizeof(struct drm_mode_modeinfo));
425 res.connector_id = connector_id;
426
427 return ioctl(fd, DRM_IOCTL_MODE_ATTACHMODE, &res);
428}
429
430int drmModeDetachMode(int fd, uint32_t connector_id, struct drm_mode_modeinfo *mode_info)
431{
432 struct drm_mode_mode_cmd res;
433
434 memcpy(&res.mode, mode_info, sizeof(struct drm_mode_modeinfo));
435 res.connector_id = connector_id;
436
437 return ioctl(fd, DRM_IOCTL_MODE_DETACHMODE, &res);
438}
439
440
441drmModePropertyPtr drmModeGetProperty(int fd, uint32_t property_id)
442{
443 struct drm_mode_get_property prop;
444 drmModePropertyPtr r;
445
446 prop.prop_id = property_id;
447 prop.count_enum_blobs = 0;
448 prop.count_values = 0;
449 prop.flags = 0;
450 prop.enum_blob_ptr = 0;
451 prop.values_ptr = 0;
452
453 if (ioctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop))
454 return 0;
455
456 if (prop.count_values)
457 prop.values_ptr = VOID2U64(drmMalloc(prop.count_values * sizeof(uint64_t)));
458
459 if (prop.count_enum_blobs && (prop.flags & DRM_MODE_PROP_ENUM))
460 prop.enum_blob_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(struct drm_mode_property_enum)));
461
462 if (prop.count_enum_blobs && (prop.flags & DRM_MODE_PROP_BLOB)) {
463 prop.values_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(uint32_t)));
464 prop.enum_blob_ptr = VOID2U64(drmMalloc(prop.count_enum_blobs * sizeof(uint32_t)));
465 }
466
467 if (ioctl(fd, DRM_IOCTL_MODE_GETPROPERTY, &prop)) {
468 r = NULL;
469 goto err_allocs;
470 }
471
472 if (!(r = drmMalloc(sizeof(*r))))
473 return NULL;
474
475 r->prop_id = prop.prop_id;
476 r->count_values = prop.count_values;
477
478 r->flags = prop.flags;
479 if (prop.count_values)
480 r->values = drmAllocCpy(U642VOID(prop.values_ptr), prop.count_values, sizeof(uint64_t));
481 if (prop.flags & DRM_MODE_PROP_ENUM) {
482 r->count_enums = prop.count_enum_blobs;
483 r->enums = drmAllocCpy(U642VOID(prop.enum_blob_ptr), prop.count_enum_blobs, sizeof(struct drm_mode_property_enum));
484 } else if (prop.flags & DRM_MODE_PROP_BLOB) {
485 r->values = drmAllocCpy(U642VOID(prop.values_ptr), prop.count_enum_blobs, sizeof(uint32_t));
486 r->blob_ids = drmAllocCpy(U642VOID(prop.enum_blob_ptr), prop.count_enum_blobs, sizeof(uint32_t));
487 r->count_blobs = prop.count_enum_blobs;
488 }
489 strncpy(r->name, prop.name, DRM_PROP_NAME_LEN);
490 r->name[DRM_PROP_NAME_LEN-1] = 0;
491
492err_allocs:
493 drmFree(U642VOID(prop.values_ptr));
494 drmFree(U642VOID(prop.enum_blob_ptr));
495
496 return r;
497}
498
499void drmModeFreeProperty(drmModePropertyPtr ptr)
500{
501 if (!ptr)
502 return;
503
504 drmFree(ptr->values);
505 drmFree(ptr->enums);
506 drmFree(ptr);
507}
508
509drmModePropertyBlobPtr drmModeGetPropertyBlob(int fd, uint32_t blob_id)
510{
511 struct drm_mode_get_blob blob;
512 drmModePropertyBlobPtr r;
513
514 blob.length = 0;
515 blob.data = 0;
516 blob.blob_id = blob_id;
517
518 if (ioctl(fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob))
519 return NULL;
520
521 if (blob.length)
522 blob.data = VOID2U64(drmMalloc(blob.length));
523
524 if (ioctl(fd, DRM_IOCTL_MODE_GETPROPBLOB, &blob)) {
525 r = NULL;
526 goto err_allocs;
527 }
528
529 if (!(r = drmMalloc(sizeof(*r))))
530 return NULL;
531
532 r->id = blob.blob_id;
533 r->length = blob.length;
534 r->data = drmAllocCpy(U642VOID(blob.data), 1, blob.length);
535
536err_allocs:
537 drmFree(U642VOID(blob.data));
538 return r;
539}
540
541void drmModeFreePropertyBlob(drmModePropertyBlobPtr ptr)
542{
543 if (!ptr)
544 return;
545
546 drmFree(ptr->data);
547 drmFree(ptr);
548}
549
550int drmModeConnectorSetProperty(int fd, uint32_t connector_id, uint32_t property_id,
551 uint64_t value)
552{
553 struct drm_mode_connector_set_property osp;
554 int ret;
555
556 osp.connector_id = connector_id;
557 osp.prop_id = property_id;
558 osp.value = value;
559
560 if ((ret = ioctl(fd, DRM_IOCTL_MODE_SETPROPERTY, &osp)))
561 return ret;
562
563 return 0;
564}
565
566/*
567 * checks if a modesetting capable driver has attached to the pci id
568 * returns 0 if modesetting supported.
569 * -EINVAL or invalid bus id
570 * -ENOSYS if no modesetting support
571*/
572int drmCheckModesettingSupported(const char *busid)
573{
574#ifdef __linux__
575 char pci_dev_dir[1024];
576 int domain, bus, dev, func;
577 DIR *sysdir;
578 struct dirent *dent;
579 int found = 0, ret;
580
581 ret = sscanf(busid, "pci:%04x:%02x:%02x.%d", &domain, &bus, &dev, &func);
582 if (ret != 4)
583 return -EINVAL;
584
585 sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/drm",
586 domain, bus, dev, func);
587
588 sysdir = opendir(pci_dev_dir);
589 if (sysdir) {
590 dent = readdir(sysdir);
591 while (dent) {
592 if (!strncmp(dent->d_name, "controlD", 8)) {
593 found = 1;
594 break;
595 }
596
597 dent = readdir(sysdir);
598 }
599 closedir(sysdir);
600 if (found)
601 return 0;
602 }
603
604 sprintf(pci_dev_dir, "/sys/bus/pci/devices/%04x:%02x:%02x.%d/",
605 domain, bus, dev, func);
606
607 sysdir = opendir(pci_dev_dir);
608 if (!sysdir)
609 return -EINVAL;
610
611 dent = readdir(sysdir);
612 while (dent) {
613 if (!strncmp(dent->d_name, "drm:controlD", 12)) {
614 found = 1;
615 break;
616 }
617
618 dent = readdir(sysdir);
619 }
620
621 closedir(sysdir);
622 if (found)
623 return 0;
624#endif
625 return -ENOSYS;
626
627}
628
629int drmModeReplaceFB(int fd, uint32_t buffer_id,
630 uint32_t width, uint32_t height, uint8_t depth,
631 uint8_t bpp, uint32_t pitch, uint32_t bo_handle)
632{
633 struct drm_mode_fb_cmd f;
634 int ret;
635
636 f.width = width;
637 f.height = height;
638 f.pitch = pitch;
639 f.bpp = bpp;
640 f.depth = depth;
641 f.handle = bo_handle;
642 f.fb_id = buffer_id;
643
644 if ((ret = ioctl(fd, DRM_IOCTL_MODE_REPLACEFB, &f)))
645 return ret;
646
647 return 0;
648}
649
650int drmModeCrtcGetGamma(int fd, uint32_t crtc_id, uint32_t size,
651 uint16_t *red, uint16_t *green, uint16_t *blue)
652{
653 int ret;
654 struct drm_mode_crtc_lut l;
655
656 l.crtc_id = crtc_id;
657 l.gamma_size = size;
658 l.red = VOID2U64(red);
659 l.green = VOID2U64(green);
660 l.blue = VOID2U64(blue);
661
662 if ((ret = ioctl(fd, DRM_IOCTL_MODE_GETGAMMA, &l)))
663 return ret;
664
665 return 0;
666}
667
668int drmModeCrtcSetGamma(int fd, uint32_t crtc_id, uint32_t size,
669 uint16_t *red, uint16_t *green, uint16_t *blue)
670{
671 int ret;
672 struct drm_mode_crtc_lut l;
673
674 l.crtc_id = crtc_id;
675 l.gamma_size = size;
676 l.red = VOID2U64(red);
677 l.green = VOID2U64(green);
678 l.blue = VOID2U64(blue);
679
680 if ((ret = ioctl(fd, DRM_IOCTL_MODE_SETGAMMA, &l)))
681 return ret;
682
683 return 0;
684}
diff --git a/libdrm/xf86drmMode.h b/libdrm/xf86drmMode.h
deleted file mode 100644
index b68d1469..00000000
--- a/libdrm/xf86drmMode.h
+++ /dev/null
@@ -1,256 +0,0 @@
1/*
2 * \file xf86drmMode.h
3 * Header for DRM modesetting interface.
4 *
5 * \author Jakob Bornecrantz <wallbraker@gmail.com>
6 *
7 * \par Acknowledgements:
8 * Feb 2007, Dave Airlie <airlied@linux.ie>
9 */
10
11/*
12 * Copyright (c) <year> <copyright holders>
13 *
14 * Permission is hereby granted, free of charge, to any person obtaining a
15 * copy of this software and associated documentation files (the "Software"),
16 * to deal in the Software without restriction, including without limitation
17 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
18 * and/or sell copies of the Software, and to permit persons to whom the
19 * Software is furnished to do so, subject to the following conditions:
20 *
21 * The above copyright notice and this permission notice shall be included in
22 * all copies or substantial portions of the Software.
23 *
24 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
25 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
26 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
27 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
28 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
29 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
30 * IN THE SOFTWARE.
31 *
32 */
33
34#include <drm.h>
35
36/*
37 * This is the interface for modesetting for drm.
38 *
39 * In order to use this interface you must include either <stdint.h> or another
40 * header defining uint32_t, int32_t and uint16_t.
41 *
42 * It aims to provide a randr1.2 compatible interface for modesettings in the
43 * kernel, the interface is also ment to be used by libraries like EGL.
44 *
45 * More information can be found in randrproto.txt which can be found here:
46 * http://gitweb.freedesktop.org/?p=xorg/proto/randrproto.git
47 *
48 * There are some major diffrences to be noted. Unlike the randr1.2 proto you
49 * need to create the memory object of the framebuffer yourself with the ttm
50 * buffer object interface. This object needs to be pinned.
51 */
52
53typedef struct _drmModeRes {
54
55 int count_fbs;
56 uint32_t *fbs;
57
58 int count_crtcs;
59 uint32_t *crtcs;
60
61 int count_connectors;
62 uint32_t *connectors;
63
64 int count_encoders;
65 uint32_t *encoders;
66
67 uint32_t min_width, max_width;
68 uint32_t min_height, max_height;
69} drmModeRes, *drmModeResPtr;
70
71typedef struct drm_mode_fb_cmd drmModeFB, *drmModeFBPtr;
72
73typedef struct _drmModePropertyBlob {
74 uint32_t id;
75 uint32_t length;
76 void *data;
77} drmModePropertyBlobRes, *drmModePropertyBlobPtr;
78
79typedef struct _drmModeProperty {
80 uint32_t prop_id;
81 uint32_t flags;
82 char name[DRM_PROP_NAME_LEN];
83 int count_values;
84 uint64_t *values; // store the blob lengths
85 int count_enums;
86 struct drm_mode_property_enum *enums;
87 int count_blobs;
88 uint32_t *blob_ids; // store the blob IDs
89} drmModePropertyRes, *drmModePropertyPtr;
90
91typedef struct _drmModeCrtc {
92 uint32_t crtc_id;
93 uint32_t buffer_id; /**< FB id to connect to 0 = disconnect */
94
95 uint32_t x, y; /**< Position on the framebuffer */
96 uint32_t width, height;
97 int mode_valid;
98 struct drm_mode_modeinfo mode;
99
100 int gamma_size; /**< Number of gamma stops */
101
102} drmModeCrtc, *drmModeCrtcPtr;
103
104typedef struct _drmModeEncoder {
105 uint32_t encoder_id;
106 uint32_t encoder_type;
107 uint32_t crtc_id;
108 uint32_t possible_crtcs;
109 uint32_t possible_clones;
110} drmModeEncoder, *drmModeEncoderPtr;
111
112typedef enum {
113 DRM_MODE_CONNECTED = 1,
114 DRM_MODE_DISCONNECTED = 2,
115 DRM_MODE_UNKNOWNCONNECTION = 3
116} drmModeConnection;
117
118typedef enum {
119 DRM_MODE_SUBPIXEL_UNKNOWN = 1,
120 DRM_MODE_SUBPIXEL_HORIZONTAL_RGB = 2,
121 DRM_MODE_SUBPIXEL_HORIZONTAL_BGR = 3,
122 DRM_MODE_SUBPIXEL_VERTICAL_RGB = 4,
123 DRM_MODE_SUBPIXEL_VERTICAL_BGR = 5,
124 DRM_MODE_SUBPIXEL_NONE = 6
125} drmModeSubPixel;
126
127typedef struct _drmModeConnector {
128 uint32_t connector_id;
129 uint32_t encoder_id; /**< Encoder currently connected to */
130 uint32_t connector_type;
131 uint32_t connector_type_id;
132 drmModeConnection connection;
133 uint32_t mmWidth, mmHeight; /**< HxW in millimeters */
134 drmModeSubPixel subpixel;
135
136 int count_modes;
137 struct drm_mode_modeinfo *modes;
138
139 int count_props;
140 uint32_t *props; /**< List of property ids */
141 uint64_t *prop_values; /**< List of property values */
142
143 int count_encoders;
144 uint32_t *encoders; /**< List of encoder ids */
145} drmModeConnector, *drmModeConnectorPtr;
146
147
148
149extern void drmModeFreeModeInfo( struct drm_mode_modeinfo *ptr );
150extern void drmModeFreeResources( drmModeResPtr ptr );
151extern void drmModeFreeFB( drmModeFBPtr ptr );
152extern void drmModeFreeCrtc( drmModeCrtcPtr ptr );
153extern void drmModeFreeConnector( drmModeConnectorPtr ptr );
154extern void drmModeFreeEncoder( drmModeEncoderPtr ptr );
155
156/**
157 * Retrives all of the resources associated with a card.
158 */
159extern drmModeResPtr drmModeGetResources(int fd);
160
161/*
162 * FrameBuffer manipulation.
163 */
164
165/**
166 * Retrive information about framebuffer bufferId
167 */
168extern drmModeFBPtr drmModeGetFB(int fd, uint32_t bufferId);
169
170/**
171 * Creates a new framebuffer with an buffer object as its scanout buffer.
172 */
173extern int drmModeAddFB(int fd, uint32_t width, uint32_t height, uint8_t depth,
174 uint8_t bpp, uint32_t pitch, uint32_t bo_handle,
175 uint32_t *buf_id);
176/**
177 * Destroies the given framebuffer.
178 */
179extern int drmModeRmFB(int fd, uint32_t bufferId);
180
181/**
182 * Replace a framebuffer object with a new one - for resizing the screen.
183 */
184extern int drmModeReplaceFB(int fd, uint32_t buffer_id,
185 uint32_t width, uint32_t height, uint8_t depth,
186 uint8_t bpp, uint32_t pitch, uint32_t bo_handle);
187
188/*
189 * Crtc functions
190 */
191
192/**
193 * Retrive information about the ctrt crtcId
194 */
195extern drmModeCrtcPtr drmModeGetCrtc(int fd, uint32_t crtcId);
196
197/**
198 * Set the mode on a crtc crtcId with the given mode modeId.
199 */
200int drmModeSetCrtc(int fd, uint32_t crtcId, uint32_t bufferId,
201 uint32_t x, uint32_t y, uint32_t *connectors, int count,
202 struct drm_mode_modeinfo *mode);
203
204/*
205 * Cursor functions
206 */
207
208/**
209 * Set the cursor on crtc
210 */
211int drmModeSetCursor(int fd, uint32_t crtcId, uint32_t bo_handle, uint32_t width, uint32_t height);
212
213/**
214 * Move the cursor on crtc
215 */
216int drmModeMoveCursor(int fd, uint32_t crtcId, int x, int y);
217
218/**
219 * Encoder functions
220 */
221drmModeEncoderPtr drmModeGetEncoder(int fd, uint32_t encoder_id);
222
223/*
224 * Connector manipulation
225 */
226
227/**
228 * Retrive information about the connector connectorId.
229 */
230extern drmModeConnectorPtr drmModeGetConnector(int fd,
231 uint32_t connectorId);
232
233/**
234 * Attaches the given mode to an connector.
235 */
236extern int drmModeAttachMode(int fd, uint32_t connectorId, struct drm_mode_modeinfo *mode_info);
237
238/**
239 * Detaches a mode from the connector
240 * must be unused, by the given mode.
241 */
242extern int drmModeDetachMode(int fd, uint32_t connectorId, struct drm_mode_modeinfo *mode_info);
243
244extern drmModePropertyPtr drmModeGetProperty(int fd, uint32_t propertyId);
245extern void drmModeFreeProperty(drmModePropertyPtr ptr);
246
247extern drmModePropertyBlobPtr drmModeGetPropertyBlob(int fd, uint32_t blob_id);
248extern void drmModeFreePropertyBlob(drmModePropertyBlobPtr ptr);
249extern int drmModeConnectorSetProperty(int fd, uint32_t connector_id, uint32_t property_id,
250 uint64_t value);
251extern int drmCheckModesettingSupported(const char *busid);
252
253extern int drmModeCrtcSetGamma(int fd, uint32_t crtc_id, uint32_t size,
254 uint16_t *red, uint16_t *green, uint16_t *blue);
255extern int drmModeCrtcGetGamma(int fd, uint32_t crtc_id, uint32_t size,
256 uint16_t *red, uint16_t *green, uint16_t *blue);
diff --git a/linux-core/Makefile b/linux-core/Makefile
index 66bc4f25..157664ef 100644
--- a/linux-core/Makefile
+++ b/linux-core/Makefile
@@ -58,7 +58,7 @@ endif
58 58
59# Modules for all architectures 59# Modules for all architectures
60MODULE_LIST := drm.o tdfx.o r128.o radeon.o mga.o sis.o savage.o via.o \ 60MODULE_LIST := drm.o tdfx.o r128.o radeon.o mga.o sis.o savage.o via.o \
61 mach64.o nv.o nouveau.o xgi.o radeon_ms.o 61 mach64.o nv.o nouveau.o xgi.o
62 62
63# Modules only for ix86 architectures 63# Modules only for ix86 architectures
64ifneq (,$(findstring 86,$(MACHINE))) 64ifneq (,$(findstring 86,$(MACHINE)))
@@ -90,9 +90,8 @@ VIAHEADERS = via_drm.h via_drv.h via_3d_reg.h via_verifier.h $(DRMHEADERS)
90MACH64HEADERS = mach64_drv.h mach64_drm.h $(DRMHEADERS) 90MACH64HEADERS = mach64_drv.h mach64_drm.h $(DRMHEADERS)
91NVHEADERS = nv_drv.h $(DRMHEADERS) 91NVHEADERS = nv_drv.h $(DRMHEADERS)
92FFBHEADERS = ffb_drv.h $(DRMHEADERS) 92FFBHEADERS = ffb_drv.h $(DRMHEADERS)
93NOUVEAUHEADERS = nouveau_drv.h nouveau_drm.h nouveau_reg.h nouveau_display.h $(DRMHEADERS) 93NOUVEAUHEADERS = nouveau_drv.h nouveau_drm.h nouveau_reg.h $(DRMHEADERS)
94XGIHEADERS = xgi_cmdlist.h xgi_drv.h xgi_misc.h xgi_regs.h $(DRMHEADERS) 94XGIHEADERS = xgi_cmdlist.h xgi_drv.h xgi_misc.h xgi_regs.h $(DRMHEADERS)
95RADEONMSHEADERS = radeon_ms_driver.h $(DRMHEADERS)
96 95
97PROGS = dristat drmstat 96PROGS = dristat drmstat
98 97
@@ -291,7 +290,6 @@ CONFIG_DRM_MACH64 := n
291CONFIG_DRM_NV := n 290CONFIG_DRM_NV := n
292CONFIG_DRM_NOUVEAU := n 291CONFIG_DRM_NOUVEAU := n
293CONFIG_DRM_XGI := n 292CONFIG_DRM_XGI := n
294CONFIG_DRM_RADEON_MS := n
295 293
296# Enable module builds for the modules requested/supported. 294# Enable module builds for the modules requested/supported.
297 295
@@ -331,9 +329,6 @@ endif
331ifneq (,$(findstring xgi,$(DRM_MODULES))) 329ifneq (,$(findstring xgi,$(DRM_MODULES)))
332CONFIG_DRM_XGI := m 330CONFIG_DRM_XGI := m
333endif 331endif
334ifneq (,$(findstring radeon_ms,$(DRM_MODULES)))
335#CONFIG_DRM_RADEON_MS := m
336endif
337 332
338# These require AGP support 333# These require AGP support
339 334
diff --git a/linux-core/Makefile.kernel b/linux-core/Makefile.kernel
index 9ef9890d..e5af2ec4 100644
--- a/linux-core/Makefile.kernel
+++ b/linux-core/Makefile.kernel
@@ -12,21 +12,17 @@ drm-objs := drm_auth.o drm_bufs.o drm_context.o drm_dma.o drm_drawable.o \
12 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \ 12 drm_lock.o drm_memory.o drm_proc.o drm_stub.o drm_vm.o \
13 drm_sysfs.o drm_pci.o drm_agpsupport.o drm_scatter.o \ 13 drm_sysfs.o drm_pci.o drm_agpsupport.o drm_scatter.o \
14 drm_memory_debug.o ati_pcigart.o drm_sman.o \ 14 drm_memory_debug.o ati_pcigart.o drm_sman.o \
15 drm_hashtab.o drm_mm.o drm_compat.o \ 15 drm_hashtab.o drm_mm.o drm_object.o drm_compat.o \
16 drm_fence.o drm_ttm.o drm_bo.o drm_bo_move.o \ 16 drm_fence.o drm_ttm.o drm_bo.o drm_bo_move.o drm_bo_lock.o \
17 drm_crtc.o drm_edid.o drm_modes.o drm_crtc_helper.o \ 17 drm_regman.o drm_vm_nopage_compat.o drm_gem.o
18 drm_regman.o drm_vm_nopage_compat.o drm_gem.o drm_uncached.o
19tdfx-objs := tdfx_drv.o 18tdfx-objs := tdfx_drv.o
20r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o 19r128-objs := r128_drv.o r128_cce.o r128_state.o r128_irq.o
21mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o 20mga-objs := mga_drv.o mga_dma.o mga_state.o mga_warp.o mga_irq.o
22i810-objs := i810_drv.o i810_dma.o 21i810-objs := i810_drv.o i810_dma.o
23i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o \ 22i915-objs := i915_drv.o i915_dma.o i915_irq.o i915_mem.o i915_fence.o \
24 i915_compat.o i915_suspend.o i915_opregion.o \ 23 i915_buffer.o i915_compat.o i915_execbuf.o i915_suspend.o \
25 i915_gem.o i915_gem_debug.o i915_gem_proc.o i915_gem_tiling.o \ 24 i915_opregion.o \
26 intel_display.o intel_crt.o intel_lvds.o intel_bios.o \ 25 i915_gem.o i915_gem_debug.o i915_gem_proc.o i915_gem_tiling.o
27 intel_sdvo.o intel_modes.o intel_i2c.o i915_init.o intel_fb.o \
28 intel_tv.o intel_dvo.o dvo_ch7xxx.o \
29 dvo_ch7017.o dvo_ivch.o dvo_tfp410.o dvo_sil164.o
30nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \ 26nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
31 nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \ 27 nouveau_object.o nouveau_irq.o nouveau_notifier.o nouveau_swmthd.o \
32 nouveau_sgdma.o nouveau_dma.o nouveau_bo.o nouveau_fence.o \ 28 nouveau_sgdma.o nouveau_dma.o nouveau_bo.o nouveau_fence.o \
@@ -36,15 +32,8 @@ nouveau-objs := nouveau_drv.o nouveau_state.o nouveau_fifo.o nouveau_mem.o \
36 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \ 32 nv04_fifo.o nv10_fifo.o nv40_fifo.o nv50_fifo.o \
37 nv04_graph.o nv10_graph.o nv20_graph.o \ 33 nv04_graph.o nv10_graph.o nv20_graph.o \
38 nv40_graph.o nv50_graph.o \ 34 nv40_graph.o nv50_graph.o \
39 nv04_instmem.o nv50_instmem.o \ 35 nv04_instmem.o nv50_instmem.o
40 nouveau_bios.o \ 36radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o
41 nv50_crtc.o nv50_cursor.o nv50_lut.o nv50_fb.o nv50_output.o nv50_sor.o nv50_dac.o nv50_connector.o nv50_i2c.o nv50_display.o \
42 nv50_kms_wrapper.o \
43 nv50_fbcon.o
44radeon-objs := radeon_drv.o radeon_cp.o radeon_state.o radeon_mem.o radeon_irq.o r300_cmdbuf.o radeon_gem.o \
45 radeon_buffer.o radeon_fence.o atom.o radeon_display.o radeon_atombios.o radeon_i2c.o radeon_connectors.o radeon_cs.o \
46 atombios_crtc.o radeon_encoders.o radeon_fb.o radeon_combios.o radeon_legacy_crtc.o radeon_legacy_encoders.o \
47 radeon_cursor.o radeon_pm.o radeon_gem_proc.o
48sis-objs := sis_drv.o sis_mm.o 37sis-objs := sis_drv.o sis_mm.o
49ffb-objs := ffb_drv.o ffb_context.o 38ffb-objs := ffb_drv.o ffb_context.o
50savage-objs := savage_drv.o savage_bci.o savage_state.o 39savage-objs := savage_drv.o savage_bci.o savage_state.o
@@ -58,7 +47,6 @@ xgi-objs := xgi_cmdlist.o xgi_drv.o xgi_fb.o xgi_misc.o xgi_pcie.o \
58ifeq ($(CONFIG_COMPAT),y) 47ifeq ($(CONFIG_COMPAT),y)
59drm-objs += drm_ioc32.o 48drm-objs += drm_ioc32.o
60radeon-objs += radeon_ioc32.o 49radeon-objs += radeon_ioc32.o
61radeon_ms-objs += radeon_ms_compat.o
62mga-objs += mga_ioc32.o 50mga-objs += mga_ioc32.o
63r128-objs += r128_ioc32.o 51r128-objs += r128_ioc32.o
64i915-objs += i915_ioc32.o 52i915-objs += i915_ioc32.o
@@ -81,4 +69,3 @@ obj-$(CONFIG_DRM_MACH64)+= mach64.o
81obj-$(CONFIG_DRM_NV) += nv.o 69obj-$(CONFIG_DRM_NV) += nv.o
82obj-$(CONFIG_DRM_NOUVEAU) += nouveau.o 70obj-$(CONFIG_DRM_NOUVEAU) += nouveau.o
83obj-$(CONFIG_DRM_XGI) += xgi.o 71obj-$(CONFIG_DRM_XGI) += xgi.o
84obj-$(CONFIG_DRM_RADEON_MS) += radeon_ms.o
diff --git a/linux-core/ObjectID.h b/linux-core/ObjectID.h
deleted file mode 100644
index f1f18a48..00000000
--- a/linux-core/ObjectID.h
+++ /dev/null
@@ -1,518 +0,0 @@
1/*
2* Copyright 2006-2007 Advanced Micro Devices, Inc.
3*
4* Permission is hereby granted, free of charge, to any person obtaining a
5* copy of this software and associated documentation files (the "Software"),
6* to deal in the Software without restriction, including without limitation
7* the rights to use, copy, modify, merge, publish, distribute, sublicense,
8* and/or sell copies of the Software, and to permit persons to whom the
9* Software is furnished to do so, subject to the following conditions:
10*
11* The above copyright notice and this permission notice shall be included in
12* all copies or substantial portions of the Software.
13*
14* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20* OTHER DEALINGS IN THE SOFTWARE.
21*/
22/* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */
23
24#ifndef _OBJECTID_H
25#define _OBJECTID_H
26
27#if defined(_X86_)
28#pragma pack(1)
29#endif
30
31/****************************************************/
32/* Graphics Object Type Definition */
33/****************************************************/
34#define GRAPH_OBJECT_TYPE_NONE 0x0
35#define GRAPH_OBJECT_TYPE_GPU 0x1
36#define GRAPH_OBJECT_TYPE_ENCODER 0x2
37#define GRAPH_OBJECT_TYPE_CONNECTOR 0x3
38#define GRAPH_OBJECT_TYPE_ROUTER 0x4
39/* deleted */
40
41/****************************************************/
42/* Encoder Object ID Definition */
43/****************************************************/
44#define ENCODER_OBJECT_ID_NONE 0x00
45
46/* Radeon Class Display Hardware */
47#define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01
48#define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02
49#define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03
50#define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04
51#define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */
52#define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06
53#define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07
54
55/* External Third Party Encoders */
56#define ENCODER_OBJECT_ID_SI170B 0x08
57#define ENCODER_OBJECT_ID_CH7303 0x09
58#define ENCODER_OBJECT_ID_CH7301 0x0A
59#define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */
60#define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C
61#define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D
62#define ENCODER_OBJECT_ID_TITFP513 0x0E
63#define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */
64#define ENCODER_OBJECT_ID_VT1623 0x10
65#define ENCODER_OBJECT_ID_HDMI_SI1930 0x11
66#define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12
67/* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */
68#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13
69#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14
70#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15
71#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */
72#define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */
73#define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */
74#define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19
75#define ENCODER_OBJECT_ID_VT1625 0x1A
76#define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B
77#define ENCODER_OBJECT_ID_DP_AN9801 0x1C
78#define ENCODER_OBJECT_ID_DP_DP501 0x1D
79#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E
80#define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F
81#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20
82#define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21
83
84#define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF
85
86/****************************************************/
87/* Connector Object ID Definition */
88/****************************************************/
89#define CONNECTOR_OBJECT_ID_NONE 0x00
90#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01
91#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02
92#define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03
93#define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04
94#define CONNECTOR_OBJECT_ID_VGA 0x05
95#define CONNECTOR_OBJECT_ID_COMPOSITE 0x06
96#define CONNECTOR_OBJECT_ID_SVIDEO 0x07
97#define CONNECTOR_OBJECT_ID_YPbPr 0x08
98#define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09
99#define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */
100#define CONNECTOR_OBJECT_ID_SCART 0x0B
101#define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C
102#define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D
103#define CONNECTOR_OBJECT_ID_LVDS 0x0E
104#define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F
105#define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10
106#define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11
107#define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12
108#define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13
109
110/* deleted */
111
112/****************************************************/
113/* Router Object ID Definition */
114/****************************************************/
115#define ROUTER_OBJECT_ID_NONE 0x00
116#define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01
117
118/****************************************************/
119// Graphics Object ENUM ID Definition */
120/****************************************************/
121#define GRAPH_OBJECT_ENUM_ID1 0x01
122#define GRAPH_OBJECT_ENUM_ID2 0x02
123#define GRAPH_OBJECT_ENUM_ID3 0x03
124#define GRAPH_OBJECT_ENUM_ID4 0x04
125#define GRAPH_OBJECT_ENUM_ID5 0x05
126#define GRAPH_OBJECT_ENUM_ID6 0x06
127
128/****************************************************/
129/* Graphics Object ID Bit definition */
130/****************************************************/
131#define OBJECT_ID_MASK 0x00FF
132#define ENUM_ID_MASK 0x0700
133#define RESERVED1_ID_MASK 0x0800
134#define OBJECT_TYPE_MASK 0x7000
135#define RESERVED2_ID_MASK 0x8000
136
137#define OBJECT_ID_SHIFT 0x00
138#define ENUM_ID_SHIFT 0x08
139#define OBJECT_TYPE_SHIFT 0x0C
140
141
142/****************************************************/
143/* Graphics Object family definition */
144/****************************************************/
145#define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \
146 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT)
147/****************************************************/
148/* GPU Object ID definition - Shared with BIOS */
149/****************************************************/
150#define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\
151 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT)
152
153/****************************************************/
154/* Encoder Object ID definition - Shared with BIOS */
155/****************************************************/
156/*
157#define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101
158#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102
159#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103
160#define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104
161#define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105
162#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106
163#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107
164#define ENCODER_SIL170B_ENUM_ID1 0x2108
165#define ENCODER_CH7303_ENUM_ID1 0x2109
166#define ENCODER_CH7301_ENUM_ID1 0x210A
167#define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B
168#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C
169#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D
170#define ENCODER_TITFP513_ENUM_ID1 0x210E
171#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F
172#define ENCODER_VT1623_ENUM_ID1 0x2110
173#define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111
174#define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112
175#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113
176#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114
177#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115
178#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116
179#define ENCODER_SI178_ENUM_ID1 0x2117
180#define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118
181#define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119
182#define ENCODER_VT1625_ENUM_ID1 0x211A
183#define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B
184#define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C
185#define ENCODER_DP_DP501_ENUM_ID1 0x211D
186#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E
187*/
188#define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
189 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
190 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT)
191
192#define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
193 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
194 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT)
195
196#define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
197 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
198 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT)
199
200#define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
201 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
202 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT)
203
204#define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
205 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
206 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT)
207
208#define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
209 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
210 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
211
212#define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
213 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
214 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT)
215
216#define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
217 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
218 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT)
219
220#define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
221 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
222 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT)
223
224#define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
225 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
226 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT)
227
228#define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
229 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
230 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT)
231
232#define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
233 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
234 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT)
235
236#define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
237 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
238 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
239
240#define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
241 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
242 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT)
243
244
245#define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
246 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
247 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT)
248
249
250#define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
251 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
252 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT)
253
254#define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
255 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
256 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT)
257
258#define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
259 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
260 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT)
261
262#define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
263 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
264 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT)
265
266#define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
267 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
268 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT)
269
270#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
271 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
272 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
273
274
275#define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
276 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
277 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT)
278
279
280#define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
281 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
282 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT)
283
284#define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
285 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
286 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT)
287
288#define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
289 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
290 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT
291
292#define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
293 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
294 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT)
295
296#define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
297 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
298 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT)
299
300#define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
301 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
302 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT)
303
304#define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
305 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
306 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT)
307
308#define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
309 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
310 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT)
311
312#define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
313 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
314 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT)
315
316#define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
317 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
318 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT)
319
320#define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
321 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
322 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
323
324#define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
325 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
326 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT)
327
328#define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
329 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
330 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT)
331
332#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
333 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
334 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
335
336#define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
337 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
338 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT)
339
340#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
341 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
342 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
343
344#define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
345 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
346 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT)
347
348#define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\
349 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
350 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT)
351
352/****************************************************/
353/* Connector Object ID definition - Shared with BIOS */
354/****************************************************/
355/*
356#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101
357#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102
358#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103
359#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104
360#define CONNECTOR_VGA_ENUM_ID1 0x3105
361#define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106
362#define CONNECTOR_SVIDEO_ENUM_ID1 0x3107
363#define CONNECTOR_YPbPr_ENUM_ID1 0x3108
364#define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109
365#define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A
366#define CONNECTOR_SCART_ENUM_ID1 0x310B
367#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C
368#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D
369#define CONNECTOR_LVDS_ENUM_ID1 0x310E
370#define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F
371#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110
372*/
373#define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
374 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
375 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT)
376
377#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
378 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
379 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
380
381#define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
382 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
383 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT)
384
385#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
386 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
387 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
388
389#define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
390 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
391 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT)
392
393#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
394 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
395 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
396
397#define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
398 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
399 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT)
400
401#define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
402 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
403 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT)
404
405#define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
406 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
407 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
408
409#define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
410 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
411 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT)
412
413#define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
414 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
415 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT)
416
417#define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
418 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
419 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT)
420
421#define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
422 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
423 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT)
424
425#define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
426 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
427 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT)
428
429#define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
430 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
431 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT)
432
433#define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
434 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
435 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT)
436
437#define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
438 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
439 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT)
440
441#define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
442 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
443 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT)
444
445#define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
446 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
447 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT)
448
449#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
450 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
451 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
452
453#define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
454 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
455 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT)
456
457#define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
458 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
459 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
460
461#define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
462 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
463 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT)
464
465
466#define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
467 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
468 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
469
470#define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
471 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
472 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT)
473
474#define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
475 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
476 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
477
478#define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
479 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\
480 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
481
482#define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
483 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\
484 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
485
486#define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\
487 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\
488 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT)
489
490/****************************************************/
491/* Router Object ID definition - Shared with BIOS */
492/****************************************************/
493#define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\
494 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\
495 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT)
496
497/* deleted */
498
499/****************************************************/
500/* Object Cap definition - Shared with BIOS */
501/****************************************************/
502#define GRAPHICS_OBJECT_CAP_I2C 0x00000001L
503#define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L
504
505
506#define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01
507#define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02
508#define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03
509
510#if defined(_X86_)
511#pragma pack()
512#endif
513
514#endif /*GRAPHICTYPE */
515
516
517
518
diff --git a/linux-core/amd.h b/linux-core/amd.h
deleted file mode 120000
index b4882447..00000000
--- a/linux-core/amd.h
+++ /dev/null
@@ -1 +0,0 @@
1../shared-core/amd.h \ No newline at end of file
diff --git a/linux-core/amd_legacy.h b/linux-core/amd_legacy.h
deleted file mode 120000
index 1a7786fc..00000000
--- a/linux-core/amd_legacy.h
+++ /dev/null
@@ -1 +0,0 @@
1../shared-core/amd_legacy.h \ No newline at end of file
diff --git a/linux-core/amd_legacy_cbuffer.c b/linux-core/amd_legacy_cbuffer.c
deleted file mode 120000
index eab329b5..00000000
--- a/linux-core/amd_legacy_cbuffer.c
+++ /dev/null
@@ -1 +0,0 @@
1../shared-core/amd_legacy_cbuffer.c \ No newline at end of file
diff --git a/linux-core/amd_legacy_fence.h b/linux-core/amd_legacy_fence.h
deleted file mode 120000
index e7b30f25..00000000
--- a/linux-core/amd_legacy_fence.h
+++ /dev/null
@@ -1 +0,0 @@
1../shared-core/amd_legacy_fence.h \ No newline at end of file
diff --git a/linux-core/ati_pcigart.c b/linux-core/ati_pcigart.c
index 6b0d8947..40f8f8dd 100644
--- a/linux-core/ati_pcigart.c
+++ b/linux-core/ati_pcigart.c
@@ -39,7 +39,7 @@
39#define ATI_PCIE_WRITE 0x4 39#define ATI_PCIE_WRITE 0x4
40#define ATI_PCIE_READ 0x8 40#define ATI_PCIE_READ 0x8
41 41
42static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *gart_info, dma_addr_t addr, volatile u32 *pci_gart) 42static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *gart_info, dma_addr_t addr, u32 *pci_gart)
43{ 43{
44 u32 page_base; 44 u32 page_base;
45 45
@@ -61,28 +61,8 @@ static __inline__ void gart_insert_page_into_table(struct drm_ati_pcigart_info *
61 *pci_gart = cpu_to_le32(page_base); 61 *pci_gart = cpu_to_le32(page_base);
62} 62}
63 63
64static __inline__ dma_addr_t gart_get_page_from_table(struct drm_ati_pcigart_info *gart_info, volatile u32 *pci_gart) 64static int drm_ati_alloc_pcigart_table(struct drm_device *dev,
65{ 65 struct drm_ati_pcigart_info *gart_info)
66 dma_addr_t retval;
67 switch(gart_info->gart_reg_if) {
68 case DRM_ATI_GART_IGP:
69 retval = (*pci_gart & ATI_PCIGART_PAGE_MASK);
70 retval += (((*pci_gart & 0xf0) >> 4) << 16) << 16;
71 break;
72 case DRM_ATI_GART_PCIE:
73 retval = (*pci_gart & ~0xc);
74 retval <<= 8;
75 break;
76 case DRM_ATI_GART_PCI:
77 retval = *pci_gart;
78 break;
79 }
80
81 return retval;
82}
83
84int drm_ati_alloc_pcigart_table(struct drm_device *dev,
85 struct drm_ati_pcigart_info *gart_info)
86{ 66{
87 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size, 67 gart_info->table_handle = drm_pci_alloc(dev, gart_info->table_size,
88 PAGE_SIZE, 68 PAGE_SIZE,
@@ -90,25 +70,12 @@ int drm_ati_alloc_pcigart_table(struct drm_device *dev,
90 if (gart_info->table_handle == NULL) 70 if (gart_info->table_handle == NULL)
91 return -ENOMEM; 71 return -ENOMEM;
92 72
93#ifdef CONFIG_X86
94 /* IGPs only exist on x86 in any case */
95 if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
96 set_memory_uc((unsigned long)gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
97#endif
98
99 memset(gart_info->table_handle->vaddr, 0, gart_info->table_size);
100 return 0; 73 return 0;
101} 74}
102EXPORT_SYMBOL(drm_ati_alloc_pcigart_table);
103 75
104static void drm_ati_free_pcigart_table(struct drm_device *dev, 76static void drm_ati_free_pcigart_table(struct drm_device *dev,
105 struct drm_ati_pcigart_info *gart_info) 77 struct drm_ati_pcigart_info *gart_info)
106{ 78{
107#ifdef CONFIG_X86
108 /* IGPs only exist on x86 in any case */
109 if (gart_info->gart_reg_if == DRM_ATI_GART_IGP)
110 set_memory_wb((unsigned long)gart_info->table_handle->vaddr, gart_info->table_size >> PAGE_SHIFT);
111#endif
112 drm_pci_free(dev, gart_info->table_handle); 79 drm_pci_free(dev, gart_info->table_handle);
113 gart_info->table_handle = NULL; 80 gart_info->table_handle = NULL;
114} 81}
@@ -122,6 +89,7 @@ int drm_ati_pcigart_cleanup(struct drm_device *dev, struct drm_ati_pcigart_info
122 89
123 /* we need to support large memory configurations */ 90 /* we need to support large memory configurations */
124 if (!entry) { 91 if (!entry) {
92 DRM_ERROR("no scatter/gather memory!\n");
125 return 0; 93 return 0;
126 } 94 }
127 95
@@ -164,8 +132,12 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
164 int max_pages; 132 int max_pages;
165 dma_addr_t entry_addr; 133 dma_addr_t entry_addr;
166 134
135 if (!entry) {
136 DRM_ERROR("no scatter/gather memory!\n");
137 goto done;
138 }
167 139
168 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN && gart_info->table_handle == NULL) { 140 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
169 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); 141 DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n");
170 142
171 ret = drm_ati_alloc_pcigart_table(dev, gart_info); 143 ret = drm_ati_alloc_pcigart_table(dev, gart_info);
@@ -173,19 +145,14 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
173 DRM_ERROR("cannot allocate PCI GART page!\n"); 145 DRM_ERROR("cannot allocate PCI GART page!\n");
174 goto done; 146 goto done;
175 } 147 }
176 }
177 148
178 if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) {
179 address = gart_info->table_handle->vaddr; 149 address = gart_info->table_handle->vaddr;
180 bus_address = gart_info->table_handle->busaddr; 150 bus_address = gart_info->table_handle->busaddr;
181 } else { 151 } else {
182 address = gart_info->addr; 152 address = gart_info->addr;
183 bus_address = gart_info->bus_addr; 153 bus_address = gart_info->bus_addr;
184 } 154 DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n",
185 155 bus_address, (unsigned long)address);
186 if (!entry) {
187 DRM_ERROR("no scatter/gather memory!\n");
188 goto done;
189 } 156 }
190 157
191 pci_gart = (u32 *) address; 158 pci_gart = (u32 *) address;
@@ -194,6 +161,8 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
194 pages = (entry->pages <= max_pages) 161 pages = (entry->pages <= max_pages)
195 ? entry->pages : max_pages; 162 ? entry->pages : max_pages;
196 163
164 memset(pci_gart, 0, max_pages * sizeof(u32));
165
197 for (i = 0; i < pages; i++) { 166 for (i = 0; i < pages; i++) {
198 /* we need to support large memory configurations */ 167 /* we need to support large memory configurations */
199 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i], 168 entry->busaddr[i] = pci_map_page(dev->pdev, entry->pagelist[i],
@@ -216,7 +185,11 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
216 185
217 ret = 1; 186 ret = 1;
218 187
188#if defined(__i386__) || defined(__x86_64__)
189 wbinvd();
190#else
219 mb(); 191 mb();
192#endif
220 193
221 done: 194 done:
222 gart_info->addr = address; 195 gart_info->addr = address;
@@ -224,141 +197,3 @@ int drm_ati_pcigart_init(struct drm_device *dev, struct drm_ati_pcigart_info *ga
224 return ret; 197 return ret;
225} 198}
226EXPORT_SYMBOL(drm_ati_pcigart_init); 199EXPORT_SYMBOL(drm_ati_pcigart_init);
227
228static int ati_pcigart_needs_unbind_cache_adjust(struct drm_ttm_backend *backend)
229{
230 return ((backend->flags & DRM_BE_FLAG_BOUND_CACHED) ? 0 : 1);
231}
232
233static int ati_pcigart_populate(struct drm_ttm_backend *backend,
234 unsigned long num_pages,
235 struct page **pages,
236 struct page *dummy_read_page)
237{
238 struct ati_pcigart_ttm_backend *atipci_be =
239 container_of(backend, struct ati_pcigart_ttm_backend, backend);
240
241 atipci_be->pages = pages;
242 atipci_be->num_pages = num_pages;
243 atipci_be->populated = 1;
244 return 0;
245}
246
247static int ati_pcigart_bind_ttm(struct drm_ttm_backend *backend,
248 struct drm_bo_mem_reg *bo_mem)
249{
250 struct ati_pcigart_ttm_backend *atipci_be =
251 container_of(backend, struct ati_pcigart_ttm_backend, backend);
252 off_t j;
253 int i;
254 struct drm_ati_pcigart_info *info = atipci_be->gart_info;
255 u32 *pci_gart;
256 dma_addr_t offset = bo_mem->mm_node->start;
257 dma_addr_t page_base;
258
259 pci_gart = info->addr;
260
261 j = offset;
262 while (j < (offset + atipci_be->num_pages)) {
263 if (gart_get_page_from_table(info, pci_gart + j))
264 return -EBUSY;
265 j++;
266 }
267
268 for (i = 0, j = offset; i < atipci_be->num_pages; i++, j++) {
269 struct page *cur_page = atipci_be->pages[i];
270 /* write value */
271 page_base = page_to_phys(cur_page);
272 gart_insert_page_into_table(info, page_base, pci_gart + j);
273 }
274
275 mb();
276
277 atipci_be->gart_flush_fn(atipci_be->dev);
278
279 atipci_be->bound = 1;
280 atipci_be->offset = offset;
281 /* need to traverse table and add entries */
282 DRM_DEBUG("\n");
283 return 0;
284}
285
286static int ati_pcigart_unbind_ttm(struct drm_ttm_backend *backend)
287{
288 struct ati_pcigart_ttm_backend *atipci_be =
289 container_of(backend, struct ati_pcigart_ttm_backend, backend);
290 struct drm_ati_pcigart_info *info = atipci_be->gart_info;
291 unsigned long offset = atipci_be->offset;
292 int i;
293 off_t j;
294 u32 *pci_gart = info->addr;
295
296 if (atipci_be->bound != 1)
297 return -EINVAL;
298
299 for (i = 0, j = offset; i < atipci_be->num_pages; i++, j++) {
300 *(pci_gart + j) = 0;
301 }
302 atipci_be->gart_flush_fn(atipci_be->dev);
303 atipci_be->bound = 0;
304 atipci_be->offset = 0;
305 return 0;
306}
307
308static void ati_pcigart_clear_ttm(struct drm_ttm_backend *backend)
309{
310 struct ati_pcigart_ttm_backend *atipci_be =
311 container_of(backend, struct ati_pcigart_ttm_backend, backend);
312
313 DRM_DEBUG("\n");
314 if (atipci_be->pages) {
315 backend->func->unbind(backend);
316 atipci_be->pages = NULL;
317
318 }
319 atipci_be->num_pages = 0;
320}
321
322static void ati_pcigart_destroy_ttm(struct drm_ttm_backend *backend)
323{
324 struct ati_pcigart_ttm_backend *atipci_be;
325 if (backend) {
326 DRM_DEBUG("\n");
327 atipci_be = container_of(backend, struct ati_pcigart_ttm_backend, backend);
328 if (atipci_be) {
329 if (atipci_be->pages) {
330 backend->func->clear(backend);
331 }
332 drm_ctl_free(atipci_be, sizeof(*atipci_be), DRM_MEM_TTM);
333 }
334 }
335}
336
337static struct drm_ttm_backend_func ati_pcigart_ttm_backend =
338{
339 .needs_ub_cache_adjust = ati_pcigart_needs_unbind_cache_adjust,
340 .populate = ati_pcigart_populate,
341