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authorQiang Yu2017-03-07 01:00:34 -0600
committerMarek Olšák2018-03-08 14:01:23 -0600
commit924f856a9047b87e8bfdc2867f7fe484e3f71343 (patch)
tree4dbb0b8af469c4b147a77824133773bb29ddb1d8 /amdgpu
parent28370370afb2b291a2cfe6a5478a29d9a1b1c28f (diff)
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amdgpu:support 16 ibs per submit for PAL/SRIOV
to support SRIOV and MCBP, need 16 IBs per submit Signed-off-by: Qiang Yu <Qiang.Yu@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Acked-by: Christian König <christian.koenig@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'amdgpu')
-rw-r--r--amdgpu/amdgpu.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h
index 36f91058..4c17247e 100644
--- a/amdgpu/amdgpu.h
+++ b/amdgpu/amdgpu.h
@@ -53,7 +53,7 @@ struct drm_amdgpu_info_hw_ip;
53 * 53 *
54 * \sa amdgpu_cs_ib_info 54 * \sa amdgpu_cs_ib_info
55*/ 55*/
56#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 4 56#define AMDGPU_CS_MAX_IBS_PER_SUBMIT 16
57 57
58/** 58/**
59 * Special timeout value meaning that the timeout is infinite. 59 * Special timeout value meaning that the timeout is infinite.