diff options
author | Marek Olšák | 2016-08-19 09:10:58 -0500 |
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committer | Marek Olšák | 2016-09-05 08:43:22 -0500 |
commit | 77bc69ae9cb2a719ae5142b4b91e6dc657e4c119 (patch) | |
tree | c2cccf3d77932d2b20f3333beb65e8c5fc6844a9 /include | |
parent | 39fff5996227692cf8b6a75771a28a8d624f16ef (diff) | |
download | external-libdrm-77bc69ae9cb2a719ae5142b4b91e6dc657e4c119.tar.gz external-libdrm-77bc69ae9cb2a719ae5142b4b91e6dc657e4c119.tar.xz external-libdrm-77bc69ae9cb2a719ae5142b4b91e6dc657e4c119.zip |
amdgpu: sync amdgpu_drm.h with the kernel
Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
Diffstat (limited to 'include')
-rw-r--r-- | include/drm/amdgpu_drm.h | 42 |
1 files changed, 26 insertions, 16 deletions
diff --git a/include/drm/amdgpu_drm.h b/include/drm/amdgpu_drm.h index d43895ed..d8f24976 100644 --- a/include/drm/amdgpu_drm.h +++ b/include/drm/amdgpu_drm.h | |||
@@ -34,6 +34,10 @@ | |||
34 | 34 | ||
35 | #include "drm.h" | 35 | #include "drm.h" |
36 | 36 | ||
37 | #if defined(__cplusplus) | ||
38 | extern "C" { | ||
39 | #endif | ||
40 | |||
37 | #define DRM_AMDGPU_GEM_CREATE 0x00 | 41 | #define DRM_AMDGPU_GEM_CREATE 0x00 |
38 | #define DRM_AMDGPU_GEM_MMAP 0x01 | 42 | #define DRM_AMDGPU_GEM_MMAP 0x01 |
39 | #define DRM_AMDGPU_CTX 0x02 | 43 | #define DRM_AMDGPU_CTX 0x02 |
@@ -485,6 +489,22 @@ struct drm_amdgpu_cs_chunk_data { | |||
485 | #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8 | 489 | #define AMDGPU_INFO_MMR_SH_INDEX_SHIFT 8 |
486 | #define AMDGPU_INFO_MMR_SH_INDEX_MASK 0xff | 490 | #define AMDGPU_INFO_MMR_SH_INDEX_MASK 0xff |
487 | 491 | ||
492 | struct drm_amdgpu_query_fw { | ||
493 | /** AMDGPU_INFO_FW_* */ | ||
494 | uint32_t fw_type; | ||
495 | /** | ||
496 | * Index of the IP if there are more IPs of | ||
497 | * the same type. | ||
498 | */ | ||
499 | uint32_t ip_instance; | ||
500 | /** | ||
501 | * Index of the engine. Whether this is used depends | ||
502 | * on the firmware type. (e.g. MEC, SDMA) | ||
503 | */ | ||
504 | uint32_t index; | ||
505 | uint32_t _pad; | ||
506 | }; | ||
507 | |||
488 | /* Input structure for the INFO ioctl */ | 508 | /* Input structure for the INFO ioctl */ |
489 | struct drm_amdgpu_info { | 509 | struct drm_amdgpu_info { |
490 | /* Where the return value will be stored */ | 510 | /* Where the return value will be stored */ |
@@ -520,21 +540,7 @@ struct drm_amdgpu_info { | |||
520 | uint32_t flags; | 540 | uint32_t flags; |
521 | } read_mmr_reg; | 541 | } read_mmr_reg; |
522 | 542 | ||
523 | struct { | 543 | struct drm_amdgpu_query_fw query_fw; |
524 | /** AMDGPU_INFO_FW_* */ | ||
525 | uint32_t fw_type; | ||
526 | /** | ||
527 | * Index of the IP if there are more IPs of | ||
528 | * the same type. | ||
529 | */ | ||
530 | uint32_t ip_instance; | ||
531 | /** | ||
532 | * Index of the engine. Whether this is used depends | ||
533 | * on the firmware type. (e.g. MEC, SDMA) | ||
534 | */ | ||
535 | uint32_t index; | ||
536 | uint32_t _pad; | ||
537 | } query_fw; | ||
538 | }; | 544 | }; |
539 | }; | 545 | }; |
540 | 546 | ||
@@ -642,6 +648,10 @@ struct drm_amdgpu_info_hw_ip { | |||
642 | #define AMDGPU_FAMILY_CI 120 /* Bonaire, Hawaii */ | 648 | #define AMDGPU_FAMILY_CI 120 /* Bonaire, Hawaii */ |
643 | #define AMDGPU_FAMILY_KV 125 /* Kaveri, Kabini, Mullins */ | 649 | #define AMDGPU_FAMILY_KV 125 /* Kaveri, Kabini, Mullins */ |
644 | #define AMDGPU_FAMILY_VI 130 /* Iceland, Tonga */ | 650 | #define AMDGPU_FAMILY_VI 130 /* Iceland, Tonga */ |
645 | #define AMDGPU_FAMILY_CZ 135 /* Carrizo */ | 651 | #define AMDGPU_FAMILY_CZ 135 /* Carrizo, Stoney */ |
652 | |||
653 | #if defined(__cplusplus) | ||
654 | } | ||
655 | #endif | ||
646 | 656 | ||
647 | #endif | 657 | #endif |