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-rw-r--r--.gitignore3
-rw-r--r--configure.ac1
-rw-r--r--tests/Makefile.am4
-rw-r--r--tests/etnaviv/Makefile.am41
-rw-r--r--tests/etnaviv/cmdstream.xml.h242
-rw-r--r--tests/etnaviv/etnaviv_2d_test.c240
-rw-r--r--tests/etnaviv/etnaviv_bo_cache_test.c121
-rw-r--r--tests/etnaviv/etnaviv_cmd_stream_test.c123
-rw-r--r--tests/etnaviv/state.xml.h375
-rw-r--r--tests/etnaviv/state_2d.xml.h1497
-rw-r--r--tests/etnaviv/write_bmp.c151
-rw-r--r--tests/etnaviv/write_bmp.h34
12 files changed, 2832 insertions, 0 deletions
diff --git a/.gitignore b/.gitignore
index 3226b3a6..d51e619b 100644
--- a/.gitignore
+++ b/.gitignore
@@ -102,4 +102,7 @@ tests/radeon/radeon_ttm
102tests/exynos/exynos_fimg2d_event 102tests/exynos/exynos_fimg2d_event
103tests/exynos/exynos_fimg2d_perf 103tests/exynos/exynos_fimg2d_perf
104tests/exynos/exynos_fimg2d_test 104tests/exynos/exynos_fimg2d_test
105tests/etnaviv/etnaviv_2d_test
106tests/etnaviv/etnaviv_cmd_stream_test
107tests/etnaviv/etnaviv_bo_cache_test
105man/*.3 108man/*.3
diff --git a/configure.ac b/configure.ac
index 64f3e6c9..330358a4 100644
--- a/configure.ac
+++ b/configure.ac
@@ -551,6 +551,7 @@ AC_CONFIG_FILES([
551 tests/exynos/Makefile 551 tests/exynos/Makefile
552 tests/tegra/Makefile 552 tests/tegra/Makefile
553 tests/nouveau/Makefile 553 tests/nouveau/Makefile
554 tests/etnaviv/Makefile
554 tests/util/Makefile 555 tests/util/Makefile
555 man/Makefile 556 man/Makefile
556 libdrm.pc]) 557 libdrm.pc])
diff --git a/tests/Makefile.am b/tests/Makefile.am
index 58feb123..4a499e42 100644
--- a/tests/Makefile.am
+++ b/tests/Makefile.am
@@ -22,6 +22,10 @@ if HAVE_TEGRA
22SUBDIRS += tegra 22SUBDIRS += tegra
23endif 23endif
24 24
25if HAVE_ETNAVIV
26SUBDIRS += etnaviv
27endif
28
25AM_CFLAGS = \ 29AM_CFLAGS = \
26 $(WARN_CFLAGS)\ 30 $(WARN_CFLAGS)\
27 -I $(top_srcdir)/include/drm \ 31 -I $(top_srcdir)/include/drm \
diff --git a/tests/etnaviv/Makefile.am b/tests/etnaviv/Makefile.am
new file mode 100644
index 00000000..06318643
--- /dev/null
+++ b/tests/etnaviv/Makefile.am
@@ -0,0 +1,41 @@
1AM_CFLAGS = \
2 -I $(top_srcdir)/include/drm \
3 -I $(top_srcdir)/etnaviv \
4 -I $(top_srcdir)
5
6if HAVE_INSTALL_TESTS
7bin_PROGRAMS = \
8 etnaviv_2d_test \
9 etnaviv_cmd_stream_test \
10 etnaviv_bo_cache_test
11else
12noinst_PROGRAMS = \
13 etnaviv_2d_test \
14 etnaviv_cmd_stream_test \
15 etnaviv_bo_cache_test
16endif
17
18etnaviv_2d_test_LDADD = \
19 $(top_builddir)/libdrm.la \
20 $(top_builddir)/etnaviv/libdrm_etnaviv.la
21
22etnaviv_2d_test_SOURCES = \
23 cmdstream.xml.h \
24 etnaviv_2d_test.c \
25 state.xml.h \
26 state_2d.xml.h \
27 write_bmp.c \
28 write_bmp.h
29
30etnaviv_cmd_stream_test_LDADD = \
31 $(top_builddir)/etnaviv/libdrm_etnaviv.la
32
33etnaviv_cmd_stream_test_SOURCES = \
34 etnaviv_cmd_stream_test.c
35
36etnaviv_bo_cache_test_LDADD = \
37 $(top_builddir)/libdrm.la \
38 $(top_builddir)/etnaviv/libdrm_etnaviv.la
39
40etnaviv_bo_cache_test_SOURCES = \
41 etnaviv_bo_cache_test.c
diff --git a/tests/etnaviv/cmdstream.xml.h b/tests/etnaviv/cmdstream.xml.h
new file mode 100644
index 00000000..109285c5
--- /dev/null
+++ b/tests/etnaviv/cmdstream.xml.h
@@ -0,0 +1,242 @@
1#ifndef CMDSTREAM_XML
2#define CMDSTREAM_XML
3
4/* Autogenerated file, DO NOT EDIT manually!
5
6This file was generated by the rules-ng-ng headergen tool in this git repository:
7http://0x04.net/cgit/index.cgi/rules-ng-ng
8git clone git://0x04.net/rules-ng-ng
9
10The rules-ng-ng source files this header was generated from are:
11- cmdstream.xml ( 12621 bytes, from 2016-09-06 14:44:16)
12- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16)
13- common.xml ( 20583 bytes, from 2016-09-06 14:14:12)
14
15Copyright (C) 2012-2016 by the following authors:
16- Wladimir J. van der Laan <laanwj@gmail.com>
17- Christian Gmeiner <christian.gmeiner@gmail.com>
18- Lucas Stach <l.stach@pengutronix.de>
19- Russell King <rmk@arm.linux.org.uk>
20
21Permission is hereby granted, free of charge, to any person obtaining a
22copy of this software and associated documentation files (the "Software"),
23to deal in the Software without restriction, including without limitation
24the rights to use, copy, modify, merge, publish, distribute, sub license,
25and/or sell copies of the Software, and to permit persons to whom the
26Software is furnished to do so, subject to the following conditions:
27
28The above copyright notice and this permission notice (including the
29next paragraph) shall be included in all copies or substantial portions
30of the Software.
31
32THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
33IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
34FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
35THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
36LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
37FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
38DEALINGS IN THE SOFTWARE.
39*/
40
41
42#define FE_OPCODE_LOAD_STATE 0x00000001
43#define FE_OPCODE_END 0x00000002
44#define FE_OPCODE_NOP 0x00000003
45#define FE_OPCODE_DRAW_2D 0x00000004
46#define FE_OPCODE_DRAW_PRIMITIVES 0x00000005
47#define FE_OPCODE_DRAW_INDEXED_PRIMITIVES 0x00000006
48#define FE_OPCODE_WAIT 0x00000007
49#define FE_OPCODE_LINK 0x00000008
50#define FE_OPCODE_STALL 0x00000009
51#define FE_OPCODE_CALL 0x0000000a
52#define FE_OPCODE_RETURN 0x0000000b
53#define FE_OPCODE_CHIP_SELECT 0x0000000d
54#define PRIMITIVE_TYPE_POINTS 0x00000001
55#define PRIMITIVE_TYPE_LINES 0x00000002
56#define PRIMITIVE_TYPE_LINE_STRIP 0x00000003
57#define PRIMITIVE_TYPE_TRIANGLES 0x00000004
58#define PRIMITIVE_TYPE_TRIANGLE_STRIP 0x00000005
59#define PRIMITIVE_TYPE_TRIANGLE_FAN 0x00000006
60#define PRIMITIVE_TYPE_LINE_LOOP 0x00000007
61#define PRIMITIVE_TYPE_QUADS 0x00000008
62#define VIV_FE_LOAD_STATE 0x00000000
63
64#define VIV_FE_LOAD_STATE_HEADER 0x00000000
65#define VIV_FE_LOAD_STATE_HEADER_OP__MASK 0xf8000000
66#define VIV_FE_LOAD_STATE_HEADER_OP__SHIFT 27
67#define VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE 0x08000000
68#define VIV_FE_LOAD_STATE_HEADER_FIXP 0x04000000
69#define VIV_FE_LOAD_STATE_HEADER_COUNT__MASK 0x03ff0000
70#define VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT 16
71#define VIV_FE_LOAD_STATE_HEADER_COUNT(x) (((x) << VIV_FE_LOAD_STATE_HEADER_COUNT__SHIFT) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK)
72#define VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK 0x0000ffff
73#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT 0
74#define VIV_FE_LOAD_STATE_HEADER_OFFSET(x) (((x) << VIV_FE_LOAD_STATE_HEADER_OFFSET__SHIFT) & VIV_FE_LOAD_STATE_HEADER_OFFSET__MASK)
75#define VIV_FE_LOAD_STATE_HEADER_OFFSET__SHR 2
76
77#define VIV_FE_END 0x00000000
78
79#define VIV_FE_END_HEADER 0x00000000
80#define VIV_FE_END_HEADER_EVENT_ID__MASK 0x0000001f
81#define VIV_FE_END_HEADER_EVENT_ID__SHIFT 0
82#define VIV_FE_END_HEADER_EVENT_ID(x) (((x) << VIV_FE_END_HEADER_EVENT_ID__SHIFT) & VIV_FE_END_HEADER_EVENT_ID__MASK)
83#define VIV_FE_END_HEADER_EVENT_ENABLE 0x00000100
84#define VIV_FE_END_HEADER_OP__MASK 0xf8000000
85#define VIV_FE_END_HEADER_OP__SHIFT 27
86#define VIV_FE_END_HEADER_OP_END 0x10000000
87
88#define VIV_FE_NOP 0x00000000
89
90#define VIV_FE_NOP_HEADER 0x00000000
91#define VIV_FE_NOP_HEADER_OP__MASK 0xf8000000
92#define VIV_FE_NOP_HEADER_OP__SHIFT 27
93#define VIV_FE_NOP_HEADER_OP_NOP 0x18000000
94
95#define VIV_FE_DRAW_2D 0x00000000
96
97#define VIV_FE_DRAW_2D_HEADER 0x00000000
98#define VIV_FE_DRAW_2D_HEADER_COUNT__MASK 0x0000ff00
99#define VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT 8
100#define VIV_FE_DRAW_2D_HEADER_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_COUNT__MASK)
101#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK 0x07ff0000
102#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT 16
103#define VIV_FE_DRAW_2D_HEADER_DATA_COUNT(x) (((x) << VIV_FE_DRAW_2D_HEADER_DATA_COUNT__SHIFT) & VIV_FE_DRAW_2D_HEADER_DATA_COUNT__MASK)
104#define VIV_FE_DRAW_2D_HEADER_OP__MASK 0xf8000000
105#define VIV_FE_DRAW_2D_HEADER_OP__SHIFT 27
106#define VIV_FE_DRAW_2D_HEADER_OP_DRAW_2D 0x20000000
107
108#define VIV_FE_DRAW_2D_TOP_LEFT 0x00000008
109#define VIV_FE_DRAW_2D_TOP_LEFT_X__MASK 0x0000ffff
110#define VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT 0
111#define VIV_FE_DRAW_2D_TOP_LEFT_X(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_X__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_X__MASK)
112#define VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK 0xffff0000
113#define VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT 16
114#define VIV_FE_DRAW_2D_TOP_LEFT_Y(x) (((x) << VIV_FE_DRAW_2D_TOP_LEFT_Y__SHIFT) & VIV_FE_DRAW_2D_TOP_LEFT_Y__MASK)
115
116#define VIV_FE_DRAW_2D_BOTTOM_RIGHT 0x0000000c
117#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK 0x0000ffff
118#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT 0
119#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_X__MASK)
120#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK 0xffff0000
121#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT 16
122#define VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(x) (((x) << VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__SHIFT) & VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y__MASK)
123
124#define VIV_FE_DRAW_PRIMITIVES 0x00000000
125
126#define VIV_FE_DRAW_PRIMITIVES_HEADER 0x00000000
127#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__MASK 0xf8000000
128#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP__SHIFT 27
129#define VIV_FE_DRAW_PRIMITIVES_HEADER_OP_DRAW_PRIMITIVES 0x28000000
130
131#define VIV_FE_DRAW_PRIMITIVES_COMMAND 0x00000004
132#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff
133#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT 0
134#define VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_PRIMITIVES_COMMAND_TYPE__MASK)
135
136#define VIV_FE_DRAW_PRIMITIVES_START 0x00000008
137
138#define VIV_FE_DRAW_PRIMITIVES_COUNT 0x0000000c
139
140#define VIV_FE_DRAW_INDEXED_PRIMITIVES 0x00000000
141
142#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER 0x00000000
143#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__MASK 0xf8000000
144#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP__SHIFT 27
145#define VIV_FE_DRAW_INDEXED_PRIMITIVES_HEADER_OP_DRAW_INDEXED_PRIMITIVES 0x30000000
146
147#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND 0x00000004
148#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK 0x000000ff
149#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT 0
150#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE(x) (((x) << VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__SHIFT) & VIV_FE_DRAW_INDEXED_PRIMITIVES_COMMAND_TYPE__MASK)
151
152#define VIV_FE_DRAW_INDEXED_PRIMITIVES_START 0x00000008
153
154#define VIV_FE_DRAW_INDEXED_PRIMITIVES_COUNT 0x0000000c
155
156#define VIV_FE_DRAW_INDEXED_PRIMITIVES_OFFSET 0x00000010
157
158#define VIV_FE_WAIT 0x00000000
159
160#define VIV_FE_WAIT_HEADER 0x00000000
161#define VIV_FE_WAIT_HEADER_DELAY__MASK 0x0000ffff
162#define VIV_FE_WAIT_HEADER_DELAY__SHIFT 0
163#define VIV_FE_WAIT_HEADER_DELAY(x) (((x) << VIV_FE_WAIT_HEADER_DELAY__SHIFT) & VIV_FE_WAIT_HEADER_DELAY__MASK)
164#define VIV_FE_WAIT_HEADER_OP__MASK 0xf8000000
165#define VIV_FE_WAIT_HEADER_OP__SHIFT 27
166#define VIV_FE_WAIT_HEADER_OP_WAIT 0x38000000
167
168#define VIV_FE_LINK 0x00000000
169
170#define VIV_FE_LINK_HEADER 0x00000000
171#define VIV_FE_LINK_HEADER_PREFETCH__MASK 0x0000ffff
172#define VIV_FE_LINK_HEADER_PREFETCH__SHIFT 0
173#define VIV_FE_LINK_HEADER_PREFETCH(x) (((x) << VIV_FE_LINK_HEADER_PREFETCH__SHIFT) & VIV_FE_LINK_HEADER_PREFETCH__MASK)
174#define VIV_FE_LINK_HEADER_OP__MASK 0xf8000000
175#define VIV_FE_LINK_HEADER_OP__SHIFT 27
176#define VIV_FE_LINK_HEADER_OP_LINK 0x40000000
177
178#define VIV_FE_LINK_ADDRESS 0x00000004
179
180#define VIV_FE_STALL 0x00000000
181
182#define VIV_FE_STALL_HEADER 0x00000000
183#define VIV_FE_STALL_HEADER_OP__MASK 0xf8000000
184#define VIV_FE_STALL_HEADER_OP__SHIFT 27
185#define VIV_FE_STALL_HEADER_OP_STALL 0x48000000
186
187#define VIV_FE_STALL_TOKEN 0x00000004
188#define VIV_FE_STALL_TOKEN_FROM__MASK 0x0000001f
189#define VIV_FE_STALL_TOKEN_FROM__SHIFT 0
190#define VIV_FE_STALL_TOKEN_FROM(x) (((x) << VIV_FE_STALL_TOKEN_FROM__SHIFT) & VIV_FE_STALL_TOKEN_FROM__MASK)
191#define VIV_FE_STALL_TOKEN_TO__MASK 0x00001f00
192#define VIV_FE_STALL_TOKEN_TO__SHIFT 8
193#define VIV_FE_STALL_TOKEN_TO(x) (((x) << VIV_FE_STALL_TOKEN_TO__SHIFT) & VIV_FE_STALL_TOKEN_TO__MASK)
194
195#define VIV_FE_CALL 0x00000000
196
197#define VIV_FE_CALL_HEADER 0x00000000
198#define VIV_FE_CALL_HEADER_PREFETCH__MASK 0x0000ffff
199#define VIV_FE_CALL_HEADER_PREFETCH__SHIFT 0
200#define VIV_FE_CALL_HEADER_PREFETCH(x) (((x) << VIV_FE_CALL_HEADER_PREFETCH__SHIFT) & VIV_FE_CALL_HEADER_PREFETCH__MASK)
201#define VIV_FE_CALL_HEADER_OP__MASK 0xf8000000
202#define VIV_FE_CALL_HEADER_OP__SHIFT 27
203#define VIV_FE_CALL_HEADER_OP_CALL 0x50000000
204
205#define VIV_FE_CALL_ADDRESS 0x00000004
206
207#define VIV_FE_CALL_RETURN_PREFETCH 0x00000008
208
209#define VIV_FE_CALL_RETURN_ADDRESS 0x0000000c
210
211#define VIV_FE_RETURN 0x00000000
212
213#define VIV_FE_RETURN_HEADER 0x00000000
214#define VIV_FE_RETURN_HEADER_OP__MASK 0xf8000000
215#define VIV_FE_RETURN_HEADER_OP__SHIFT 27
216#define VIV_FE_RETURN_HEADER_OP_RETURN 0x58000000
217
218#define VIV_FE_CHIP_SELECT 0x00000000
219
220#define VIV_FE_CHIP_SELECT_HEADER 0x00000000
221#define VIV_FE_CHIP_SELECT_HEADER_OP__MASK 0xf8000000
222#define VIV_FE_CHIP_SELECT_HEADER_OP__SHIFT 27
223#define VIV_FE_CHIP_SELECT_HEADER_OP_CHIP_SELECT 0x68000000
224#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP15 0x00008000
225#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP14 0x00004000
226#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP13 0x00002000
227#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP12 0x00001000
228#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP11 0x00000800
229#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP10 0x00000400
230#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP9 0x00000200
231#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP8 0x00000100
232#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP7 0x00000080
233#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP6 0x00000040
234#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP5 0x00000020
235#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP4 0x00000010
236#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP3 0x00000008
237#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP2 0x00000004
238#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP1 0x00000002
239#define VIV_FE_CHIP_SELECT_HEADER_ENABLE_CHIP0 0x00000001
240
241
242#endif /* CMDSTREAM_XML */
diff --git a/tests/etnaviv/etnaviv_2d_test.c b/tests/etnaviv/etnaviv_2d_test.c
new file mode 100644
index 00000000..10751c73
--- /dev/null
+++ b/tests/etnaviv/etnaviv_2d_test.c
@@ -0,0 +1,240 @@
1/*
2 * Copyright (C) 2014-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Christian Gmeiner <christian.gmeiner@gmail.com>
25 */
26
27#ifdef HAVE_CONFIG_H
28# include "config.h"
29#endif
30
31#include <fcntl.h>
32#include <stdio.h>
33#include <string.h>
34#include <unistd.h>
35
36#include "xf86drm.h"
37#include "etnaviv_drmif.h"
38#include "etnaviv_drm.h"
39
40#include "state.xml.h"
41#include "state_2d.xml.h"
42#include "cmdstream.xml.h"
43
44#include "write_bmp.h"
45
46static inline void etna_emit_load_state(struct etna_cmd_stream *stream,
47 const uint16_t offset, const uint16_t count)
48{
49 uint32_t v;
50
51 v = (VIV_FE_LOAD_STATE_HEADER_OP_LOAD_STATE | VIV_FE_LOAD_STATE_HEADER_OFFSET(offset) |
52 (VIV_FE_LOAD_STATE_HEADER_COUNT(count) & VIV_FE_LOAD_STATE_HEADER_COUNT__MASK));
53
54 etna_cmd_stream_emit(stream, v);
55}
56
57static inline void etna_set_state(struct etna_cmd_stream *stream, uint32_t address, uint32_t value)
58{
59 etna_cmd_stream_reserve(stream, 2);
60 etna_emit_load_state(stream, address >> 2, 1);
61 etna_cmd_stream_emit(stream, value);
62}
63
64static inline void etna_set_state_from_bo(struct etna_cmd_stream *stream,
65 uint32_t address, struct etna_bo *bo)
66{
67 etna_cmd_stream_reserve(stream, 2);
68 etna_emit_load_state(stream, address >> 2, 1);
69
70 etna_cmd_stream_reloc(stream, &(struct etna_reloc){
71 .bo = bo,
72 .flags = ETNA_RELOC_READ,
73 .offset = 0,
74 });
75}
76
77static void gen_cmd_stream(struct etna_cmd_stream *stream, struct etna_bo *bmp, const int width, const int height)
78{
79 int rec;
80 static int num_rects = 256;
81
82 etna_set_state(stream, VIVS_DE_SRC_STRIDE, 0);
83 etna_set_state(stream, VIVS_DE_SRC_ROTATION_CONFIG, 0);
84 etna_set_state(stream, VIVS_DE_SRC_CONFIG, 0);
85 etna_set_state(stream, VIVS_DE_SRC_ORIGIN, 0);
86 etna_set_state(stream, VIVS_DE_SRC_SIZE, 0);
87 etna_set_state(stream, VIVS_DE_SRC_COLOR_BG, 0);
88 etna_set_state(stream, VIVS_DE_SRC_COLOR_FG, 0);
89 etna_set_state(stream, VIVS_DE_STRETCH_FACTOR_LOW, 0);
90 etna_set_state(stream, VIVS_DE_STRETCH_FACTOR_HIGH, 0);
91 etna_set_state_from_bo(stream, VIVS_DE_DEST_ADDRESS, bmp);
92 etna_set_state(stream, VIVS_DE_DEST_STRIDE, width*4);
93 etna_set_state(stream, VIVS_DE_DEST_ROTATION_CONFIG, 0);
94 etna_set_state(stream, VIVS_DE_DEST_CONFIG,
95 VIVS_DE_DEST_CONFIG_FORMAT(DE_FORMAT_A8R8G8B8) |
96 VIVS_DE_DEST_CONFIG_COMMAND_CLEAR |
97 VIVS_DE_DEST_CONFIG_SWIZZLE(DE_SWIZZLE_ARGB) |
98 VIVS_DE_DEST_CONFIG_TILED_DISABLE |
99 VIVS_DE_DEST_CONFIG_MINOR_TILED_DISABLE
100 );
101 etna_set_state(stream, VIVS_DE_ROP,
102 VIVS_DE_ROP_ROP_FG(0xcc) | VIVS_DE_ROP_ROP_BG(0xcc) | VIVS_DE_ROP_TYPE_ROP4);
103 etna_set_state(stream, VIVS_DE_CLIP_TOP_LEFT,
104 VIVS_DE_CLIP_TOP_LEFT_X(0) |
105 VIVS_DE_CLIP_TOP_LEFT_Y(0)
106 );
107 etna_set_state(stream, VIVS_DE_CLIP_BOTTOM_RIGHT,
108 VIVS_DE_CLIP_BOTTOM_RIGHT_X(width) |
109 VIVS_DE_CLIP_BOTTOM_RIGHT_Y(height)
110 );
111 etna_set_state(stream, VIVS_DE_CONFIG, 0); /* TODO */
112 etna_set_state(stream, VIVS_DE_SRC_ORIGIN_FRACTION, 0);
113 etna_set_state(stream, VIVS_DE_ALPHA_CONTROL, 0);
114 etna_set_state(stream, VIVS_DE_ALPHA_MODES, 0);
115 etna_set_state(stream, VIVS_DE_DEST_ROTATION_HEIGHT, 0);
116 etna_set_state(stream, VIVS_DE_SRC_ROTATION_HEIGHT, 0);
117 etna_set_state(stream, VIVS_DE_ROT_ANGLE, 0);
118
119 /* Clear color PE20 */
120 etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE32, 0xff40ff40);
121 /* Clear color PE10 */
122 etna_set_state(stream, VIVS_DE_CLEAR_BYTE_MASK, 0xff);
123 etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE_LOW, 0xff40ff40);
124 etna_set_state(stream, VIVS_DE_CLEAR_PIXEL_VALUE_HIGH, 0xff40ff40);
125
126 etna_set_state(stream, VIVS_DE_DEST_COLOR_KEY, 0);
127 etna_set_state(stream, VIVS_DE_GLOBAL_SRC_COLOR, 0);
128 etna_set_state(stream, VIVS_DE_GLOBAL_DEST_COLOR, 0);
129 etna_set_state(stream, VIVS_DE_COLOR_MULTIPLY_MODES, 0);
130 etna_set_state(stream, VIVS_DE_PE_TRANSPARENCY, 0);
131 etna_set_state(stream, VIVS_DE_PE_CONTROL, 0);
132 etna_set_state(stream, VIVS_DE_PE_DITHER_LOW, 0xffffffff);
133 etna_set_state(stream, VIVS_DE_PE_DITHER_HIGH, 0xffffffff);
134
135 /* Queue DE command */
136 etna_cmd_stream_emit(stream,
137 VIV_FE_DRAW_2D_HEADER_OP_DRAW_2D | VIV_FE_DRAW_2D_HEADER_COUNT(num_rects) /* render one rectangle */
138 );
139 etna_cmd_stream_emit(stream, 0x0); /* rectangles start aligned */
140
141 for(rec=0; rec < num_rects; ++rec) {
142 int x = rec%16;
143 int y = rec/16;
144 etna_cmd_stream_emit(stream, VIV_FE_DRAW_2D_TOP_LEFT_X(x*8) | VIV_FE_DRAW_2D_TOP_LEFT_Y(y*8));
145 etna_cmd_stream_emit(stream, VIV_FE_DRAW_2D_BOTTOM_RIGHT_X(x*8+4) | VIV_FE_DRAW_2D_BOTTOM_RIGHT_Y(y*8+4));
146 }
147 etna_set_state(stream, 1, 0);
148 etna_set_state(stream, 1, 0);
149 etna_set_state(stream, 1, 0);
150
151 etna_set_state(stream, VIVS_GL_FLUSH_CACHE, VIVS_GL_FLUSH_CACHE_PE2D);
152}
153
154int main(int argc, char *argv[])
155{
156 const int width = 256;
157 const int height = 256;
158 const size_t bmp_size = width * height * 4;
159
160 struct etna_device *dev;
161 struct etna_gpu *gpu;
162 struct etna_pipe *pipe;
163 struct etna_bo *bmp;
164 struct etna_cmd_stream *stream;
165
166 drmVersionPtr version;
167 int fd, ret = 0;
168
169 fd = open(argv[1], O_RDWR);
170 if (fd < 0)
171 return 1;
172
173 version = drmGetVersion(fd);
174 if (version) {
175 printf("Version: %d.%d.%d\n", version->version_major,
176 version->version_minor, version->version_patchlevel);
177 printf(" Name: %s\n", version->name);
178 printf(" Date: %s\n", version->date);
179 printf(" Description: %s\n", version->desc);
180 drmFreeVersion(version);
181 }
182
183 dev = etna_device_new(fd);
184 if (!dev) {
185 ret = 2;
186 goto out;
187 }
188
189 /* TODO: we assume that core 0 is a 2D capable one */
190 gpu = etna_gpu_new(dev, 0);
191 if (!gpu) {
192 ret = 3;
193 goto out_device;
194 }
195
196 pipe = etna_pipe_new(gpu, ETNA_PIPE_2D);
197 if (!pipe) {
198 ret = 4;
199 goto out_gpu;
200 }
201
202 bmp = etna_bo_new(dev, bmp_size, ETNA_BO_UNCACHED);
203 if (!bmp) {
204 ret = 5;
205 goto out_pipe;
206 }
207 memset(etna_bo_map(bmp), 0, bmp_size);
208
209 stream = etna_cmd_stream_new(pipe, 0x300, NULL, NULL);
210 if (!stream) {
211 ret = 6;
212 goto out_bo;
213 }
214
215 /* generate command sequence */
216 gen_cmd_stream(stream, bmp, width, height);
217
218 etna_cmd_stream_finish(stream);
219
220 bmp_dump32(etna_bo_map(bmp), width, height, false, "/tmp/etna.bmp");
221
222 etna_cmd_stream_del(stream);
223
224out_bo:
225 etna_bo_del(bmp);
226
227out_pipe:
228 etna_pipe_del(pipe);
229
230out_gpu:
231 etna_gpu_del(gpu);
232
233out_device:
234 etna_device_del(dev);
235
236out:
237 close(fd);
238
239 return ret;
240}
diff --git a/tests/etnaviv/etnaviv_bo_cache_test.c b/tests/etnaviv/etnaviv_bo_cache_test.c
new file mode 100644
index 00000000..fb01f8d3
--- /dev/null
+++ b/tests/etnaviv/etnaviv_bo_cache_test.c
@@ -0,0 +1,121 @@
1/*
2 * Copyright (C) 2016 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Christian Gmeiner <christian.gmeiner@gmail.com>
25 */
26
27#ifdef HAVE_CONFIG_H
28# include "config.h"
29#endif
30
31#undef NDEBUG
32#include <assert.h>
33
34#include <fcntl.h>
35#include <stdio.h>
36#include <string.h>
37#include <unistd.h>
38
39#include "xf86drm.h"
40#include "etnaviv_drmif.h"
41#include "etnaviv_drm.h"
42
43static void test_cache(struct etna_device *dev)
44{
45 struct etna_bo *bo, *tmp;
46
47 /* allocate and free some bo's with same size - we must
48 * get the same bo over and over. */
49 printf("testing bo cache ... ");
50
51 bo = tmp = etna_bo_new(dev, 0x100, ETNA_BO_UNCACHED);
52 assert(bo);
53 etna_bo_del(bo);
54
55 for (unsigned i = 0; i < 100; i++) {
56 tmp = etna_bo_new(dev, 0x100, ETNA_BO_UNCACHED);
57 etna_bo_del(tmp);
58 assert(tmp == bo);
59 }
60
61 printf("ok\n");
62}
63
64static void test_size_rounding(struct etna_device *dev)
65{
66 struct etna_bo *bo;
67
68 printf("testing size rounding ... ");
69
70 bo = etna_bo_new(dev, 15, ETNA_BO_UNCACHED);
71 assert(etna_bo_size(bo) == 4096);
72 etna_bo_del(bo);
73
74 bo = etna_bo_new(dev, 4096, ETNA_BO_UNCACHED);
75 assert(etna_bo_size(bo) == 4096);
76 etna_bo_del(bo);
77
78 bo = etna_bo_new(dev, 4100, ETNA_BO_UNCACHED);
79 assert(etna_bo_size(bo) == 8192);
80 etna_bo_del(bo);
81
82 printf("ok\n");
83}
84
85int main(int argc, char *argv[])
86{
87 struct etna_device *dev;
88
89 drmVersionPtr version;
90 int fd, ret = 0;
91
92 fd = open(argv[1], O_RDWR);
93 if (fd < 0)
94 return 1;
95
96 version = drmGetVersion(fd);
97 if (version) {
98 printf("Version: %d.%d.%d\n", version->version_major,
99 version->version_minor, version->version_patchlevel);
100 printf(" Name: %s\n", version->name);
101 printf(" Date: %s\n", version->date);
102 printf(" Description: %s\n", version->desc);
103 drmFreeVersion(version);
104 }
105
106 dev = etna_device_new(fd);
107 if (!dev) {
108 ret = 2;
109 goto out;
110 }
111
112 test_cache(dev);
113 test_size_rounding(dev);
114
115 etna_device_del(dev);
116
117out:
118 close(fd);
119
120 return ret;
121}
diff --git a/tests/etnaviv/etnaviv_cmd_stream_test.c b/tests/etnaviv/etnaviv_cmd_stream_test.c
new file mode 100644
index 00000000..b650aae2
--- /dev/null
+++ b/tests/etnaviv/etnaviv_cmd_stream_test.c
@@ -0,0 +1,123 @@
1/*
2 * Copyright (C) 2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Christian Gmeiner <christian.gmeiner@gmail.com>
25 */
26
27#undef NDEBUG
28#include <assert.h>
29#include <string.h>
30#include <stdio.h>
31
32#include "etnaviv_drmif.h"
33
34static void test_avail()
35{
36 struct etna_cmd_stream *stream;
37
38 printf("testing etna_cmd_stream_avail ... ");
39
40 /* invalid size */
41 stream = etna_cmd_stream_new(NULL, 0, NULL, NULL);
42 assert(stream == NULL);
43
44 stream = etna_cmd_stream_new(NULL, 4, NULL, NULL);
45 assert(stream);
46 assert(etna_cmd_stream_avail(stream) == 2);
47 etna_cmd_stream_del(stream);
48
49 stream = etna_cmd_stream_new(NULL, 20, NULL, NULL);
50 assert(stream);
51 assert(etna_cmd_stream_avail(stream) == 18);
52 etna_cmd_stream_del(stream);
53
54 /* odd number of 32 bit words */
55 stream = etna_cmd_stream_new(NULL, 1, NULL, NULL);
56 assert(stream);
57 assert(etna_cmd_stream_avail(stream) == 0);
58 etna_cmd_stream_del(stream);
59
60 stream = etna_cmd_stream_new(NULL, 23, NULL, NULL);
61 assert(stream);
62 assert(etna_cmd_stream_avail(stream) == 22);
63 etna_cmd_stream_del(stream);
64
65 printf("ok\n");
66}
67
68static void test_emit()
69{
70 struct etna_cmd_stream *stream;
71
72 printf("testing etna_cmd_stream_emit ... ");
73
74 stream = etna_cmd_stream_new(NULL, 6, NULL, NULL);
75 assert(stream);
76 assert(etna_cmd_stream_avail(stream) == 4);
77
78 etna_cmd_stream_emit(stream, 0x1);
79 assert(etna_cmd_stream_avail(stream) == 3);
80
81 etna_cmd_stream_emit(stream, 0x2);
82 assert(etna_cmd_stream_avail(stream) == 2);
83
84 etna_cmd_stream_emit(stream, 0x3);
85 assert(etna_cmd_stream_avail(stream) == 1);
86
87 etna_cmd_stream_del(stream);
88
89 printf("ok\n");
90}
91
92static void test_offset()
93{
94 struct etna_cmd_stream *stream;
95
96 printf("testing etna_cmd_stream_offset ... ");
97
98 stream = etna_cmd_stream_new(NULL, 6, NULL, NULL);
99 assert(etna_cmd_stream_offset(stream) == 0);
100
101 etna_cmd_stream_emit(stream, 0x1);
102 assert(etna_cmd_stream_offset(stream) == 1);
103
104 etna_cmd_stream_emit(stream, 0x2);
105 assert(etna_cmd_stream_offset(stream) == 2);
106
107 etna_cmd_stream_emit(stream, 0x3);
108 etna_cmd_stream_emit(stream, 0x4);
109 assert(etna_cmd_stream_offset(stream) == 4);
110
111 etna_cmd_stream_del(stream);
112
113 printf("ok\n");
114}
115
116int main(int argc, char *argv[])
117{
118 test_avail();
119 test_emit();
120 test_offset();
121
122 return 0;
123}
diff --git a/tests/etnaviv/state.xml.h b/tests/etnaviv/state.xml.h
new file mode 100644
index 00000000..e1ecbf3a
--- /dev/null
+++ b/tests/etnaviv/state.xml.h
@@ -0,0 +1,375 @@
1#ifndef STATE_XML
2#define STATE_XML
3
4/* Autogenerated file, DO NOT EDIT manually!
5
6This file was generated by the rules-ng-ng headergen tool in this git repository:
7http://0x04.net/cgit/index.cgi/rules-ng-ng
8git clone git://0x04.net/rules-ng-ng
9
10The rules-ng-ng source files this header was generated from are:
11- state.xml ( 18940 bytes, from 2016-09-06 14:14:12)
12- common.xml ( 20583 bytes, from 2016-09-06 14:14:12)
13- state_hi.xml ( 25653 bytes, from 2016-09-06 14:45:17)
14- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16)
15- state_2d.xml ( 51552 bytes, from 2016-09-06 14:44:16)
16- state_3d.xml ( 54603 bytes, from 2016-09-06 14:44:16)
17- state_vg.xml ( 5975 bytes, from 2016-09-06 14:44:16)
18
19Copyright (C) 2012-2016 by the following authors:
20- Wladimir J. van der Laan <laanwj@gmail.com>
21- Christian Gmeiner <christian.gmeiner@gmail.com>
22- Lucas Stach <l.stach@pengutronix.de>
23- Russell King <rmk@arm.linux.org.uk>
24
25Permission is hereby granted, free of charge, to any person obtaining a
26copy of this software and associated documentation files (the "Software"),
27to deal in the Software without restriction, including without limitation
28the rights to use, copy, modify, merge, publish, distribute, sub license,
29and/or sell copies of the Software, and to permit persons to whom the
30Software is furnished to do so, subject to the following conditions:
31
32The above copyright notice and this permission notice (including the
33next paragraph) shall be included in all copies or substantial portions
34of the Software.
35
36THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
37IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
38FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
39THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
40LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
42DEALINGS IN THE SOFTWARE.
43*/
44
45
46#define VARYING_COMPONENT_USE_UNUSED 0x00000000
47#define VARYING_COMPONENT_USE_USED 0x00000001
48#define VARYING_COMPONENT_USE_POINTCOORD_X 0x00000002
49#define VARYING_COMPONENT_USE_POINTCOORD_Y 0x00000003
50#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK 0x000000ff
51#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT 0
52#define FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE(x) (((x) << FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__SHIFT) & FE_VERTEX_STREAM_CONTROL_VERTEX_STRIDE__MASK)
53#define VIVS_FE 0x00000000
54
55#define VIVS_FE_VERTEX_ELEMENT_CONFIG(i0) (0x00000600 + 0x4*(i0))
56#define VIVS_FE_VERTEX_ELEMENT_CONFIG__ESIZE 0x00000004
57#define VIVS_FE_VERTEX_ELEMENT_CONFIG__LEN 0x00000010
58#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__MASK 0x0000000f
59#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE__SHIFT 0
60#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_BYTE 0x00000000
61#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_BYTE 0x00000001
62#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_SHORT 0x00000002
63#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_SHORT 0x00000003
64#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT 0x00000004
65#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT 0x00000005
66#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FLOAT 0x00000008
67#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_HALF_FLOAT 0x00000009
68#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_FIXED 0x0000000b
69#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_INT_10_10_10_2 0x0000000c
70#define VIVS_FE_VERTEX_ELEMENT_CONFIG_TYPE_UNSIGNED_INT_10_10_10_2 0x0000000d
71#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK 0x00000030
72#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT 4
73#define VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_ENDIAN__MASK)
74#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NONCONSECUTIVE 0x00000080
75#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK 0x00000700
76#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT 8
77#define VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_STREAM__MASK)
78#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK 0x00003000
79#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT 12
80#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_NUM__MASK)
81#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__MASK 0x0000c000
82#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE__SHIFT 14
83#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF 0x00000000
84#define VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_ON 0x00008000
85#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK 0x00ff0000
86#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT 16
87#define VIVS_FE_VERTEX_ELEMENT_CONFIG_START(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_START__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_START__MASK)
88#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK 0xff000000
89#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT 24
90#define VIVS_FE_VERTEX_ELEMENT_CONFIG_END(x) (((x) << VIVS_FE_VERTEX_ELEMENT_CONFIG_END__SHIFT) & VIVS_FE_VERTEX_ELEMENT_CONFIG_END__MASK)
91
92#define VIVS_FE_CMD_STREAM_BASE_ADDR 0x00000640
93
94#define VIVS_FE_INDEX_STREAM_BASE_ADDR 0x00000644
95
96#define VIVS_FE_INDEX_STREAM_CONTROL 0x00000648
97#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__MASK 0x00000003
98#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE__SHIFT 0
99#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR 0x00000000
100#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT 0x00000001
101#define VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT 0x00000002
102
103#define VIVS_FE_VERTEX_STREAM_BASE_ADDR 0x0000064c
104
105#define VIVS_FE_VERTEX_STREAM_CONTROL 0x00000650
106
107#define VIVS_FE_COMMAND_ADDRESS 0x00000654
108
109#define VIVS_FE_COMMAND_CONTROL 0x00000658
110#define VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK 0x0000ffff
111#define VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT 0
112#define VIVS_FE_COMMAND_CONTROL_PREFETCH(x) (((x) << VIVS_FE_COMMAND_CONTROL_PREFETCH__SHIFT) & VIVS_FE_COMMAND_CONTROL_PREFETCH__MASK)
113#define VIVS_FE_COMMAND_CONTROL_ENABLE 0x00010000
114
115#define VIVS_FE_DMA_STATUS 0x0000065c
116
117#define VIVS_FE_DMA_DEBUG_STATE 0x00000660
118#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__MASK 0x0000001f
119#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE__SHIFT 0
120#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_IDLE 0x00000000
121#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DEC 0x00000001
122#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR0 0x00000002
123#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD0 0x00000003
124#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_ADR1 0x00000004
125#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LOAD1 0x00000005
126#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DADR 0x00000006
127#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCMD 0x00000007
128#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DCNTL 0x00000008
129#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_3DIDXCNTL 0x00000009
130#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_INITREQDMA 0x0000000a
131#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAWIDX 0x0000000b
132#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_DRAW 0x0000000c
133#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT0 0x0000000d
134#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DRECT1 0x0000000e
135#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA0 0x0000000f
136#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_2DDATA1 0x00000010
137#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAITFIFO 0x00000011
138#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_WAIT 0x00000012
139#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_LINK 0x00000013
140#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_END 0x00000014
141#define VIVS_FE_DMA_DEBUG_STATE_CMD_STATE_STALL 0x00000015
142#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__MASK 0x00000300
143#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE__SHIFT 8
144#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_IDLE 0x00000000
145#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_START 0x00000100
146#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_REQ 0x00000200
147#define VIVS_FE_DMA_DEBUG_STATE_CMD_DMA_STATE_END 0x00000300
148#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__MASK 0x00000c00
149#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE__SHIFT 10
150#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_IDLE 0x00000000
151#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_RAMVALID 0x00000400
152#define VIVS_FE_DMA_DEBUG_STATE_CMD_FETCH_STATE_VALID 0x00000800
153#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__MASK 0x00003000
154#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE__SHIFT 12
155#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_IDLE 0x00000000
156#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_WAITIDX 0x00001000
157#define VIVS_FE_DMA_DEBUG_STATE_REQ_DMA_STATE_CAL 0x00002000
158#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__MASK 0x0000c000
159#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE__SHIFT 14
160#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDLE 0x00000000
161#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_LDADR 0x00004000
162#define VIVS_FE_DMA_DEBUG_STATE_CAL_STATE_IDXCALC 0x00008000
163#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__MASK 0x00030000
164#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE__SHIFT 16
165#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_IDLE 0x00000000
166#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_CKCACHE 0x00010000
167#define VIVS_FE_DMA_DEBUG_STATE_VE_REQ_STATE_MISS 0x00020000
168
169#define VIVS_FE_DMA_ADDRESS 0x00000664
170
171#define VIVS_FE_DMA_LOW 0x00000668
172
173#define VIVS_FE_DMA_HIGH 0x0000066c
174
175#define VIVS_FE_AUTO_FLUSH 0x00000670
176
177#define VIVS_FE_UNK00678 0x00000678
178
179#define VIVS_FE_UNK0067C 0x0000067c
180
181#define VIVS_FE_VERTEX_STREAMS(i0) (0x00000000 + 0x4*(i0))
182#define VIVS_FE_VERTEX_STREAMS__ESIZE 0x00000004
183#define VIVS_FE_VERTEX_STREAMS__LEN 0x00000008
184
185#define VIVS_FE_VERTEX_STREAMS_BASE_ADDR(i0) (0x00000680 + 0x4*(i0))
186
187#define VIVS_FE_VERTEX_STREAMS_CONTROL(i0) (0x000006a0 + 0x4*(i0))
188
189#define VIVS_FE_UNK00700(i0) (0x00000700 + 0x4*(i0))
190#define VIVS_FE_UNK00700__ESIZE 0x00000004
191#define VIVS_FE_UNK00700__LEN 0x00000010
192
193#define VIVS_FE_UNK00740(i0) (0x00000740 + 0x4*(i0))
194#define VIVS_FE_UNK00740__ESIZE 0x00000004
195#define VIVS_FE_UNK00740__LEN 0x00000010
196
197#define VIVS_FE_UNK00780(i0) (0x00000780 + 0x4*(i0))
198#define VIVS_FE_UNK00780__ESIZE 0x00000004
199#define VIVS_FE_UNK00780__LEN 0x00000010
200
201#define VIVS_GL 0x00000000
202
203#define VIVS_GL_PIPE_SELECT 0x00003800
204#define VIVS_GL_PIPE_SELECT_PIPE__MASK 0x00000001
205#define VIVS_GL_PIPE_SELECT_PIPE__SHIFT 0
206#define VIVS_GL_PIPE_SELECT_PIPE(x) (((x) << VIVS_GL_PIPE_SELECT_PIPE__SHIFT) & VIVS_GL_PIPE_SELECT_PIPE__MASK)
207
208#define VIVS_GL_EVENT 0x00003804
209#define VIVS_GL_EVENT_EVENT_ID__MASK 0x0000001f
210#define VIVS_GL_EVENT_EVENT_ID__SHIFT 0
211#define VIVS_GL_EVENT_EVENT_ID(x) (((x) << VIVS_GL_EVENT_EVENT_ID__SHIFT) & VIVS_GL_EVENT_EVENT_ID__MASK)
212#define VIVS_GL_EVENT_FROM_FE 0x00000020
213#define VIVS_GL_EVENT_FROM_PE 0x00000040
214#define VIVS_GL_EVENT_SOURCE__MASK 0x00001f00
215#define VIVS_GL_EVENT_SOURCE__SHIFT 8
216#define VIVS_GL_EVENT_SOURCE(x) (((x) << VIVS_GL_EVENT_SOURCE__SHIFT) & VIVS_GL_EVENT_SOURCE__MASK)
217
218#define VIVS_GL_SEMAPHORE_TOKEN 0x00003808
219#define VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK 0x0000001f
220#define VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT 0
221#define VIVS_GL_SEMAPHORE_TOKEN_FROM(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_FROM__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_FROM__MASK)
222#define VIVS_GL_SEMAPHORE_TOKEN_TO__MASK 0x00001f00
223#define VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT 8
224#define VIVS_GL_SEMAPHORE_TOKEN_TO(x) (((x) << VIVS_GL_SEMAPHORE_TOKEN_TO__SHIFT) & VIVS_GL_SEMAPHORE_TOKEN_TO__MASK)
225
226#define VIVS_GL_FLUSH_CACHE 0x0000380c
227#define VIVS_GL_FLUSH_CACHE_DEPTH 0x00000001
228#define VIVS_GL_FLUSH_CACHE_COLOR 0x00000002
229#define VIVS_GL_FLUSH_CACHE_TEXTURE 0x00000004
230#define VIVS_GL_FLUSH_CACHE_PE2D 0x00000008
231#define VIVS_GL_FLUSH_CACHE_TEXTUREVS 0x00000010
232#define VIVS_GL_FLUSH_CACHE_SHADER_L1 0x00000020
233#define VIVS_GL_FLUSH_CACHE_SHADER_L2 0x00000040
234
235#define VIVS_GL_FLUSH_MMU 0x00003810
236#define VIVS_GL_FLUSH_MMU_FLUSH_FEMMU 0x00000001
237#define VIVS_GL_FLUSH_MMU_FLUSH_UNK1 0x00000002
238#define VIVS_GL_FLUSH_MMU_FLUSH_UNK2 0x00000004
239#define VIVS_GL_FLUSH_MMU_FLUSH_PEMMU 0x00000008
240#define VIVS_GL_FLUSH_MMU_FLUSH_UNK4 0x00000010
241
242#define VIVS_GL_VERTEX_ELEMENT_CONFIG 0x00003814
243
244#define VIVS_GL_MULTI_SAMPLE_CONFIG 0x00003818
245#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__MASK 0x00000003
246#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES__SHIFT 0
247#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_NONE 0x00000000
248#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_2X 0x00000001
249#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_4X 0x00000002
250#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_SAMPLES_MASK 0x00000008
251#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK 0x000000f0
252#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT 4
253#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES__MASK)
254#define VIVS_GL_MULTI_SAMPLE_CONFIG_MSAA_ENABLES_MASK 0x00000100
255#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK 0x00007000
256#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT 12
257#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12__MASK)
258#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK12_MASK 0x00008000
259#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK 0x00030000
260#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT 16
261#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16(x) (((x) << VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__SHIFT) & VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16__MASK)
262#define VIVS_GL_MULTI_SAMPLE_CONFIG_UNK16_MASK 0x00080000
263
264#define VIVS_GL_VARYING_TOTAL_COMPONENTS 0x0000381c
265#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK 0x000000ff
266#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT 0
267#define VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM(x) (((x) << VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__SHIFT) & VIVS_GL_VARYING_TOTAL_COMPONENTS_NUM__MASK)
268
269#define VIVS_GL_VARYING_NUM_COMPONENTS 0x00003820
270#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK 0x00000007
271#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT 0
272#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR0(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR0__MASK)
273#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK 0x00000070
274#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT 4
275#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR1(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR1__MASK)
276#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK 0x00000700
277#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT 8
278#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR2(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR2__MASK)
279#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK 0x00007000
280#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT 12
281#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR3(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR3__MASK)
282#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK 0x00070000
283#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT 16
284#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR4(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR4__MASK)
285#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK 0x00700000
286#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT 20
287#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR5(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR5__MASK)
288#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK 0x07000000
289#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT 24
290#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR6(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR6__MASK)
291#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK 0x70000000
292#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT 28
293#define VIVS_GL_VARYING_NUM_COMPONENTS_VAR7(x) (((x) << VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__SHIFT) & VIVS_GL_VARYING_NUM_COMPONENTS_VAR7__MASK)
294
295#define VIVS_GL_VARYING_COMPONENT_USE(i0) (0x00003828 + 0x4*(i0))
296#define VIVS_GL_VARYING_COMPONENT_USE__ESIZE 0x00000004
297#define VIVS_GL_VARYING_COMPONENT_USE__LEN 0x00000002
298#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK 0x00000003
299#define VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT 0
300#define VIVS_GL_VARYING_COMPONENT_USE_COMP0(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP0__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP0__MASK)
301#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK 0x0000000c
302#define VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT 2
303#define VIVS_GL_VARYING_COMPONENT_USE_COMP1(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP1__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP1__MASK)
304#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK 0x00000030
305#define VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT 4
306#define VIVS_GL_VARYING_COMPONENT_USE_COMP2(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP2__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP2__MASK)
307#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK 0x000000c0
308#define VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT 6
309#define VIVS_GL_VARYING_COMPONENT_USE_COMP3(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP3__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP3__MASK)
310#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK 0x00000300
311#define VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT 8
312#define VIVS_GL_VARYING_COMPONENT_USE_COMP4(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP4__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP4__MASK)
313#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK 0x00000c00
314#define VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT 10
315#define VIVS_GL_VARYING_COMPONENT_USE_COMP5(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP5__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP5__MASK)
316#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK 0x00003000
317#define VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT 12
318#define VIVS_GL_VARYING_COMPONENT_USE_COMP6(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP6__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP6__MASK)
319#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK 0x0000c000
320#define VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT 14
321#define VIVS_GL_VARYING_COMPONENT_USE_COMP7(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP7__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP7__MASK)
322#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK 0x00030000
323#define VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT 16
324#define VIVS_GL_VARYING_COMPONENT_USE_COMP8(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP8__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP8__MASK)
325#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK 0x000c0000
326#define VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT 18
327#define VIVS_GL_VARYING_COMPONENT_USE_COMP9(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP9__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP9__MASK)
328#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK 0x00300000
329#define VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT 20
330#define VIVS_GL_VARYING_COMPONENT_USE_COMP10(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP10__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP10__MASK)
331#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK 0x00c00000
332#define VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT 22
333#define VIVS_GL_VARYING_COMPONENT_USE_COMP11(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP11__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP11__MASK)
334#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK 0x03000000
335#define VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT 24
336#define VIVS_GL_VARYING_COMPONENT_USE_COMP12(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP12__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP12__MASK)
337#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK 0x0c000000
338#define VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT 26
339#define VIVS_GL_VARYING_COMPONENT_USE_COMP13(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP13__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP13__MASK)
340#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK 0x30000000
341#define VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT 28
342#define VIVS_GL_VARYING_COMPONENT_USE_COMP14(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP14__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP14__MASK)
343#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK 0xc0000000
344#define VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT 30
345#define VIVS_GL_VARYING_COMPONENT_USE_COMP15(x) (((x) << VIVS_GL_VARYING_COMPONENT_USE_COMP15__SHIFT) & VIVS_GL_VARYING_COMPONENT_USE_COMP15__MASK)
346
347#define VIVS_GL_UNK03834 0x00003834
348
349#define VIVS_GL_UNK03838 0x00003838
350
351#define VIVS_GL_API_MODE 0x0000384c
352#define VIVS_GL_API_MODE_OPENGL 0x00000000
353#define VIVS_GL_API_MODE_OPENVG 0x00000001
354#define VIVS_GL_API_MODE_OPENCL 0x00000002
355
356#define VIVS_GL_CONTEXT_POINTER 0x00003850
357
358#define VIVS_GL_UNK03A00 0x00003a00
359
360#define VIVS_GL_STALL_TOKEN 0x00003c00
361#define VIVS_GL_STALL_TOKEN_FROM__MASK 0x0000001f
362#define VIVS_GL_STALL_TOKEN_FROM__SHIFT 0
363#define VIVS_GL_STALL_TOKEN_FROM(x) (((x) << VIVS_GL_STALL_TOKEN_FROM__SHIFT) & VIVS_GL_STALL_TOKEN_FROM__MASK)
364#define VIVS_GL_STALL_TOKEN_TO__MASK 0x00001f00
365#define VIVS_GL_STALL_TOKEN_TO__SHIFT 8
366#define VIVS_GL_STALL_TOKEN_TO(x) (((x) << VIVS_GL_STALL_TOKEN_TO__SHIFT) & VIVS_GL_STALL_TOKEN_TO__MASK)
367#define VIVS_GL_STALL_TOKEN_FLIP0 0x40000000
368#define VIVS_GL_STALL_TOKEN_FLIP1 0x80000000
369
370#define VIVS_DUMMY 0x00000000
371
372#define VIVS_DUMMY_DUMMY 0x0003fffc
373
374
375#endif /* STATE_XML */
diff --git a/tests/etnaviv/state_2d.xml.h b/tests/etnaviv/state_2d.xml.h
new file mode 100644
index 00000000..715eed44
--- /dev/null
+++ b/tests/etnaviv/state_2d.xml.h
@@ -0,0 +1,1497 @@
1#ifndef STATE_2D_XML
2#define STATE_2D_XML
3
4/* Autogenerated file, DO NOT EDIT manually!
5
6This file was generated by the rules-ng-ng headergen tool in this git repository:
7http://0x04.net/cgit/index.cgi/rules-ng-ng
8git clone git://0x04.net/rules-ng-ng
9
10The rules-ng-ng source files this header was generated from are:
11- state.xml ( 18940 bytes, from 2016-09-06 14:14:12)
12- common.xml ( 20583 bytes, from 2016-09-06 14:14:12)
13- state_hi.xml ( 25653 bytes, from 2016-09-06 14:45:17)
14- copyright.xml ( 1597 bytes, from 2016-09-06 14:44:16)
15- state_2d.xml ( 51552 bytes, from 2016-09-06 14:44:16)
16- state_3d.xml ( 54603 bytes, from 2016-09-06 14:44:16)
17- state_vg.xml ( 5975 bytes, from 2016-09-06 14:44:16)
18
19Copyright (C) 2012-2016 by the following authors:
20- Wladimir J. van der Laan <laanwj@gmail.com>
21- Christian Gmeiner <christian.gmeiner@gmail.com>
22- Lucas Stach <l.stach@pengutronix.de>
23- Russell King <rmk@arm.linux.org.uk>
24
25Permission is hereby granted, free of charge, to any person obtaining a
26copy of this software and associated documentation files (the "Software"),
27to deal in the Software without restriction, including without limitation
28the rights to use, copy, modify, merge, publish, distribute, sub license,
29and/or sell copies of the Software, and to permit persons to whom the
30Software is furnished to do so, subject to the following conditions:
31
32The above copyright notice and this permission notice (including the
33next paragraph) shall be included in all copies or substantial portions
34of the Software.
35
36THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
37IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
38FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
39THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
40LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
41FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
42DEALINGS IN THE SOFTWARE.
43*/
44
45
46#define DE_FORMAT_X4R4G4B4 0x00000000
47#define DE_FORMAT_A4R4G4B4 0x00000001
48#define DE_FORMAT_X1R5G5B5 0x00000002
49#define DE_FORMAT_A1R5G5B5 0x00000003
50#define DE_FORMAT_R5G6B5 0x00000004
51#define DE_FORMAT_X8R8G8B8 0x00000005
52#define DE_FORMAT_A8R8G8B8 0x00000006
53#define DE_FORMAT_YUY2 0x00000007
54#define DE_FORMAT_UYVY 0x00000008
55#define DE_FORMAT_INDEX8 0x00000009
56#define DE_FORMAT_MONOCHROME 0x0000000a
57#define DE_FORMAT_YV12 0x0000000f
58#define DE_FORMAT_A8 0x00000010
59#define DE_FORMAT_NV12 0x00000011
60#define DE_FORMAT_NV16 0x00000012
61#define DE_FORMAT_RG16 0x00000013
62#define DE_SWIZZLE_ARGB 0x00000000
63#define DE_SWIZZLE_RGBA 0x00000001
64#define DE_SWIZZLE_ABGR 0x00000002
65#define DE_SWIZZLE_BGRA 0x00000003
66#define DE_BLENDMODE_ZERO 0x00000000
67#define DE_BLENDMODE_ONE 0x00000001
68#define DE_BLENDMODE_NORMAL 0x00000002
69#define DE_BLENDMODE_INVERSED 0x00000003
70#define DE_BLENDMODE_COLOR 0x00000004
71#define DE_BLENDMODE_COLOR_INVERSED 0x00000005
72#define DE_BLENDMODE_SATURATED_ALPHA 0x00000006
73#define DE_BLENDMODE_SATURATED_DEST_ALPHA 0x00000007
74#define DE_COMPONENT_BLUE 0x00000000
75#define DE_COMPONENT_GREEN 0x00000001
76#define DE_COMPONENT_RED 0x00000002
77#define DE_COMPONENT_ALPHA 0x00000003
78#define DE_ROT_MODE_ROT0 0x00000000
79#define DE_ROT_MODE_FLIP_X 0x00000001
80#define DE_ROT_MODE_FLIP_Y 0x00000002
81#define DE_ROT_MODE_ROT90 0x00000004
82#define DE_ROT_MODE_ROT180 0x00000005
83#define DE_ROT_MODE_ROT270 0x00000006
84#define DE_MIRROR_MODE_NONE 0x00000000
85#define DE_MIRROR_MODE_MIRROR_X 0x00000001
86#define DE_MIRROR_MODE_MIRROR_Y 0x00000002
87#define DE_MIRROR_MODE_MIRROR_XY 0x00000003
88#define DE_COLOR_BLUE__MASK 0x000000ff
89#define DE_COLOR_BLUE__SHIFT 0
90#define DE_COLOR_BLUE(x) (((x) << DE_COLOR_BLUE__SHIFT) & DE_COLOR_BLUE__MASK)
91#define DE_COLOR_GREEN__MASK 0x0000ff00
92#define DE_COLOR_GREEN__SHIFT 8
93#define DE_COLOR_GREEN(x) (((x) << DE_COLOR_GREEN__SHIFT) & DE_COLOR_GREEN__MASK)
94#define DE_COLOR_RED__MASK 0x00ff0000
95#define DE_COLOR_RED__SHIFT 16
96#define DE_COLOR_RED(x) (((x) << DE_COLOR_RED__SHIFT) & DE_COLOR_RED__MASK)
97#define DE_COLOR_ALPHA__MASK 0xff000000
98#define DE_COLOR_ALPHA__SHIFT 24
99#define DE_COLOR_ALPHA(x) (((x) << DE_COLOR_ALPHA__SHIFT) & DE_COLOR_ALPHA__MASK)
100#define VIVS_DE 0x00000000
101
102#define VIVS_DE_SRC_ADDRESS 0x00001200
103
104#define VIVS_DE_SRC_STRIDE 0x00001204
105#define VIVS_DE_SRC_STRIDE_STRIDE__MASK 0x0003ffff
106#define VIVS_DE_SRC_STRIDE_STRIDE__SHIFT 0
107#define VIVS_DE_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_SRC_STRIDE_STRIDE__MASK)
108
109#define VIVS_DE_SRC_ROTATION_CONFIG 0x00001208
110#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff
111#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0
112#define VIVS_DE_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_SRC_ROTATION_CONFIG_WIDTH__MASK)
113#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000
114#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16
115#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000
116#define VIVS_DE_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000
117
118#define VIVS_DE_SRC_CONFIG 0x0000120c
119#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f
120#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0
121#define VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK)
122#define VIVS_DE_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030
123#define VIVS_DE_SRC_CONFIG_TRANSPARENCY__SHIFT 4
124#define VIVS_DE_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_SRC_CONFIG_TRANSPARENCY__MASK)
125#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040
126#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE__SHIFT 6
127#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000
128#define VIVS_DE_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040
129#define VIVS_DE_SRC_CONFIG_TILED__MASK 0x00000080
130#define VIVS_DE_SRC_CONFIG_TILED__SHIFT 7
131#define VIVS_DE_SRC_CONFIG_TILED_DISABLE 0x00000000
132#define VIVS_DE_SRC_CONFIG_TILED_ENABLE 0x00000080
133#define VIVS_DE_SRC_CONFIG_LOCATION__MASK 0x00000100
134#define VIVS_DE_SRC_CONFIG_LOCATION__SHIFT 8
135#define VIVS_DE_SRC_CONFIG_LOCATION_MEMORY 0x00000000
136#define VIVS_DE_SRC_CONFIG_LOCATION_STREAM 0x00000100
137#define VIVS_DE_SRC_CONFIG_PACK__MASK 0x00003000
138#define VIVS_DE_SRC_CONFIG_PACK__SHIFT 12
139#define VIVS_DE_SRC_CONFIG_PACK_PACKED8 0x00000000
140#define VIVS_DE_SRC_CONFIG_PACK_PACKED16 0x00001000
141#define VIVS_DE_SRC_CONFIG_PACK_PACKED32 0x00002000
142#define VIVS_DE_SRC_CONFIG_PACK_UNPACKED 0x00003000
143#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000
144#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15
145#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000
146#define VIVS_DE_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000
147#define VIVS_DE_SRC_CONFIG_UNK16 0x00010000
148#define VIVS_DE_SRC_CONFIG_SWIZZLE__MASK 0x00300000
149#define VIVS_DE_SRC_CONFIG_SWIZZLE__SHIFT 20
150#define VIVS_DE_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_SRC_CONFIG_SWIZZLE__MASK)
151#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000
152#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24
153#define VIVS_DE_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_SRC_CONFIG_SOURCE_FORMAT__MASK)
154#define VIVS_DE_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000
155#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000
156#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30
157#define VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_SRC_CONFIG_ENDIAN_CONTROL__MASK)
158
159#define VIVS_DE_SRC_ORIGIN 0x00001210
160#define VIVS_DE_SRC_ORIGIN_X__MASK 0x0000ffff
161#define VIVS_DE_SRC_ORIGIN_X__SHIFT 0
162#define VIVS_DE_SRC_ORIGIN_X(x) (((x) << VIVS_DE_SRC_ORIGIN_X__SHIFT) & VIVS_DE_SRC_ORIGIN_X__MASK)
163#define VIVS_DE_SRC_ORIGIN_Y__MASK 0xffff0000
164#define VIVS_DE_SRC_ORIGIN_Y__SHIFT 16
165#define VIVS_DE_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_SRC_ORIGIN_Y__MASK)
166
167#define VIVS_DE_SRC_SIZE 0x00001214
168#define VIVS_DE_SRC_SIZE_X__MASK 0x0000ffff
169#define VIVS_DE_SRC_SIZE_X__SHIFT 0
170#define VIVS_DE_SRC_SIZE_X(x) (((x) << VIVS_DE_SRC_SIZE_X__SHIFT) & VIVS_DE_SRC_SIZE_X__MASK)
171#define VIVS_DE_SRC_SIZE_Y__MASK 0xffff0000
172#define VIVS_DE_SRC_SIZE_Y__SHIFT 16
173#define VIVS_DE_SRC_SIZE_Y(x) (((x) << VIVS_DE_SRC_SIZE_Y__SHIFT) & VIVS_DE_SRC_SIZE_Y__MASK)
174
175#define VIVS_DE_SRC_COLOR_BG 0x00001218
176
177#define VIVS_DE_SRC_COLOR_FG 0x0000121c
178
179#define VIVS_DE_STRETCH_FACTOR_LOW 0x00001220
180#define VIVS_DE_STRETCH_FACTOR_LOW_X__MASK 0x7fffffff
181#define VIVS_DE_STRETCH_FACTOR_LOW_X__SHIFT 0
182#define VIVS_DE_STRETCH_FACTOR_LOW_X(x) (((x) << VIVS_DE_STRETCH_FACTOR_LOW_X__SHIFT) & VIVS_DE_STRETCH_FACTOR_LOW_X__MASK)
183
184#define VIVS_DE_STRETCH_FACTOR_HIGH 0x00001224
185#define VIVS_DE_STRETCH_FACTOR_HIGH_Y__MASK 0x7fffffff
186#define VIVS_DE_STRETCH_FACTOR_HIGH_Y__SHIFT 0
187#define VIVS_DE_STRETCH_FACTOR_HIGH_Y(x) (((x) << VIVS_DE_STRETCH_FACTOR_HIGH_Y__SHIFT) & VIVS_DE_STRETCH_FACTOR_HIGH_Y__MASK)
188
189#define VIVS_DE_DEST_ADDRESS 0x00001228
190
191#define VIVS_DE_DEST_STRIDE 0x0000122c
192#define VIVS_DE_DEST_STRIDE_STRIDE__MASK 0x0003ffff
193#define VIVS_DE_DEST_STRIDE_STRIDE__SHIFT 0
194#define VIVS_DE_DEST_STRIDE_STRIDE(x) (((x) << VIVS_DE_DEST_STRIDE_STRIDE__SHIFT) & VIVS_DE_DEST_STRIDE_STRIDE__MASK)
195
196#define VIVS_DE_DEST_ROTATION_CONFIG 0x00001230
197#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff
198#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__SHIFT 0
199#define VIVS_DE_DEST_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_DEST_ROTATION_CONFIG_WIDTH__MASK)
200#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION__MASK 0x00010000
201#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION__SHIFT 16
202#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000
203#define VIVS_DE_DEST_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000
204
205#define VIVS_DE_DEST_CONFIG 0x00001234
206#define VIVS_DE_DEST_CONFIG_FORMAT__MASK 0x0000001f
207#define VIVS_DE_DEST_CONFIG_FORMAT__SHIFT 0
208#define VIVS_DE_DEST_CONFIG_FORMAT(x) (((x) << VIVS_DE_DEST_CONFIG_FORMAT__SHIFT) & VIVS_DE_DEST_CONFIG_FORMAT__MASK)
209#define VIVS_DE_DEST_CONFIG_TILED__MASK 0x00000100
210#define VIVS_DE_DEST_CONFIG_TILED__SHIFT 8
211#define VIVS_DE_DEST_CONFIG_TILED_DISABLE 0x00000000
212#define VIVS_DE_DEST_CONFIG_TILED_ENABLE 0x00000100
213#define VIVS_DE_DEST_CONFIG_COMMAND__MASK 0x0000f000
214#define VIVS_DE_DEST_CONFIG_COMMAND__SHIFT 12
215#define VIVS_DE_DEST_CONFIG_COMMAND_CLEAR 0x00000000
216#define VIVS_DE_DEST_CONFIG_COMMAND_LINE 0x00001000
217#define VIVS_DE_DEST_CONFIG_COMMAND_BIT_BLT 0x00002000
218#define VIVS_DE_DEST_CONFIG_COMMAND_BIT_BLT_REVERSED 0x00003000
219#define VIVS_DE_DEST_CONFIG_COMMAND_STRETCH_BLT 0x00004000
220#define VIVS_DE_DEST_CONFIG_COMMAND_HOR_FILTER_BLT 0x00005000
221#define VIVS_DE_DEST_CONFIG_COMMAND_VER_FILTER_BLT 0x00006000
222#define VIVS_DE_DEST_CONFIG_COMMAND_ONE_PASS_FILTER_BLT 0x00007000
223#define VIVS_DE_DEST_CONFIG_COMMAND_MULTI_SOURCE_BLT 0x00008000
224#define VIVS_DE_DEST_CONFIG_SWIZZLE__MASK 0x00030000
225#define VIVS_DE_DEST_CONFIG_SWIZZLE__SHIFT 16
226#define VIVS_DE_DEST_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_DEST_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_DEST_CONFIG_SWIZZLE__MASK)
227#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__MASK 0x00300000
228#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__SHIFT 20
229#define VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_DEST_CONFIG_ENDIAN_CONTROL__MASK)
230#define VIVS_DE_DEST_CONFIG_GDI_STRE__MASK 0x01000000
231#define VIVS_DE_DEST_CONFIG_GDI_STRE__SHIFT 24
232#define VIVS_DE_DEST_CONFIG_GDI_STRE_DISABLE 0x00000000
233#define VIVS_DE_DEST_CONFIG_GDI_STRE_ENABLE 0x01000000
234#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX__MASK 0x02000000
235#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX__SHIFT 25
236#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX_DISABLED 0x02000000
237#define VIVS_DE_DEST_CONFIG_INTER_TILE_PER_FIX_ENABLED 0x00000000
238#define VIVS_DE_DEST_CONFIG_MINOR_TILED__MASK 0x04000000
239#define VIVS_DE_DEST_CONFIG_MINOR_TILED__SHIFT 26
240#define VIVS_DE_DEST_CONFIG_MINOR_TILED_DISABLE 0x00000000
241#define VIVS_DE_DEST_CONFIG_MINOR_TILED_ENABLE 0x04000000
242
243#define VIVS_DE_PATTERN_ADDRESS 0x00001238
244
245#define VIVS_DE_PATTERN_CONFIG 0x0000123c
246#define VIVS_DE_PATTERN_CONFIG_FORMAT__MASK 0x0000000f
247#define VIVS_DE_PATTERN_CONFIG_FORMAT__SHIFT 0
248#define VIVS_DE_PATTERN_CONFIG_FORMAT(x) (((x) << VIVS_DE_PATTERN_CONFIG_FORMAT__SHIFT) & VIVS_DE_PATTERN_CONFIG_FORMAT__MASK)
249#define VIVS_DE_PATTERN_CONFIG_TYPE__MASK 0x00000010
250#define VIVS_DE_PATTERN_CONFIG_TYPE__SHIFT 4
251#define VIVS_DE_PATTERN_CONFIG_TYPE_SOLID_COLOR 0x00000000
252#define VIVS_DE_PATTERN_CONFIG_TYPE_PATTERN 0x00000010
253#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT__MASK 0x00000020
254#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT__SHIFT 5
255#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT_DISABLE 0x00000000
256#define VIVS_DE_PATTERN_CONFIG_COLOR_CONVERT_ENABLE 0x00000020
257#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__MASK 0x000000c0
258#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__SHIFT 6
259#define VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER(x) (((x) << VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__SHIFT) & VIVS_DE_PATTERN_CONFIG_INIT_TRIGGER__MASK)
260#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X__MASK 0x00070000
261#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X__SHIFT 16
262#define VIVS_DE_PATTERN_CONFIG_ORIGIN_X(x) (((x) << VIVS_DE_PATTERN_CONFIG_ORIGIN_X__SHIFT) & VIVS_DE_PATTERN_CONFIG_ORIGIN_X__MASK)
263#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__MASK 0x00700000
264#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__SHIFT 20
265#define VIVS_DE_PATTERN_CONFIG_ORIGIN_Y(x) (((x) << VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__SHIFT) & VIVS_DE_PATTERN_CONFIG_ORIGIN_Y__MASK)
266
267#define VIVS_DE_PATTERN_LOW 0x00001240
268
269#define VIVS_DE_PATTERN_HIGH 0x00001244
270
271#define VIVS_DE_PATTERN_MASK_LOW 0x00001248
272
273#define VIVS_DE_PATTERN_MASK_HIGH 0x0000124c
274
275#define VIVS_DE_PATTERN_BG_COLOR 0x00001250
276
277#define VIVS_DE_PATTERN_FG_COLOR 0x00001254
278
279#define VIVS_DE_ROP 0x0000125c
280#define VIVS_DE_ROP_ROP_FG__MASK 0x000000ff
281#define VIVS_DE_ROP_ROP_FG__SHIFT 0
282#define VIVS_DE_ROP_ROP_FG(x) (((x) << VIVS_DE_ROP_ROP_FG__SHIFT) & VIVS_DE_ROP_ROP_FG__MASK)
283#define VIVS_DE_ROP_ROP_BG__MASK 0x0000ff00
284#define VIVS_DE_ROP_ROP_BG__SHIFT 8
285#define VIVS_DE_ROP_ROP_BG(x) (((x) << VIVS_DE_ROP_ROP_BG__SHIFT) & VIVS_DE_ROP_ROP_BG__MASK)
286#define VIVS_DE_ROP_TYPE__MASK 0x00300000
287#define VIVS_DE_ROP_TYPE__SHIFT 20
288#define VIVS_DE_ROP_TYPE_ROP2_PATTERN 0x00000000
289#define VIVS_DE_ROP_TYPE_ROP2_SOURCE 0x00100000
290#define VIVS_DE_ROP_TYPE_ROP3 0x00200000
291#define VIVS_DE_ROP_TYPE_ROP4 0x00300000
292
293#define VIVS_DE_CLIP_TOP_LEFT 0x00001260
294#define VIVS_DE_CLIP_TOP_LEFT_X__MASK 0x00007fff
295#define VIVS_DE_CLIP_TOP_LEFT_X__SHIFT 0
296#define VIVS_DE_CLIP_TOP_LEFT_X(x) (((x) << VIVS_DE_CLIP_TOP_LEFT_X__SHIFT) & VIVS_DE_CLIP_TOP_LEFT_X__MASK)
297#define VIVS_DE_CLIP_TOP_LEFT_Y__MASK 0x7fff0000
298#define VIVS_DE_CLIP_TOP_LEFT_Y__SHIFT 16
299#define VIVS_DE_CLIP_TOP_LEFT_Y(x) (((x) << VIVS_DE_CLIP_TOP_LEFT_Y__SHIFT) & VIVS_DE_CLIP_TOP_LEFT_Y__MASK)
300
301#define VIVS_DE_CLIP_BOTTOM_RIGHT 0x00001264
302#define VIVS_DE_CLIP_BOTTOM_RIGHT_X__MASK 0x00007fff
303#define VIVS_DE_CLIP_BOTTOM_RIGHT_X__SHIFT 0
304#define VIVS_DE_CLIP_BOTTOM_RIGHT_X(x) (((x) << VIVS_DE_CLIP_BOTTOM_RIGHT_X__SHIFT) & VIVS_DE_CLIP_BOTTOM_RIGHT_X__MASK)
305#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y__MASK 0x7fff0000
306#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y__SHIFT 16
307#define VIVS_DE_CLIP_BOTTOM_RIGHT_Y(x) (((x) << VIVS_DE_CLIP_BOTTOM_RIGHT_Y__SHIFT) & VIVS_DE_CLIP_BOTTOM_RIGHT_Y__MASK)
308
309#define VIVS_DE_CLEAR_BYTE_MASK 0x00001268
310
311#define VIVS_DE_CONFIG 0x0000126c
312#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE__MASK 0x00000001
313#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE__SHIFT 0
314#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE_OFF 0x00000000
315#define VIVS_DE_CONFIG_MIRROR_BLT_ENABLE_ON 0x00000001
316#define VIVS_DE_CONFIG_MIRROR_BLT_MODE__MASK 0x00000030
317#define VIVS_DE_CONFIG_MIRROR_BLT_MODE__SHIFT 4
318#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_NORMAL 0x00000000
319#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_HMIRROR 0x00000010
320#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_VMIRROR 0x00000020
321#define VIVS_DE_CONFIG_MIRROR_BLT_MODE_FULL_MIRROR 0x00000030
322#define VIVS_DE_CONFIG_SOURCE_SELECT__MASK 0x00070000
323#define VIVS_DE_CONFIG_SOURCE_SELECT__SHIFT 16
324#define VIVS_DE_CONFIG_SOURCE_SELECT(x) (((x) << VIVS_DE_CONFIG_SOURCE_SELECT__SHIFT) & VIVS_DE_CONFIG_SOURCE_SELECT__MASK)
325#define VIVS_DE_CONFIG_DESTINATION_SELECT__MASK 0x00300000
326#define VIVS_DE_CONFIG_DESTINATION_SELECT__SHIFT 20
327#define VIVS_DE_CONFIG_DESTINATION_SELECT(x) (((x) << VIVS_DE_CONFIG_DESTINATION_SELECT__SHIFT) & VIVS_DE_CONFIG_DESTINATION_SELECT__MASK)
328
329#define VIVS_DE_CLEAR_PIXEL_VALUE_LOW 0x00001270
330
331#define VIVS_DE_CLEAR_PIXEL_VALUE_HIGH 0x00001274
332
333#define VIVS_DE_SRC_ORIGIN_FRACTION 0x00001278
334#define VIVS_DE_SRC_ORIGIN_FRACTION_X__MASK 0x0000ffff
335#define VIVS_DE_SRC_ORIGIN_FRACTION_X__SHIFT 0
336#define VIVS_DE_SRC_ORIGIN_FRACTION_X(x) (((x) << VIVS_DE_SRC_ORIGIN_FRACTION_X__SHIFT) & VIVS_DE_SRC_ORIGIN_FRACTION_X__MASK)
337#define VIVS_DE_SRC_ORIGIN_FRACTION_Y__MASK 0xffff0000
338#define VIVS_DE_SRC_ORIGIN_FRACTION_Y__SHIFT 16
339#define VIVS_DE_SRC_ORIGIN_FRACTION_Y(x) (((x) << VIVS_DE_SRC_ORIGIN_FRACTION_Y__SHIFT) & VIVS_DE_SRC_ORIGIN_FRACTION_Y__MASK)
340
341#define VIVS_DE_ALPHA_CONTROL 0x0000127c
342#define VIVS_DE_ALPHA_CONTROL_ENABLE__MASK 0x00000001
343#define VIVS_DE_ALPHA_CONTROL_ENABLE__SHIFT 0
344#define VIVS_DE_ALPHA_CONTROL_ENABLE_OFF 0x00000000
345#define VIVS_DE_ALPHA_CONTROL_ENABLE_ON 0x00000001
346#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000
347#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16
348#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK)
349#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000
350#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24
351#define VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK)
352
353#define VIVS_DE_ALPHA_MODES 0x00001280
354#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001
355#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0
356#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000
357#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001
358#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010
359#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4
360#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000
361#define VIVS_DE_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010
362#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300
363#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8
364#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000
365#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100
366#define VIVS_DE_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200
367#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000
368#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12
369#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000
370#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000
371#define VIVS_DE_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000
372#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000
373#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16
374#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000
375#define VIVS_DE_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000
376#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000
377#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20
378#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000
379#define VIVS_DE_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000
380#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000
381#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24
382#define VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_ALPHA_MODES_SRC_BLENDING_MODE__MASK)
383#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000
384#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27
385#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000
386#define VIVS_DE_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000
387#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000
388#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28
389#define VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_ALPHA_MODES_DST_BLENDING_MODE__MASK)
390#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000
391#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31
392#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000
393#define VIVS_DE_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000
394
395#define VIVS_DE_UPLANE_ADDRESS 0x00001284
396
397#define VIVS_DE_UPLANE_STRIDE 0x00001288
398#define VIVS_DE_UPLANE_STRIDE_STRIDE__MASK 0x0003ffff
399#define VIVS_DE_UPLANE_STRIDE_STRIDE__SHIFT 0
400#define VIVS_DE_UPLANE_STRIDE_STRIDE(x) (((x) << VIVS_DE_UPLANE_STRIDE_STRIDE__SHIFT) & VIVS_DE_UPLANE_STRIDE_STRIDE__MASK)
401
402#define VIVS_DE_VPLANE_ADDRESS 0x0000128c
403
404#define VIVS_DE_VPLANE_STRIDE 0x00001290
405#define VIVS_DE_VPLANE_STRIDE_STRIDE__MASK 0x0003ffff
406#define VIVS_DE_VPLANE_STRIDE_STRIDE__SHIFT 0
407#define VIVS_DE_VPLANE_STRIDE_STRIDE(x) (((x) << VIVS_DE_VPLANE_STRIDE_STRIDE__SHIFT) & VIVS_DE_VPLANE_STRIDE_STRIDE__MASK)
408
409#define VIVS_DE_VR_CONFIG 0x00001294
410#define VIVS_DE_VR_CONFIG_START__MASK 0x00000003
411#define VIVS_DE_VR_CONFIG_START__SHIFT 0
412#define VIVS_DE_VR_CONFIG_START_HORIZONTAL_BLIT 0x00000000
413#define VIVS_DE_VR_CONFIG_START_VERTICAL_BLIT 0x00000001
414#define VIVS_DE_VR_CONFIG_START_ONE_PASS_BLIT 0x00000002
415#define VIVS_DE_VR_CONFIG_START_MASK 0x00000008
416
417#define VIVS_DE_VR_SOURCE_IMAGE_LOW 0x00001298
418#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__MASK 0x0000ffff
419#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__SHIFT 0
420#define VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_LOW_LEFT__MASK)
421#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__MASK 0xffff0000
422#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__SHIFT 16
423#define VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_LOW_TOP__MASK)
424
425#define VIVS_DE_VR_SOURCE_IMAGE_HIGH 0x0000129c
426#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__MASK 0x0000ffff
427#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__SHIFT 0
428#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_HIGH_RIGHT__MASK)
429#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__MASK 0xffff0000
430#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__SHIFT 16
431#define VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM(x) (((x) << VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__SHIFT) & VIVS_DE_VR_SOURCE_IMAGE_HIGH_BOTTOM__MASK)
432
433#define VIVS_DE_VR_SOURCE_ORIGIN_LOW 0x000012a0
434#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__MASK 0xffffffff
435#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__SHIFT 0
436#define VIVS_DE_VR_SOURCE_ORIGIN_LOW_X(x) (((x) << VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__SHIFT) & VIVS_DE_VR_SOURCE_ORIGIN_LOW_X__MASK)
437
438#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH 0x000012a4
439#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__MASK 0xffffffff
440#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__SHIFT 0
441#define VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y(x) (((x) << VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__SHIFT) & VIVS_DE_VR_SOURCE_ORIGIN_HIGH_Y__MASK)
442
443#define VIVS_DE_VR_TARGET_WINDOW_LOW 0x000012a8
444#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__MASK 0x0000ffff
445#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__SHIFT 0
446#define VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_LOW_LEFT__MASK)
447#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__MASK 0xffff0000
448#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__SHIFT 16
449#define VIVS_DE_VR_TARGET_WINDOW_LOW_TOP(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_LOW_TOP__MASK)
450
451#define VIVS_DE_VR_TARGET_WINDOW_HIGH 0x000012ac
452#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__MASK 0x0000ffff
453#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__SHIFT 0
454#define VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_HIGH_RIGHT__MASK)
455#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__MASK 0xffff0000
456#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__SHIFT 16
457#define VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM(x) (((x) << VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__SHIFT) & VIVS_DE_VR_TARGET_WINDOW_HIGH_BOTTOM__MASK)
458
459#define VIVS_DE_PE_CONFIG 0x000012b0
460#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH__MASK 0x00000003
461#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH__SHIFT 0
462#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_DISABLE 0x00000000
463#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_DEFAULT 0x00000001
464#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_ALWAYS 0x00000002
465#define VIVS_DE_PE_CONFIG_DESTINATION_FETCH_MASK 0x00000008
466
467#define VIVS_DE_DEST_ROTATION_HEIGHT 0x000012b4
468#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff
469#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__SHIFT 0
470#define VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_DEST_ROTATION_HEIGHT_HEIGHT__MASK)
471
472#define VIVS_DE_SRC_ROTATION_HEIGHT 0x000012b8
473#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff
474#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0
475#define VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_SRC_ROTATION_HEIGHT_HEIGHT__MASK)
476
477#define VIVS_DE_ROT_ANGLE 0x000012bc
478#define VIVS_DE_ROT_ANGLE_SRC__MASK 0x00000007
479#define VIVS_DE_ROT_ANGLE_SRC__SHIFT 0
480#define VIVS_DE_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_ROT_ANGLE_SRC__MASK)
481#define VIVS_DE_ROT_ANGLE_DST__MASK 0x00000038
482#define VIVS_DE_ROT_ANGLE_DST__SHIFT 3
483#define VIVS_DE_ROT_ANGLE_DST(x) (((x) << VIVS_DE_ROT_ANGLE_DST__SHIFT) & VIVS_DE_ROT_ANGLE_DST__MASK)
484#define VIVS_DE_ROT_ANGLE_SRC_MASK 0x00000100
485#define VIVS_DE_ROT_ANGLE_DST_MASK 0x00000200
486#define VIVS_DE_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000
487#define VIVS_DE_ROT_ANGLE_SRC_MIRROR__SHIFT 12
488#define VIVS_DE_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_ROT_ANGLE_SRC_MIRROR__MASK)
489#define VIVS_DE_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000
490#define VIVS_DE_ROT_ANGLE_DST_MIRROR__MASK 0x00030000
491#define VIVS_DE_ROT_ANGLE_DST_MIRROR__SHIFT 16
492#define VIVS_DE_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_ROT_ANGLE_DST_MIRROR__MASK)
493#define VIVS_DE_ROT_ANGLE_DST_MIRROR_MASK 0x00080000
494
495#define VIVS_DE_CLEAR_PIXEL_VALUE32 0x000012c0
496
497#define VIVS_DE_DEST_COLOR_KEY 0x000012c4
498
499#define VIVS_DE_GLOBAL_SRC_COLOR 0x000012c8
500
501#define VIVS_DE_GLOBAL_DEST_COLOR 0x000012cc
502
503#define VIVS_DE_COLOR_MULTIPLY_MODES 0x000012d0
504#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001
505#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0
506#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000
507#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001
508#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010
509#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4
510#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000
511#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010
512#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300
513#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8
514#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000
515#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100
516#define VIVS_DE_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200
517#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000
518#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20
519#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000
520#define VIVS_DE_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000
521
522#define VIVS_DE_PE_TRANSPARENCY 0x000012d4
523#define VIVS_DE_PE_TRANSPARENCY_SOURCE__MASK 0x00000003
524#define VIVS_DE_PE_TRANSPARENCY_SOURCE__SHIFT 0
525#define VIVS_DE_PE_TRANSPARENCY_SOURCE_OPAQUE 0x00000000
526#define VIVS_DE_PE_TRANSPARENCY_SOURCE_MASK 0x00000001
527#define VIVS_DE_PE_TRANSPARENCY_SOURCE_KEY 0x00000002
528#define VIVS_DE_PE_TRANSPARENCY_PATTERN__MASK 0x00000030
529#define VIVS_DE_PE_TRANSPARENCY_PATTERN__SHIFT 4
530#define VIVS_DE_PE_TRANSPARENCY_PATTERN_OPAQUE 0x00000000
531#define VIVS_DE_PE_TRANSPARENCY_PATTERN_MASK 0x00000010
532#define VIVS_DE_PE_TRANSPARENCY_PATTERN_KEY 0x00000020
533#define VIVS_DE_PE_TRANSPARENCY_DESTINATION__MASK 0x00000300
534#define VIVS_DE_PE_TRANSPARENCY_DESTINATION__SHIFT 8
535#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000
536#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_MASK 0x00000100
537#define VIVS_DE_PE_TRANSPARENCY_DESTINATION_KEY 0x00000200
538#define VIVS_DE_PE_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000
539#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000
540#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16
541#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000
542#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000
543#define VIVS_DE_PE_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000
544#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000
545#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20
546#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000
547#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000
548#define VIVS_DE_PE_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000
549#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000
550#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24
551#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000
552#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000
553#define VIVS_DE_PE_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000
554#define VIVS_DE_PE_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000
555#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000
556#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29
557#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000
558#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000
559#define VIVS_DE_PE_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000
560
561#define VIVS_DE_PE_CONTROL 0x000012d8
562#define VIVS_DE_PE_CONTROL_YUV__MASK 0x00000001
563#define VIVS_DE_PE_CONTROL_YUV__SHIFT 0
564#define VIVS_DE_PE_CONTROL_YUV_601 0x00000000
565#define VIVS_DE_PE_CONTROL_YUV_709 0x00000001
566#define VIVS_DE_PE_CONTROL_YUV_MASK 0x00000008
567#define VIVS_DE_PE_CONTROL_UV_SWIZZLE__MASK 0x00000010
568#define VIVS_DE_PE_CONTROL_UV_SWIZZLE__SHIFT 4
569#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_UV 0x00000000
570#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_VU 0x00000010
571#define VIVS_DE_PE_CONTROL_UV_SWIZZLE_MASK 0x00000080
572#define VIVS_DE_PE_CONTROL_YUVRGB__MASK 0x00000100
573#define VIVS_DE_PE_CONTROL_YUVRGB__SHIFT 8
574#define VIVS_DE_PE_CONTROL_YUVRGB_DISABLE 0x00000000
575#define VIVS_DE_PE_CONTROL_YUVRGB_ENABLE 0x00000100
576#define VIVS_DE_PE_CONTROL_YUVRGB_MASK 0x00000800
577
578#define VIVS_DE_SRC_COLOR_KEY_HIGH 0x000012dc
579
580#define VIVS_DE_DEST_COLOR_KEY_HIGH 0x000012e0
581
582#define VIVS_DE_VR_CONFIG_EX 0x000012e4
583#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH__MASK 0x00000003
584#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH__SHIFT 0
585#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_AUTO 0x00000000
586#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS16 0x00000001
587#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_PIXELS32 0x00000002
588#define VIVS_DE_VR_CONFIG_EX_VERTICAL_LINE_WIDTH_MASK 0x00000008
589#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP__MASK 0x000000f0
590#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP__SHIFT 4
591#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP(x) (((x) << VIVS_DE_VR_CONFIG_EX_FILTER_TAP__SHIFT) & VIVS_DE_VR_CONFIG_EX_FILTER_TAP__MASK)
592#define VIVS_DE_VR_CONFIG_EX_FILTER_TAP_MASK 0x00000100
593
594#define VIVS_DE_PE_DITHER_LOW 0x000012e8
595#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__MASK 0x0000000f
596#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__SHIFT 0
597#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y0__MASK)
598#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__MASK 0x000000f0
599#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__SHIFT 4
600#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y0__MASK)
601#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__MASK 0x00000f00
602#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__SHIFT 8
603#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y0__MASK)
604#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__MASK 0x0000f000
605#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__SHIFT 12
606#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y0__MASK)
607#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__MASK 0x000f0000
608#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__SHIFT 16
609#define VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X0_Y1__MASK)
610#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__MASK 0x00f00000
611#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__SHIFT 20
612#define VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X1_Y1__MASK)
613#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__MASK 0x0f000000
614#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__SHIFT 24
615#define VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X2_Y1__MASK)
616#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__MASK 0xf0000000
617#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__SHIFT 28
618#define VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1(x) (((x) << VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__SHIFT) & VIVS_DE_PE_DITHER_LOW_PIXEL_X3_Y1__MASK)
619
620#define VIVS_DE_PE_DITHER_HIGH 0x000012ec
621#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__MASK 0x0000000f
622#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__SHIFT 0
623#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y2__MASK)
624#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__MASK 0x000000f0
625#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__SHIFT 4
626#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y2__MASK)
627#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__MASK 0x00000f00
628#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__SHIFT 8
629#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y2__MASK)
630#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__MASK 0x0000f000
631#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__SHIFT 12
632#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y2__MASK)
633#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__MASK 0x000f0000
634#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__SHIFT 16
635#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X0_Y3__MASK)
636#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__MASK 0x00f00000
637#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__SHIFT 20
638#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X1_Y3__MASK)
639#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__MASK 0x0f000000
640#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__SHIFT 24
641#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X2_Y3__MASK)
642#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__MASK 0xf0000000
643#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__SHIFT 28
644#define VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3(x) (((x) << VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__SHIFT) & VIVS_DE_PE_DITHER_HIGH_PIXEL_X3_Y3__MASK)
645
646#define VIVS_DE_BW_CONFIG 0x000012f0
647#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG__MASK 0x00000001
648#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG__SHIFT 0
649#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_AUTO 0x00000000
650#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_CUSTOMIZE 0x00000001
651#define VIVS_DE_BW_CONFIG_BLOCK_CONFIG_MASK 0x00000008
652#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION__MASK 0x00000010
653#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION__SHIFT 4
654#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000
655#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_BOTTOM_RIGHT 0x00000010
656#define VIVS_DE_BW_CONFIG_BLOCK_WALK_DIRECTION_MASK 0x00000080
657#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION__MASK 0x00000100
658#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION__SHIFT 8
659#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000
660#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_BOTTOM_RIGHT 0x00000100
661#define VIVS_DE_BW_CONFIG_TILE_WALK_DIRECTION_MASK 0x00000800
662#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION__MASK 0x00001000
663#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION__SHIFT 12
664#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_RIGHT_BOTTOM 0x00000000
665#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_BOTTOM_RIGHT 0x00001000
666#define VIVS_DE_BW_CONFIG_PIXEL_WALK_DIRECTION_MASK 0x00008000
667
668#define VIVS_DE_BW_BLOCK_SIZE 0x000012f4
669#define VIVS_DE_BW_BLOCK_SIZE_WIDTH__MASK 0x0000ffff
670#define VIVS_DE_BW_BLOCK_SIZE_WIDTH__SHIFT 0
671#define VIVS_DE_BW_BLOCK_SIZE_WIDTH(x) (((x) << VIVS_DE_BW_BLOCK_SIZE_WIDTH__SHIFT) & VIVS_DE_BW_BLOCK_SIZE_WIDTH__MASK)
672#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT__MASK 0xffff0000
673#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT__SHIFT 16
674#define VIVS_DE_BW_BLOCK_SIZE_HEIGHT(x) (((x) << VIVS_DE_BW_BLOCK_SIZE_HEIGHT__SHIFT) & VIVS_DE_BW_BLOCK_SIZE_HEIGHT__MASK)
675
676#define VIVS_DE_BW_TILE_SIZE 0x000012f8
677#define VIVS_DE_BW_TILE_SIZE_WIDTH__MASK 0x0000ffff
678#define VIVS_DE_BW_TILE_SIZE_WIDTH__SHIFT 0
679#define VIVS_DE_BW_TILE_SIZE_WIDTH(x) (((x) << VIVS_DE_BW_TILE_SIZE_WIDTH__SHIFT) & VIVS_DE_BW_TILE_SIZE_WIDTH__MASK)
680#define VIVS_DE_BW_TILE_SIZE_HEIGHT__MASK 0xffff0000
681#define VIVS_DE_BW_TILE_SIZE_HEIGHT__SHIFT 16
682#define VIVS_DE_BW_TILE_SIZE_HEIGHT(x) (((x) << VIVS_DE_BW_TILE_SIZE_HEIGHT__SHIFT) & VIVS_DE_BW_TILE_SIZE_HEIGHT__MASK)
683
684#define VIVS_DE_BW_BLOCK_MASK 0x000012fc
685#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__MASK 0x0000ffff
686#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__SHIFT 0
687#define VIVS_DE_BW_BLOCK_MASK_HORIZONTAL(x) (((x) << VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__SHIFT) & VIVS_DE_BW_BLOCK_MASK_HORIZONTAL__MASK)
688#define VIVS_DE_BW_BLOCK_MASK_VERTICAL__MASK 0xffff0000
689#define VIVS_DE_BW_BLOCK_MASK_VERTICAL__SHIFT 16
690#define VIVS_DE_BW_BLOCK_MASK_VERTICAL(x) (((x) << VIVS_DE_BW_BLOCK_MASK_VERTICAL__SHIFT) & VIVS_DE_BW_BLOCK_MASK_VERTICAL__MASK)
691
692#define VIVS_DE_SRC_EX_CONFIG 0x00001300
693#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001
694#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0
695#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000
696#define VIVS_DE_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001
697#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008
698#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3
699#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000
700#define VIVS_DE_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008
701#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100
702#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8
703#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000
704#define VIVS_DE_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100
705
706#define VIVS_DE_SRC_EX_ADDRESS 0x00001304
707
708#define VIVS_DE_DE_MULTI_SOURCE 0x00001308
709#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__MASK 0x00000007
710#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__SHIFT 0
711#define VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE(x) (((x) << VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__SHIFT) & VIVS_DE_DE_MULTI_SOURCE_MAX_SOURCE__MASK)
712#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK__MASK 0x00000700
713#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK__SHIFT 8
714#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL16 0x00000000
715#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL32 0x00000100
716#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL64 0x00000200
717#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL128 0x00000300
718#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL256 0x00000400
719#define VIVS_DE_DE_MULTI_SOURCE_HORIZONTAL_BLOCK_PIXEL512 0x00000500
720#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK__MASK 0x00070000
721#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK__SHIFT 16
722#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE1 0x00000000
723#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE2 0x00010000
724#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE4 0x00020000
725#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE8 0x00030000
726#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE16 0x00040000
727#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE32 0x00050000
728#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE64 0x00060000
729#define VIVS_DE_DE_MULTI_SOURCE_VERTICAL_BLOCK_LINE128 0x00070000
730
731#define VIVS_DE_DEYUV_CONVERSION 0x0000130c
732#define VIVS_DE_DEYUV_CONVERSION_ENABLE__MASK 0x00000003
733#define VIVS_DE_DEYUV_CONVERSION_ENABLE__SHIFT 0
734#define VIVS_DE_DEYUV_CONVERSION_ENABLE_OFF 0x00000000
735#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE1 0x00000001
736#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE2 0x00000002
737#define VIVS_DE_DEYUV_CONVERSION_ENABLE_PLANE3 0x00000003
738#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__MASK 0x0000000c
739#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__SHIFT 2
740#define VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_COUNT__MASK)
741#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__MASK 0x00000030
742#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__SHIFT 4
743#define VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_COUNT__MASK)
744#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__MASK 0x000000c0
745#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__SHIFT 6
746#define VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_COUNT__MASK)
747#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__MASK 0x00000300
748#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__SHIFT 8
749#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_B__MASK)
750#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__MASK 0x00000c00
751#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__SHIFT 10
752#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_G__MASK)
753#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__MASK 0x00003000
754#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__SHIFT 12
755#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_R__MASK)
756#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__MASK 0x0000c000
757#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__SHIFT 14
758#define VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE1_SWIZZLE_A__MASK)
759#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__MASK 0x00030000
760#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__SHIFT 16
761#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_B__MASK)
762#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__MASK 0x000c0000
763#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__SHIFT 18
764#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_G__MASK)
765#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__MASK 0x00300000
766#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__SHIFT 20
767#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_R__MASK)
768#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__MASK 0x00c00000
769#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__SHIFT 22
770#define VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE2_SWIZZLE_A__MASK)
771#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__MASK 0x03000000
772#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__SHIFT 24
773#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_B__MASK)
774#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__MASK 0x0c000000
775#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__SHIFT 26
776#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_G__MASK)
777#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__MASK 0x30000000
778#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__SHIFT 28
779#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_R__MASK)
780#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__MASK 0xc0000000
781#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__SHIFT 30
782#define VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A(x) (((x) << VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__SHIFT) & VIVS_DE_DEYUV_CONVERSION_PLANE3_SWIZZLE_A__MASK)
783
784#define VIVS_DE_DE_PLANE2_ADDRESS 0x00001310
785
786#define VIVS_DE_DE_PLANE2_STRIDE 0x00001314
787#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE__MASK 0x0003ffff
788#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE__SHIFT 0
789#define VIVS_DE_DE_PLANE2_STRIDE_STRIDE(x) (((x) << VIVS_DE_DE_PLANE2_STRIDE_STRIDE__SHIFT) & VIVS_DE_DE_PLANE2_STRIDE_STRIDE__MASK)
790
791#define VIVS_DE_DE_PLANE3_ADDRESS 0x00001318
792
793#define VIVS_DE_DE_PLANE3_STRIDE 0x0000131c
794#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE__MASK 0x0003ffff
795#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE__SHIFT 0
796#define VIVS_DE_DE_PLANE3_STRIDE_STRIDE(x) (((x) << VIVS_DE_DE_PLANE3_STRIDE_STRIDE__SHIFT) & VIVS_DE_DE_PLANE3_STRIDE_STRIDE__MASK)
797
798#define VIVS_DE_DE_STALL_DE 0x00001320
799#define VIVS_DE_DE_STALL_DE_ENABLE__MASK 0x00000001
800#define VIVS_DE_DE_STALL_DE_ENABLE__SHIFT 0
801#define VIVS_DE_DE_STALL_DE_ENABLE_DISABLE 0x00000000
802#define VIVS_DE_DE_STALL_DE_ENABLE_ENABLE 0x00000001
803
804#define VIVS_DE_FILTER_KERNEL(i0) (0x00001800 + 0x4*(i0))
805#define VIVS_DE_FILTER_KERNEL__ESIZE 0x00000004
806#define VIVS_DE_FILTER_KERNEL__LEN 0x00000080
807#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff
808#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0__SHIFT 0
809#define VIVS_DE_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_FILTER_KERNEL_COEFFICIENT0__MASK)
810#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000
811#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1__SHIFT 16
812#define VIVS_DE_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_FILTER_KERNEL_COEFFICIENT1__MASK)
813
814#define VIVS_DE_INDEX_COLOR_TABLE(i0) (0x00001c00 + 0x4*(i0))
815#define VIVS_DE_INDEX_COLOR_TABLE__ESIZE 0x00000004
816#define VIVS_DE_INDEX_COLOR_TABLE__LEN 0x00000100
817
818#define VIVS_DE_HORI_FILTER_KERNEL(i0) (0x00002800 + 0x4*(i0))
819#define VIVS_DE_HORI_FILTER_KERNEL__ESIZE 0x00000004
820#define VIVS_DE_HORI_FILTER_KERNEL__LEN 0x00000080
821#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff
822#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__SHIFT 0
823#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT0__MASK)
824#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000
825#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__SHIFT 16
826#define VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_HORI_FILTER_KERNEL_COEFFICIENT1__MASK)
827
828#define VIVS_DE_VERTI_FILTER_KERNEL(i0) (0x00002a00 + 0x4*(i0))
829#define VIVS_DE_VERTI_FILTER_KERNEL__ESIZE 0x00000004
830#define VIVS_DE_VERTI_FILTER_KERNEL__LEN 0x00000080
831#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__MASK 0x0000ffff
832#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__SHIFT 0
833#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0(x) (((x) << VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__SHIFT) & VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT0__MASK)
834#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__MASK 0xffff0000
835#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__SHIFT 16
836#define VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1(x) (((x) << VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__SHIFT) & VIVS_DE_VERTI_FILTER_KERNEL_COEFFICIENT1__MASK)
837
838#define VIVS_DE_INDEX_COLOR_TABLE32(i0) (0x00003400 + 0x4*(i0))
839#define VIVS_DE_INDEX_COLOR_TABLE32__ESIZE 0x00000004
840#define VIVS_DE_INDEX_COLOR_TABLE32__LEN 0x00000100
841
842#define VIVS_DE_BLOCK4 0x00000000
843
844#define VIVS_DE_BLOCK4_SRC_ADDRESS(i0) (0x00012800 + 0x4*(i0))
845#define VIVS_DE_BLOCK4_SRC_ADDRESS__ESIZE 0x00000004
846#define VIVS_DE_BLOCK4_SRC_ADDRESS__LEN 0x00000004
847
848#define VIVS_DE_BLOCK4_SRC_STRIDE(i0) (0x00012810 + 0x4*(i0))
849#define VIVS_DE_BLOCK4_SRC_STRIDE__ESIZE 0x00000004
850#define VIVS_DE_BLOCK4_SRC_STRIDE__LEN 0x00000004
851#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__MASK 0x0003ffff
852#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__SHIFT 0
853#define VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_BLOCK4_SRC_STRIDE_STRIDE__MASK)
854
855#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG(i0) (0x00012820 + 0x4*(i0))
856#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG__ESIZE 0x00000004
857#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG__LEN 0x00000004
858#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff
859#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0
860#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_WIDTH__MASK)
861#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000
862#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16
863#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000
864#define VIVS_DE_BLOCK4_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000
865
866#define VIVS_DE_BLOCK4_SRC_CONFIG(i0) (0x00012830 + 0x4*(i0))
867#define VIVS_DE_BLOCK4_SRC_CONFIG__ESIZE 0x00000004
868#define VIVS_DE_BLOCK4_SRC_CONFIG__LEN 0x00000004
869#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f
870#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0
871#define VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK)
872#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030
873#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__SHIFT 4
874#define VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_TRANSPARENCY__MASK)
875#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040
876#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE__SHIFT 6
877#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000
878#define VIVS_DE_BLOCK4_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040
879#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED__MASK 0x00000080
880#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED__SHIFT 7
881#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED_DISABLE 0x00000000
882#define VIVS_DE_BLOCK4_SRC_CONFIG_TILED_ENABLE 0x00000080
883#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION__MASK 0x00000100
884#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION__SHIFT 8
885#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION_MEMORY 0x00000000
886#define VIVS_DE_BLOCK4_SRC_CONFIG_LOCATION_STREAM 0x00000100
887#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK__MASK 0x00003000
888#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK__SHIFT 12
889#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED8 0x00000000
890#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED16 0x00001000
891#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_PACKED32 0x00002000
892#define VIVS_DE_BLOCK4_SRC_CONFIG_PACK_UNPACKED 0x00003000
893#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000
894#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15
895#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000
896#define VIVS_DE_BLOCK4_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000
897#define VIVS_DE_BLOCK4_SRC_CONFIG_UNK16 0x00010000
898#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__MASK 0x00300000
899#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__SHIFT 20
900#define VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_SWIZZLE__MASK)
901#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000
902#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24
903#define VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_SOURCE_FORMAT__MASK)
904#define VIVS_DE_BLOCK4_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000
905#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000
906#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30
907#define VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_BLOCK4_SRC_CONFIG_ENDIAN_CONTROL__MASK)
908
909#define VIVS_DE_BLOCK4_SRC_ORIGIN(i0) (0x00012840 + 0x4*(i0))
910#define VIVS_DE_BLOCK4_SRC_ORIGIN__ESIZE 0x00000004
911#define VIVS_DE_BLOCK4_SRC_ORIGIN__LEN 0x00000004
912#define VIVS_DE_BLOCK4_SRC_ORIGIN_X__MASK 0x0000ffff
913#define VIVS_DE_BLOCK4_SRC_ORIGIN_X__SHIFT 0
914#define VIVS_DE_BLOCK4_SRC_ORIGIN_X(x) (((x) << VIVS_DE_BLOCK4_SRC_ORIGIN_X__SHIFT) & VIVS_DE_BLOCK4_SRC_ORIGIN_X__MASK)
915#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y__MASK 0xffff0000
916#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y__SHIFT 16
917#define VIVS_DE_BLOCK4_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_BLOCK4_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_BLOCK4_SRC_ORIGIN_Y__MASK)
918
919#define VIVS_DE_BLOCK4_SRC_SIZE(i0) (0x00012850 + 0x4*(i0))
920#define VIVS_DE_BLOCK4_SRC_SIZE__ESIZE 0x00000004
921#define VIVS_DE_BLOCK4_SRC_SIZE__LEN 0x00000004
922#define VIVS_DE_BLOCK4_SRC_SIZE_X__MASK 0x0000ffff
923#define VIVS_DE_BLOCK4_SRC_SIZE_X__SHIFT 0
924#define VIVS_DE_BLOCK4_SRC_SIZE_X(x) (((x) << VIVS_DE_BLOCK4_SRC_SIZE_X__SHIFT) & VIVS_DE_BLOCK4_SRC_SIZE_X__MASK)
925#define VIVS_DE_BLOCK4_SRC_SIZE_Y__MASK 0xffff0000
926#define VIVS_DE_BLOCK4_SRC_SIZE_Y__SHIFT 16
927#define VIVS_DE_BLOCK4_SRC_SIZE_Y(x) (((x) << VIVS_DE_BLOCK4_SRC_SIZE_Y__SHIFT) & VIVS_DE_BLOCK4_SRC_SIZE_Y__MASK)
928
929#define VIVS_DE_BLOCK4_SRC_COLOR_BG(i0) (0x00012860 + 0x4*(i0))
930#define VIVS_DE_BLOCK4_SRC_COLOR_BG__ESIZE 0x00000004
931#define VIVS_DE_BLOCK4_SRC_COLOR_BG__LEN 0x00000004
932
933#define VIVS_DE_BLOCK4_ROP(i0) (0x00012870 + 0x4*(i0))
934#define VIVS_DE_BLOCK4_ROP__ESIZE 0x00000004
935#define VIVS_DE_BLOCK4_ROP__LEN 0x00000004
936#define VIVS_DE_BLOCK4_ROP_ROP_FG__MASK 0x000000ff
937#define VIVS_DE_BLOCK4_ROP_ROP_FG__SHIFT 0
938#define VIVS_DE_BLOCK4_ROP_ROP_FG(x) (((x) << VIVS_DE_BLOCK4_ROP_ROP_FG__SHIFT) & VIVS_DE_BLOCK4_ROP_ROP_FG__MASK)
939#define VIVS_DE_BLOCK4_ROP_ROP_BG__MASK 0x0000ff00
940#define VIVS_DE_BLOCK4_ROP_ROP_BG__SHIFT 8
941#define VIVS_DE_BLOCK4_ROP_ROP_BG(x) (((x) << VIVS_DE_BLOCK4_ROP_ROP_BG__SHIFT) & VIVS_DE_BLOCK4_ROP_ROP_BG__MASK)
942#define VIVS_DE_BLOCK4_ROP_TYPE__MASK 0x00300000
943#define VIVS_DE_BLOCK4_ROP_TYPE__SHIFT 20
944#define VIVS_DE_BLOCK4_ROP_TYPE_ROP2_PATTERN 0x00000000
945#define VIVS_DE_BLOCK4_ROP_TYPE_ROP2_SOURCE 0x00100000
946#define VIVS_DE_BLOCK4_ROP_TYPE_ROP3 0x00200000
947#define VIVS_DE_BLOCK4_ROP_TYPE_ROP4 0x00300000
948
949#define VIVS_DE_BLOCK4_ALPHA_CONTROL(i0) (0x00012880 + 0x4*(i0))
950#define VIVS_DE_BLOCK4_ALPHA_CONTROL__ESIZE 0x00000004
951#define VIVS_DE_BLOCK4_ALPHA_CONTROL__LEN 0x00000004
952#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE__MASK 0x00000001
953#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE__SHIFT 0
954#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE_OFF 0x00000000
955#define VIVS_DE_BLOCK4_ALPHA_CONTROL_ENABLE_ON 0x00000001
956#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000
957#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16
958#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK)
959#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000
960#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24
961#define VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_BLOCK4_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK)
962
963#define VIVS_DE_BLOCK4_ALPHA_MODES(i0) (0x00012890 + 0x4*(i0))
964#define VIVS_DE_BLOCK4_ALPHA_MODES__ESIZE 0x00000004
965#define VIVS_DE_BLOCK4_ALPHA_MODES__LEN 0x00000004
966#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001
967#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0
968#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000
969#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001
970#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010
971#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4
972#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000
973#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010
974#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300
975#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8
976#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000
977#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100
978#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200
979#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000
980#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12
981#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000
982#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000
983#define VIVS_DE_BLOCK4_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000
984#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000
985#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16
986#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000
987#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000
988#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000
989#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20
990#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000
991#define VIVS_DE_BLOCK4_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000
992#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000
993#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24
994#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK4_ALPHA_MODES_SRC_BLENDING_MODE__MASK)
995#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000
996#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27
997#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000
998#define VIVS_DE_BLOCK4_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000
999#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000
1000#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28
1001#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK4_ALPHA_MODES_DST_BLENDING_MODE__MASK)
1002#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000
1003#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31
1004#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000
1005#define VIVS_DE_BLOCK4_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000
1006
1007#define VIVS_DE_BLOCK4_ADDRESS_U(i0) (0x000128a0 + 0x4*(i0))
1008#define VIVS_DE_BLOCK4_ADDRESS_U__ESIZE 0x00000004
1009#define VIVS_DE_BLOCK4_ADDRESS_U__LEN 0x00000004
1010
1011#define VIVS_DE_BLOCK4_STRIDE_U(i0) (0x000128b0 + 0x4*(i0))
1012#define VIVS_DE_BLOCK4_STRIDE_U__ESIZE 0x00000004
1013#define VIVS_DE_BLOCK4_STRIDE_U__LEN 0x00000004
1014#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE__MASK 0x0003ffff
1015#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE__SHIFT 0
1016#define VIVS_DE_BLOCK4_STRIDE_U_STRIDE(x) (((x) << VIVS_DE_BLOCK4_STRIDE_U_STRIDE__SHIFT) & VIVS_DE_BLOCK4_STRIDE_U_STRIDE__MASK)
1017
1018#define VIVS_DE_BLOCK4_ADDRESS_V(i0) (0x000128c0 + 0x4*(i0))
1019#define VIVS_DE_BLOCK4_ADDRESS_V__ESIZE 0x00000004
1020#define VIVS_DE_BLOCK4_ADDRESS_V__LEN 0x00000004
1021
1022#define VIVS_DE_BLOCK4_STRIDE_V(i0) (0x000128d0 + 0x4*(i0))
1023#define VIVS_DE_BLOCK4_STRIDE_V__ESIZE 0x00000004
1024#define VIVS_DE_BLOCK4_STRIDE_V__LEN 0x00000004
1025#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE__MASK 0x0003ffff
1026#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE__SHIFT 0
1027#define VIVS_DE_BLOCK4_STRIDE_V_STRIDE(x) (((x) << VIVS_DE_BLOCK4_STRIDE_V_STRIDE__SHIFT) & VIVS_DE_BLOCK4_STRIDE_V_STRIDE__MASK)
1028
1029#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT(i0) (0x000128e0 + 0x4*(i0))
1030#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT__ESIZE 0x00000004
1031#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT__LEN 0x00000004
1032#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff
1033#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0
1034#define VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_BLOCK4_SRC_ROTATION_HEIGHT_HEIGHT__MASK)
1035
1036#define VIVS_DE_BLOCK4_ROT_ANGLE(i0) (0x000128f0 + 0x4*(i0))
1037#define VIVS_DE_BLOCK4_ROT_ANGLE__ESIZE 0x00000004
1038#define VIVS_DE_BLOCK4_ROT_ANGLE__LEN 0x00000004
1039#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC__MASK 0x00000007
1040#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC__SHIFT 0
1041#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_SRC__MASK)
1042#define VIVS_DE_BLOCK4_ROT_ANGLE_DST__MASK 0x00000038
1043#define VIVS_DE_BLOCK4_ROT_ANGLE_DST__SHIFT 3
1044#define VIVS_DE_BLOCK4_ROT_ANGLE_DST(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_DST__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_DST__MASK)
1045#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MASK 0x00000100
1046#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MASK 0x00000200
1047#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000
1048#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__SHIFT 12
1049#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR__MASK)
1050#define VIVS_DE_BLOCK4_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000
1051#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__MASK 0x00030000
1052#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__SHIFT 16
1053#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR__MASK)
1054#define VIVS_DE_BLOCK4_ROT_ANGLE_DST_MIRROR_MASK 0x00080000
1055
1056#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR(i0) (0x00012900 + 0x4*(i0))
1057#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR__ESIZE 0x00000004
1058#define VIVS_DE_BLOCK4_GLOBAL_SRC_COLOR__LEN 0x00000004
1059
1060#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR(i0) (0x00012910 + 0x4*(i0))
1061#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR__ESIZE 0x00000004
1062#define VIVS_DE_BLOCK4_GLOBAL_DEST_COLOR__LEN 0x00000004
1063
1064#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES(i0) (0x00012920 + 0x4*(i0))
1065#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES__ESIZE 0x00000004
1066#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES__LEN 0x00000004
1067#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001
1068#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0
1069#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000
1070#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001
1071#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010
1072#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4
1073#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000
1074#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010
1075#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300
1076#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8
1077#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000
1078#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100
1079#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200
1080#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000
1081#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20
1082#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000
1083#define VIVS_DE_BLOCK4_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000
1084
1085#define VIVS_DE_BLOCK4_TRANSPARENCY(i0) (0x00012930 + 0x4*(i0))
1086#define VIVS_DE_BLOCK4_TRANSPARENCY__ESIZE 0x00000004
1087#define VIVS_DE_BLOCK4_TRANSPARENCY__LEN 0x00000004
1088#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE__MASK 0x00000003
1089#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE__SHIFT 0
1090#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_OPAQUE 0x00000000
1091#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_MASK 0x00000001
1092#define VIVS_DE_BLOCK4_TRANSPARENCY_SOURCE_KEY 0x00000002
1093#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN__MASK 0x00000030
1094#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN__SHIFT 4
1095#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_OPAQUE 0x00000000
1096#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_MASK 0x00000010
1097#define VIVS_DE_BLOCK4_TRANSPARENCY_PATTERN_KEY 0x00000020
1098#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION__MASK 0x00000300
1099#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION__SHIFT 8
1100#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000
1101#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_MASK 0x00000100
1102#define VIVS_DE_BLOCK4_TRANSPARENCY_DESTINATION_KEY 0x00000200
1103#define VIVS_DE_BLOCK4_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000
1104#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000
1105#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16
1106#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000
1107#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000
1108#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000
1109#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000
1110#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20
1111#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000
1112#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000
1113#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000
1114#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000
1115#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24
1116#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000
1117#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000
1118#define VIVS_DE_BLOCK4_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000
1119#define VIVS_DE_BLOCK4_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000
1120#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000
1121#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29
1122#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000
1123#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000
1124#define VIVS_DE_BLOCK4_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000
1125
1126#define VIVS_DE_BLOCK4_CONTROL(i0) (0x00012940 + 0x4*(i0))
1127#define VIVS_DE_BLOCK4_CONTROL__ESIZE 0x00000004
1128#define VIVS_DE_BLOCK4_CONTROL__LEN 0x00000004
1129#define VIVS_DE_BLOCK4_CONTROL_YUV__MASK 0x00000001
1130#define VIVS_DE_BLOCK4_CONTROL_YUV__SHIFT 0
1131#define VIVS_DE_BLOCK4_CONTROL_YUV_601 0x00000000
1132#define VIVS_DE_BLOCK4_CONTROL_YUV_709 0x00000001
1133#define VIVS_DE_BLOCK4_CONTROL_YUV_MASK 0x00000008
1134#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE__MASK 0x00000010
1135#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE__SHIFT 4
1136#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_UV 0x00000000
1137#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_VU 0x00000010
1138#define VIVS_DE_BLOCK4_CONTROL_UV_SWIZZLE_MASK 0x00000080
1139#define VIVS_DE_BLOCK4_CONTROL_YUVRGB__MASK 0x00000100
1140#define VIVS_DE_BLOCK4_CONTROL_YUVRGB__SHIFT 8
1141#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_DISABLE 0x00000000
1142#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_ENABLE 0x00000100
1143#define VIVS_DE_BLOCK4_CONTROL_YUVRGB_MASK 0x00000800
1144
1145#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH(i0) (0x00012950 + 0x4*(i0))
1146#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH__ESIZE 0x00000004
1147#define VIVS_DE_BLOCK4_SRC_COLOR_KEY_HIGH__LEN 0x00000004
1148
1149#define VIVS_DE_BLOCK4_SRC_EX_CONFIG(i0) (0x00012960 + 0x4*(i0))
1150#define VIVS_DE_BLOCK4_SRC_EX_CONFIG__ESIZE 0x00000004
1151#define VIVS_DE_BLOCK4_SRC_EX_CONFIG__LEN 0x00000004
1152#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001
1153#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0
1154#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000
1155#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001
1156#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008
1157#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3
1158#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000
1159#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008
1160#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100
1161#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8
1162#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000
1163#define VIVS_DE_BLOCK4_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100
1164
1165#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS(i0) (0x00012970 + 0x4*(i0))
1166#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS__ESIZE 0x00000004
1167#define VIVS_DE_BLOCK4_SRC_EX_ADDRESS__LEN 0x00000004
1168
1169#define VIVS_DE_BLOCK8 0x00000000
1170
1171#define VIVS_DE_BLOCK8_SRC_ADDRESS(i0) (0x00012a00 + 0x4*(i0))
1172#define VIVS_DE_BLOCK8_SRC_ADDRESS__ESIZE 0x00000004
1173#define VIVS_DE_BLOCK8_SRC_ADDRESS__LEN 0x00000008
1174
1175#define VIVS_DE_BLOCK8_SRC_STRIDE(i0) (0x00012a20 + 0x4*(i0))
1176#define VIVS_DE_BLOCK8_SRC_STRIDE__ESIZE 0x00000004
1177#define VIVS_DE_BLOCK8_SRC_STRIDE__LEN 0x00000008
1178#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__MASK 0x0003ffff
1179#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__SHIFT 0
1180#define VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE(x) (((x) << VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__SHIFT) & VIVS_DE_BLOCK8_SRC_STRIDE_STRIDE__MASK)
1181
1182#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG(i0) (0x00012a40 + 0x4*(i0))
1183#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG__ESIZE 0x00000004
1184#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG__LEN 0x00000008
1185#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__MASK 0x0000ffff
1186#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__SHIFT 0
1187#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH(x) (((x) << VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__SHIFT) & VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_WIDTH__MASK)
1188#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION__MASK 0x00010000
1189#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION__SHIFT 16
1190#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_DISABLE 0x00000000
1191#define VIVS_DE_BLOCK8_SRC_ROTATION_CONFIG_ROTATION_ENABLE 0x00010000
1192
1193#define VIVS_DE_BLOCK8_SRC_CONFIG(i0) (0x00012a60 + 0x4*(i0))
1194#define VIVS_DE_BLOCK8_SRC_CONFIG__ESIZE 0x00000004
1195#define VIVS_DE_BLOCK8_SRC_CONFIG__LEN 0x00000008
1196#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK 0x0000000f
1197#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT 0
1198#define VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_PE10_SOURCE_FORMAT__MASK)
1199#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__MASK 0x00000030
1200#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__SHIFT 4
1201#define VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_TRANSPARENCY__MASK)
1202#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE__MASK 0x00000040
1203#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE__SHIFT 6
1204#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE_ABSOLUTE 0x00000000
1205#define VIVS_DE_BLOCK8_SRC_CONFIG_SRC_RELATIVE_RELATIVE 0x00000040
1206#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED__MASK 0x00000080
1207#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED__SHIFT 7
1208#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED_DISABLE 0x00000000
1209#define VIVS_DE_BLOCK8_SRC_CONFIG_TILED_ENABLE 0x00000080
1210#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION__MASK 0x00000100
1211#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION__SHIFT 8
1212#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION_MEMORY 0x00000000
1213#define VIVS_DE_BLOCK8_SRC_CONFIG_LOCATION_STREAM 0x00000100
1214#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK__MASK 0x00003000
1215#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK__SHIFT 12
1216#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED8 0x00000000
1217#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED16 0x00001000
1218#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_PACKED32 0x00002000
1219#define VIVS_DE_BLOCK8_SRC_CONFIG_PACK_UNPACKED 0x00003000
1220#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY__MASK 0x00008000
1221#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY__SHIFT 15
1222#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_BACKGROUND 0x00000000
1223#define VIVS_DE_BLOCK8_SRC_CONFIG_MONO_TRANSPARENCY_FOREGROUND 0x00008000
1224#define VIVS_DE_BLOCK8_SRC_CONFIG_UNK16 0x00010000
1225#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__MASK 0x00300000
1226#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__SHIFT 20
1227#define VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_SWIZZLE__MASK)
1228#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__MASK 0x1f000000
1229#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__SHIFT 24
1230#define VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_SOURCE_FORMAT__MASK)
1231#define VIVS_DE_BLOCK8_SRC_CONFIG_DISABLE420_L2_CACHE 0x20000000
1232#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__MASK 0xc0000000
1233#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__SHIFT 30
1234#define VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL(x) (((x) << VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__SHIFT) & VIVS_DE_BLOCK8_SRC_CONFIG_ENDIAN_CONTROL__MASK)
1235
1236#define VIVS_DE_BLOCK8_SRC_ORIGIN(i0) (0x00012a80 + 0x4*(i0))
1237#define VIVS_DE_BLOCK8_SRC_ORIGIN__ESIZE 0x00000004
1238#define VIVS_DE_BLOCK8_SRC_ORIGIN__LEN 0x00000008
1239#define VIVS_DE_BLOCK8_SRC_ORIGIN_X__MASK 0x0000ffff
1240#define VIVS_DE_BLOCK8_SRC_ORIGIN_X__SHIFT 0
1241#define VIVS_DE_BLOCK8_SRC_ORIGIN_X(x) (((x) << VIVS_DE_BLOCK8_SRC_ORIGIN_X__SHIFT) & VIVS_DE_BLOCK8_SRC_ORIGIN_X__MASK)
1242#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y__MASK 0xffff0000
1243#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y__SHIFT 16
1244#define VIVS_DE_BLOCK8_SRC_ORIGIN_Y(x) (((x) << VIVS_DE_BLOCK8_SRC_ORIGIN_Y__SHIFT) & VIVS_DE_BLOCK8_SRC_ORIGIN_Y__MASK)
1245
1246#define VIVS_DE_BLOCK8_SRC_SIZE(i0) (0x00012aa0 + 0x4*(i0))
1247#define VIVS_DE_BLOCK8_SRC_SIZE__ESIZE 0x00000004
1248#define VIVS_DE_BLOCK8_SRC_SIZE__LEN 0x00000008
1249#define VIVS_DE_BLOCK8_SRC_SIZE_X__MASK 0x0000ffff
1250#define VIVS_DE_BLOCK8_SRC_SIZE_X__SHIFT 0
1251#define VIVS_DE_BLOCK8_SRC_SIZE_X(x) (((x) << VIVS_DE_BLOCK8_SRC_SIZE_X__SHIFT) & VIVS_DE_BLOCK8_SRC_SIZE_X__MASK)
1252#define VIVS_DE_BLOCK8_SRC_SIZE_Y__MASK 0xffff0000
1253#define VIVS_DE_BLOCK8_SRC_SIZE_Y__SHIFT 16
1254#define VIVS_DE_BLOCK8_SRC_SIZE_Y(x) (((x) << VIVS_DE_BLOCK8_SRC_SIZE_Y__SHIFT) & VIVS_DE_BLOCK8_SRC_SIZE_Y__MASK)
1255
1256#define VIVS_DE_BLOCK8_SRC_COLOR_BG(i0) (0x00012ac0 + 0x4*(i0))
1257#define VIVS_DE_BLOCK8_SRC_COLOR_BG__ESIZE 0x00000004
1258#define VIVS_DE_BLOCK8_SRC_COLOR_BG__LEN 0x00000008
1259
1260#define VIVS_DE_BLOCK8_ROP(i0) (0x00012ae0 + 0x4*(i0))
1261#define VIVS_DE_BLOCK8_ROP__ESIZE 0x00000004
1262#define VIVS_DE_BLOCK8_ROP__LEN 0x00000008
1263#define VIVS_DE_BLOCK8_ROP_ROP_FG__MASK 0x000000ff
1264#define VIVS_DE_BLOCK8_ROP_ROP_FG__SHIFT 0
1265#define VIVS_DE_BLOCK8_ROP_ROP_FG(x) (((x) << VIVS_DE_BLOCK8_ROP_ROP_FG__SHIFT) & VIVS_DE_BLOCK8_ROP_ROP_FG__MASK)
1266#define VIVS_DE_BLOCK8_ROP_ROP_BG__MASK 0x0000ff00
1267#define VIVS_DE_BLOCK8_ROP_ROP_BG__SHIFT 8
1268#define VIVS_DE_BLOCK8_ROP_ROP_BG(x) (((x) << VIVS_DE_BLOCK8_ROP_ROP_BG__SHIFT) & VIVS_DE_BLOCK8_ROP_ROP_BG__MASK)
1269#define VIVS_DE_BLOCK8_ROP_TYPE__MASK 0x00300000
1270#define VIVS_DE_BLOCK8_ROP_TYPE__SHIFT 20
1271#define VIVS_DE_BLOCK8_ROP_TYPE_ROP2_PATTERN 0x00000000
1272#define VIVS_DE_BLOCK8_ROP_TYPE_ROP2_SOURCE 0x00100000
1273#define VIVS_DE_BLOCK8_ROP_TYPE_ROP3 0x00200000
1274#define VIVS_DE_BLOCK8_ROP_TYPE_ROP4 0x00300000
1275
1276#define VIVS_DE_BLOCK8_ALPHA_CONTROL(i0) (0x00012b00 + 0x4*(i0))
1277#define VIVS_DE_BLOCK8_ALPHA_CONTROL__ESIZE 0x00000004
1278#define VIVS_DE_BLOCK8_ALPHA_CONTROL__LEN 0x00000008
1279#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE__MASK 0x00000001
1280#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE__SHIFT 0
1281#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE_OFF 0x00000000
1282#define VIVS_DE_BLOCK8_ALPHA_CONTROL_ENABLE_ON 0x00000001
1283#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK 0x00ff0000
1284#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT 16
1285#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA(x) (((x) << VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__SHIFT) & VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_SRC_ALPHA__MASK)
1286#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK 0xff000000
1287#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT 24
1288#define VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA(x) (((x) << VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__SHIFT) & VIVS_DE_BLOCK8_ALPHA_CONTROL_PE10_GLOBAL_DST_ALPHA__MASK)
1289
1290#define VIVS_DE_BLOCK8_ALPHA_MODES(i0) (0x00012b20 + 0x4*(i0))
1291#define VIVS_DE_BLOCK8_ALPHA_MODES__ESIZE 0x00000004
1292#define VIVS_DE_BLOCK8_ALPHA_MODES__LEN 0x00000008
1293#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE__MASK 0x00000001
1294#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE__SHIFT 0
1295#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_NORMAL 0x00000000
1296#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_MODE_INVERSED 0x00000001
1297#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE__MASK 0x00000010
1298#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE__SHIFT 4
1299#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_NORMAL 0x00000000
1300#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_MODE_INVERSED 0x00000010
1301#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__MASK 0x00000300
1302#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE__SHIFT 8
1303#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_NORMAL 0x00000000
1304#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_GLOBAL 0x00000100
1305#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_SRC_ALPHA_MODE_SCALED 0x00000200
1306#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__MASK 0x00003000
1307#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE__SHIFT 12
1308#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_NORMAL 0x00000000
1309#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_GLOBAL 0x00001000
1310#define VIVS_DE_BLOCK8_ALPHA_MODES_GLOBAL_DST_ALPHA_MODE_SCALED 0x00002000
1311#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__MASK 0x00010000
1312#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY__SHIFT 16
1313#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_DISABLE 0x00000000
1314#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_SRC_COLOR_MULTIPLY_ENABLE 0x00010000
1315#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__MASK 0x00100000
1316#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY__SHIFT 20
1317#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_DISABLE 0x00000000
1318#define VIVS_DE_BLOCK8_ALPHA_MODES_PE10_DST_COLOR_MULTIPLY_ENABLE 0x00100000
1319#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__MASK 0x07000000
1320#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT 24
1321#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK8_ALPHA_MODES_SRC_BLENDING_MODE__MASK)
1322#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR__MASK 0x08000000
1323#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR__SHIFT 27
1324#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_DISABLE 0x00000000
1325#define VIVS_DE_BLOCK8_ALPHA_MODES_SRC_ALPHA_FACTOR_ENABLE 0x08000000
1326#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__MASK 0x70000000
1327#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__SHIFT 28
1328#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE(x) (((x) << VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__SHIFT) & VIVS_DE_BLOCK8_ALPHA_MODES_DST_BLENDING_MODE__MASK)
1329#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR__MASK 0x80000000
1330#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR__SHIFT 31
1331#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_DISABLE 0x00000000
1332#define VIVS_DE_BLOCK8_ALPHA_MODES_DST_ALPHA_FACTOR_ENABLE 0x80000000
1333
1334#define VIVS_DE_BLOCK8_ADDRESS_U(i0) (0x00012b40 + 0x4*(i0))
1335#define VIVS_DE_BLOCK8_ADDRESS_U__ESIZE 0x00000004
1336#define VIVS_DE_BLOCK8_ADDRESS_U__LEN 0x00000008
1337
1338#define VIVS_DE_BLOCK8_STRIDE_U(i0) (0x00012b60 + 0x4*(i0))
1339#define VIVS_DE_BLOCK8_STRIDE_U__ESIZE 0x00000004
1340#define VIVS_DE_BLOCK8_STRIDE_U__LEN 0x00000008
1341#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE__MASK 0x0003ffff
1342#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE__SHIFT 0
1343#define VIVS_DE_BLOCK8_STRIDE_U_STRIDE(x) (((x) << VIVS_DE_BLOCK8_STRIDE_U_STRIDE__SHIFT) & VIVS_DE_BLOCK8_STRIDE_U_STRIDE__MASK)
1344
1345#define VIVS_DE_BLOCK8_ADDRESS_V(i0) (0x00012b80 + 0x4*(i0))
1346#define VIVS_DE_BLOCK8_ADDRESS_V__ESIZE 0x00000004
1347#define VIVS_DE_BLOCK8_ADDRESS_V__LEN 0x00000008
1348
1349#define VIVS_DE_BLOCK8_STRIDE_V(i0) (0x00012ba0 + 0x4*(i0))
1350#define VIVS_DE_BLOCK8_STRIDE_V__ESIZE 0x00000004
1351#define VIVS_DE_BLOCK8_STRIDE_V__LEN 0x00000008
1352#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE__MASK 0x0003ffff
1353#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE__SHIFT 0
1354#define VIVS_DE_BLOCK8_STRIDE_V_STRIDE(x) (((x) << VIVS_DE_BLOCK8_STRIDE_V_STRIDE__SHIFT) & VIVS_DE_BLOCK8_STRIDE_V_STRIDE__MASK)
1355
1356#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT(i0) (0x00012bc0 + 0x4*(i0))
1357#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT__ESIZE 0x00000004
1358#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT__LEN 0x00000008
1359#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__MASK 0x0000ffff
1360#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT 0
1361#define VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT(x) (((x) << VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__SHIFT) & VIVS_DE_BLOCK8_SRC_ROTATION_HEIGHT_HEIGHT__MASK)
1362
1363#define VIVS_DE_BLOCK8_ROT_ANGLE(i0) (0x00012be0 + 0x4*(i0))
1364#define VIVS_DE_BLOCK8_ROT_ANGLE__ESIZE 0x00000004
1365#define VIVS_DE_BLOCK8_ROT_ANGLE__LEN 0x00000008
1366#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC__MASK 0x00000007
1367#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC__SHIFT 0
1368#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_SRC__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_SRC__MASK)
1369#define VIVS_DE_BLOCK8_ROT_ANGLE_DST__MASK 0x00000038
1370#define VIVS_DE_BLOCK8_ROT_ANGLE_DST__SHIFT 3
1371#define VIVS_DE_BLOCK8_ROT_ANGLE_DST(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_DST__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_DST__MASK)
1372#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MASK 0x00000100
1373#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MASK 0x00000200
1374#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__MASK 0x00003000
1375#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__SHIFT 12
1376#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR__MASK)
1377#define VIVS_DE_BLOCK8_ROT_ANGLE_SRC_MIRROR_MASK 0x00008000
1378#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__MASK 0x00030000
1379#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__SHIFT 16
1380#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR(x) (((x) << VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__SHIFT) & VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR__MASK)
1381#define VIVS_DE_BLOCK8_ROT_ANGLE_DST_MIRROR_MASK 0x00080000
1382
1383#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR(i0) (0x00012c00 + 0x4*(i0))
1384#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR__ESIZE 0x00000004
1385#define VIVS_DE_BLOCK8_GLOBAL_SRC_COLOR__LEN 0x00000008
1386
1387#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR(i0) (0x00012c20 + 0x4*(i0))
1388#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR__ESIZE 0x00000004
1389#define VIVS_DE_BLOCK8_GLOBAL_DEST_COLOR__LEN 0x00000008
1390
1391#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES(i0) (0x00012c40 + 0x4*(i0))
1392#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES__ESIZE 0x00000004
1393#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES__LEN 0x00000008
1394#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__MASK 0x00000001
1395#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY__SHIFT 0
1396#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_DISABLE 0x00000000
1397#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_PREMULTIPLY_ENABLE 0x00000001
1398#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__MASK 0x00000010
1399#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY__SHIFT 4
1400#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_DISABLE 0x00000000
1401#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_PREMULTIPLY_ENABLE 0x00000010
1402#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__MASK 0x00000300
1403#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY__SHIFT 8
1404#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_DISABLE 0x00000000
1405#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_ALPHA 0x00000100
1406#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_SRC_GLOBAL_PREMULTIPLY_COLOR 0x00000200
1407#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__MASK 0x00100000
1408#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY__SHIFT 20
1409#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_DISABLE 0x00000000
1410#define VIVS_DE_BLOCK8_COLOR_MULTIPLY_MODES_DST_DEMULTIPLY_ENABLE 0x00100000
1411
1412#define VIVS_DE_BLOCK8_TRANSPARENCY(i0) (0x00012c60 + 0x4*(i0))
1413#define VIVS_DE_BLOCK8_TRANSPARENCY__ESIZE 0x00000004
1414#define VIVS_DE_BLOCK8_TRANSPARENCY__LEN 0x00000008
1415#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE__MASK 0x00000003
1416#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE__SHIFT 0
1417#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_OPAQUE 0x00000000
1418#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_MASK 0x00000001
1419#define VIVS_DE_BLOCK8_TRANSPARENCY_SOURCE_KEY 0x00000002
1420#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN__MASK 0x00000030
1421#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN__SHIFT 4
1422#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_OPAQUE 0x00000000
1423#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_MASK 0x00000010
1424#define VIVS_DE_BLOCK8_TRANSPARENCY_PATTERN_KEY 0x00000020
1425#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION__MASK 0x00000300
1426#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION__SHIFT 8
1427#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_OPAQUE 0x00000000
1428#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_MASK 0x00000100
1429#define VIVS_DE_BLOCK8_TRANSPARENCY_DESTINATION_KEY 0x00000200
1430#define VIVS_DE_BLOCK8_TRANSPARENCY_TRANSPARENCY_MASK 0x00001000
1431#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE__MASK 0x00030000
1432#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE__SHIFT 16
1433#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_DEFAULT 0x00000000
1434#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_ENABLE 0x00010000
1435#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_SRC_OVERRIDE_USE_DISABLE 0x00020000
1436#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE__MASK 0x00300000
1437#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE__SHIFT 20
1438#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_DEFAULT 0x00000000
1439#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_ENABLE 0x00100000
1440#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_PAT_OVERRIDE_USE_DISABLE 0x00200000
1441#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE__MASK 0x03000000
1442#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE__SHIFT 24
1443#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_DEFAULT 0x00000000
1444#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_ENABLE 0x01000000
1445#define VIVS_DE_BLOCK8_TRANSPARENCY_USE_DST_OVERRIDE_USE_DISABLE 0x02000000
1446#define VIVS_DE_BLOCK8_TRANSPARENCY_RESOURCE_OVERRIDE_MASK 0x10000000
1447#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY__MASK 0x20000000
1448#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY__SHIFT 29
1449#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_DISABLE 0x00000000
1450#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_ENABLE 0x20000000
1451#define VIVS_DE_BLOCK8_TRANSPARENCY_DFB_COLOR_KEY_MASK 0x80000000
1452
1453#define VIVS_DE_BLOCK8_CONTROL(i0) (0x00012c80 + 0x4*(i0))
1454#define VIVS_DE_BLOCK8_CONTROL__ESIZE 0x00000004
1455#define VIVS_DE_BLOCK8_CONTROL__LEN 0x00000008
1456#define VIVS_DE_BLOCK8_CONTROL_YUV__MASK 0x00000001
1457#define VIVS_DE_BLOCK8_CONTROL_YUV__SHIFT 0
1458#define VIVS_DE_BLOCK8_CONTROL_YUV_601 0x00000000
1459#define VIVS_DE_BLOCK8_CONTROL_YUV_709 0x00000001
1460#define VIVS_DE_BLOCK8_CONTROL_YUV_MASK 0x00000008
1461#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE__MASK 0x00000010
1462#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE__SHIFT 4
1463#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_UV 0x00000000
1464#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_VU 0x00000010
1465#define VIVS_DE_BLOCK8_CONTROL_UV_SWIZZLE_MASK 0x00000080
1466#define VIVS_DE_BLOCK8_CONTROL_YUVRGB__MASK 0x00000100
1467#define VIVS_DE_BLOCK8_CONTROL_YUVRGB__SHIFT 8
1468#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_DISABLE 0x00000000
1469#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_ENABLE 0x00000100
1470#define VIVS_DE_BLOCK8_CONTROL_YUVRGB_MASK 0x00000800
1471
1472#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH(i0) (0x00012ca0 + 0x4*(i0))
1473#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH__ESIZE 0x00000004
1474#define VIVS_DE_BLOCK8_SRC_COLOR_KEY_HIGH__LEN 0x00000008
1475
1476#define VIVS_DE_BLOCK8_SRC_EX_CONFIG(i0) (0x00012cc0 + 0x4*(i0))
1477#define VIVS_DE_BLOCK8_SRC_EX_CONFIG__ESIZE 0x00000004
1478#define VIVS_DE_BLOCK8_SRC_EX_CONFIG__LEN 0x00000008
1479#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED__MASK 0x00000001
1480#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED__SHIFT 0
1481#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_DISABLE 0x00000000
1482#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MULTI_TILED_ENABLE 0x00000001
1483#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED__MASK 0x00000008
1484#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED__SHIFT 3
1485#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_DISABLE 0x00000000
1486#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_SUPER_TILED_ENABLE 0x00000008
1487#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED__MASK 0x00000100
1488#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED__SHIFT 8
1489#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_DISABLE 0x00000000
1490#define VIVS_DE_BLOCK8_SRC_EX_CONFIG_MINOR_TILED_ENABLE 0x00000100
1491
1492#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS(i0) (0x00012ce0 + 0x4*(i0))
1493#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS__ESIZE 0x00000004
1494#define VIVS_DE_BLOCK8_SRC_EX_ADDRESS__LEN 0x00000008
1495
1496
1497#endif /* STATE_2D_XML */
diff --git a/tests/etnaviv/write_bmp.c b/tests/etnaviv/write_bmp.c
new file mode 100644
index 00000000..7ae0646c
--- /dev/null
+++ b/tests/etnaviv/write_bmp.c
@@ -0,0 +1,151 @@
1/*
2 * Copyright 2011 Luc Verhaegen <libv@codethink.co.uk>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24/*
25 * Quick 'n Dirty bitmap dumper.
26 */
27#include <stdio.h>
28#include <unistd.h>
29#include <sys/types.h>
30#include <sys/stat.h>
31#include <fcntl.h>
32#include <string.h>
33#include <errno.h>
34
35#include "write_bmp.h"
36
37#define FILENAME_SIZE 1024
38
39struct bmp_header {
40 unsigned short magic;
41 unsigned int size;
42 unsigned int unused;
43 unsigned int start;
44} __attribute__((__packed__));
45
46struct dib_header {
47 unsigned int size;
48 unsigned int width;
49 unsigned int height;
50 unsigned short planes;
51 unsigned short bpp;
52 unsigned int compression;
53 unsigned int data_size;
54 unsigned int h_res;
55 unsigned int v_res;
56 unsigned int colours;
57 unsigned int important_colours;
58 unsigned int red_mask;
59 unsigned int green_mask;
60 unsigned int blue_mask;
61 unsigned int alpha_mask;
62 unsigned int colour_space;
63 unsigned int unused[12];
64} __attribute__((__packed__));
65
66static int
67bmp_header_write(int fd, int width, int height, int bgra, int noflip, int alpha)
68{
69 struct bmp_header bmp_header = {
70 .magic = 0x4d42,
71 .size = (width * height * 4) +
72 sizeof(struct bmp_header) + sizeof(struct dib_header),
73 .start = sizeof(struct bmp_header) + sizeof(struct dib_header),
74 };
75 struct dib_header dib_header = {
76 .size = sizeof(struct dib_header),
77 .width = width,
78 .height = noflip ? -height : height,
79 .planes = 1,
80 .bpp = 32,
81 .compression = 3,
82 .data_size = 4 * width * height,
83 .h_res = 0xB13,
84 .v_res = 0xB13,
85 .colours = 0,
86 .important_colours = 0,
87 .red_mask = 0x000000FF,
88 .green_mask = 0x0000FF00,
89 .blue_mask = 0x00FF0000,
90 .alpha_mask = alpha ? 0xFF000000 : 0x00000000,
91 .colour_space = 0x57696E20,
92 };
93
94 if (bgra) {
95 dib_header.red_mask = 0x00FF0000;
96 dib_header.blue_mask = 0x000000FF;
97 }
98
99 write(fd, &bmp_header, sizeof(struct bmp_header));
100 write(fd, &dib_header, sizeof(struct dib_header));
101
102 return 0;
103}
104
105void
106bmp_dump32(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename)
107{
108 int fd;
109
110 fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666);
111 if (fd == -1) {
112 printf("Failed to open %s: %s\n", filename, strerror(errno));
113 return;
114 }
115
116 bmp_header_write(fd, width, height, bgra, false, true);
117
118 write(fd, buffer, width * height * 4);
119}
120
121void
122bmp_dump32_noflip(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename)
123{
124 int fd;
125
126 fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666);
127 if (fd == -1) {
128 printf("Failed to open %s: %s\n", filename, strerror(errno));
129 return;
130 }
131
132 bmp_header_write(fd, width, height, bgra, true, true);
133
134 write(fd, buffer, width * height * 4);
135}
136
137void
138bmp_dump32_ex(char *buffer, unsigned width, unsigned height, bool flip, bool bgra, bool alpha, const char *filename)
139{
140 int fd;
141
142 fd = open(filename, O_WRONLY| O_TRUNC | O_CREAT, 0666);
143 if (fd == -1) {
144 printf("Failed to open %s: %s\n", filename, strerror(errno));
145 return;
146 }
147
148 bmp_header_write(fd, width, height, bgra, flip, alpha);
149
150 write(fd, buffer, width * height * 4);
151}
diff --git a/tests/etnaviv/write_bmp.h b/tests/etnaviv/write_bmp.h
new file mode 100644
index 00000000..667fa87c
--- /dev/null
+++ b/tests/etnaviv/write_bmp.h
@@ -0,0 +1,34 @@
1/*
2 * Copyright 2011 Luc Verhaegen <libv@codethink.co.uk>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 */
24#ifndef BMP_DUMP_H
25#define BMP_DUMP_H 1
26#include <stdbool.h>
27/* write 32-bit image (y axis upwards) */
28void bmp_dump32(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename);
29/* write 32-bit image (y axis downwards) */
30void bmp_dump32_noflip(char *buffer, unsigned width, unsigned height, bool bgra, const char *filename);
31/* write 32-bit image */
32void bmp_dump32_ex(char *buffer, unsigned width, unsigned height, bool flip, bool bgra, bool alpha, const char *filename);
33
34#endif /* BMP_DUMP_H */