diff options
-rw-r--r-- | amdgpu/amdgpu.h | 19 | ||||
-rw-r--r-- | amdgpu/amdgpu_bo.c | 35 |
2 files changed, 54 insertions, 0 deletions
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index dacffec0..32bf30e7 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h | |||
@@ -781,6 +781,25 @@ int amdgpu_bo_list_create(amdgpu_device_handle dev, | |||
781 | */ | 781 | */ |
782 | int amdgpu_bo_list_destroy(amdgpu_bo_list_handle handle); | 782 | int amdgpu_bo_list_destroy(amdgpu_bo_list_handle handle); |
783 | 783 | ||
784 | /** | ||
785 | * Update resources for existing BO list | ||
786 | * | ||
787 | * \param handle - \c [in] BO list handle | ||
788 | * \param number_of_resources - \c [in] Number of BOs in the list | ||
789 | * \param resources - \c [in] List of BO handles | ||
790 | * \param resource_prios - \c [in] Optional priority for each handle | ||
791 | * | ||
792 | * \return 0 on success\n | ||
793 | * >0 - AMD specific error code\n | ||
794 | * <0 - Negative POSIX Error code | ||
795 | * | ||
796 | * \sa amdgpu_bo_list_update() | ||
797 | */ | ||
798 | int amdgpu_bo_list_update(amdgpu_bo_list_handle handle, | ||
799 | uint32_t number_of_resources, | ||
800 | amdgpu_bo_handle *resources, | ||
801 | uint8_t *resource_prios); | ||
802 | |||
784 | /* | 803 | /* |
785 | * Special GPU Resources | 804 | * Special GPU Resources |
786 | * | 805 | * |
diff --git a/amdgpu/amdgpu_bo.c b/amdgpu/amdgpu_bo.c index 3dfaf62f..ec049557 100644 --- a/amdgpu/amdgpu_bo.c +++ b/amdgpu/amdgpu_bo.c | |||
@@ -715,3 +715,38 @@ int amdgpu_bo_list_destroy(amdgpu_bo_list_handle list) | |||
715 | 715 | ||
716 | return r; | 716 | return r; |
717 | } | 717 | } |
718 | |||
719 | int amdgpu_bo_list_update(amdgpu_bo_list_handle handle, | ||
720 | uint32_t number_of_resources, | ||
721 | amdgpu_bo_handle *resources, | ||
722 | uint8_t *resource_prios) | ||
723 | { | ||
724 | struct drm_amdgpu_bo_list_entry *list; | ||
725 | union drm_amdgpu_bo_list args; | ||
726 | unsigned i; | ||
727 | int r; | ||
728 | |||
729 | list = calloc(number_of_resources, sizeof(struct drm_amdgpu_bo_list_entry)); | ||
730 | if (list == NULL) | ||
731 | return -ENOMEM; | ||
732 | |||
733 | memset(&args, 0, sizeof(args)); | ||
734 | args.in.operation = AMDGPU_BO_LIST_OP_UPDATE; | ||
735 | args.in.list_handle = handle->handle; | ||
736 | args.in.bo_number = number_of_resources; | ||
737 | args.in.bo_info_size = sizeof(struct drm_amdgpu_bo_list_entry); | ||
738 | args.in.bo_info_ptr = (uintptr_t)list; | ||
739 | |||
740 | for (i = 0; i < number_of_resources; i++) { | ||
741 | list[i].bo_handle = resources[i]->handle; | ||
742 | if (resource_prios) | ||
743 | list[i].bo_priority = resource_prios[i]; | ||
744 | else | ||
745 | list[i].bo_priority = 0; | ||
746 | } | ||
747 | |||
748 | r = drmCommandWriteRead(handle->dev->fd, DRM_AMDGPU_BO_LIST, | ||
749 | &args, sizeof(args)); | ||
750 | free(list); | ||
751 | return r; | ||
752 | } | ||