diff options
Diffstat (limited to 'amdgpu/amdgpu.h')
-rw-r--r-- | amdgpu/amdgpu.h | 324 |
1 files changed, 322 insertions, 2 deletions
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index 7b26a04c..36f91058 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h | |||
@@ -37,6 +37,10 @@ | |||
37 | #include <stdint.h> | 37 | #include <stdint.h> |
38 | #include <stdbool.h> | 38 | #include <stdbool.h> |
39 | 39 | ||
40 | #ifdef __cplusplus | ||
41 | extern "C" { | ||
42 | #endif | ||
43 | |||
40 | struct drm_amdgpu_info_hw_ip; | 44 | struct drm_amdgpu_info_hw_ip; |
41 | 45 | ||
42 | /*--------------------------------------------------------------------------*/ | 46 | /*--------------------------------------------------------------------------*/ |
@@ -90,6 +94,10 @@ enum amdgpu_gpu_va_range | |||
90 | amdgpu_gpu_va_range_general = 0 | 94 | amdgpu_gpu_va_range_general = 0 |
91 | }; | 95 | }; |
92 | 96 | ||
97 | enum amdgpu_sw_info { | ||
98 | amdgpu_sw_info_address32_hi = 0, | ||
99 | }; | ||
100 | |||
93 | /*--------------------------------------------------------------------------*/ | 101 | /*--------------------------------------------------------------------------*/ |
94 | /* -------------------------- Datatypes ----------------------------------- */ | 102 | /* -------------------------- Datatypes ----------------------------------- */ |
95 | /*--------------------------------------------------------------------------*/ | 103 | /*--------------------------------------------------------------------------*/ |
@@ -794,8 +802,9 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle, | |||
794 | * context will always be executed in order (first come, first serve). | 802 | * context will always be executed in order (first come, first serve). |
795 | * | 803 | * |
796 | * | 804 | * |
797 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() | 805 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() |
798 | * \param context - \c [out] GPU Context handle | 806 | * \param priority - \c [in] Context creation flags. See AMDGPU_CTX_PRIORITY_* |
807 | * \param context - \c [out] GPU Context handle | ||
799 | * | 808 | * |
800 | * \return 0 on success\n | 809 | * \return 0 on success\n |
801 | * <0 - Negative POSIX Error code | 810 | * <0 - Negative POSIX Error code |
@@ -803,6 +812,18 @@ int amdgpu_bo_list_update(amdgpu_bo_list_handle handle, | |||
803 | * \sa amdgpu_cs_ctx_free() | 812 | * \sa amdgpu_cs_ctx_free() |
804 | * | 813 | * |
805 | */ | 814 | */ |
815 | int amdgpu_cs_ctx_create2(amdgpu_device_handle dev, | ||
816 | uint32_t priority, | ||
817 | amdgpu_context_handle *context); | ||
818 | /** | ||
819 | * Create GPU execution Context | ||
820 | * | ||
821 | * Refer to amdgpu_cs_ctx_create2 for full documentation. This call | ||
822 | * is missing the priority parameter. | ||
823 | * | ||
824 | * \sa amdgpu_cs_ctx_create2() | ||
825 | * | ||
826 | */ | ||
806 | int amdgpu_cs_ctx_create(amdgpu_device_handle dev, | 827 | int amdgpu_cs_ctx_create(amdgpu_device_handle dev, |
807 | amdgpu_context_handle *context); | 828 | amdgpu_context_handle *context); |
808 | 829 | ||
@@ -907,6 +928,29 @@ int amdgpu_cs_query_fence_status(struct amdgpu_cs_fence *fence, | |||
907 | uint64_t flags, | 928 | uint64_t flags, |
908 | uint32_t *expired); | 929 | uint32_t *expired); |
909 | 930 | ||
931 | /** | ||
932 | * Wait for multiple fences | ||
933 | * | ||
934 | * \param fences - \c [in] The fence array to wait | ||
935 | * \param fence_count - \c [in] The fence count | ||
936 | * \param wait_all - \c [in] If true, wait all fences to be signaled, | ||
937 | * otherwise, wait at least one fence | ||
938 | * \param timeout_ns - \c [in] The timeout to wait, in nanoseconds | ||
939 | * \param status - \c [out] '1' for signaled, '0' for timeout | ||
940 | * \param first - \c [out] the index of the first signaled fence from @fences | ||
941 | * | ||
942 | * \return 0 on success | ||
943 | * <0 - Negative POSIX Error code | ||
944 | * | ||
945 | * \note Currently it supports only one amdgpu_device. All fences come from | ||
946 | * the same amdgpu_device with the same fd. | ||
947 | */ | ||
948 | int amdgpu_cs_wait_fences(struct amdgpu_cs_fence *fences, | ||
949 | uint32_t fence_count, | ||
950 | bool wait_all, | ||
951 | uint64_t timeout_ns, | ||
952 | uint32_t *status, uint32_t *first); | ||
953 | |||
910 | /* | 954 | /* |
911 | * Query / Info API | 955 | * Query / Info API |
912 | * | 956 | * |
@@ -1046,6 +1090,23 @@ int amdgpu_query_info(amdgpu_device_handle dev, unsigned info_id, | |||
1046 | unsigned size, void *value); | 1090 | unsigned size, void *value); |
1047 | 1091 | ||
1048 | /** | 1092 | /** |
1093 | * Query hardware or driver information. | ||
1094 | * | ||
1095 | * The return size is query-specific and depends on the "info_id" parameter. | ||
1096 | * No more than "size" bytes is returned. | ||
1097 | * | ||
1098 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() | ||
1099 | * \param info - \c [in] amdgpu_sw_info_* | ||
1100 | * \param value - \c [out] Pointer to the return value. | ||
1101 | * | ||
1102 | * \return 0 on success\n | ||
1103 | * <0 - Negative POSIX error code | ||
1104 | * | ||
1105 | */ | ||
1106 | int amdgpu_query_sw_info(amdgpu_device_handle dev, enum amdgpu_sw_info info, | ||
1107 | void *value); | ||
1108 | |||
1109 | /** | ||
1049 | * Query information about GDS | 1110 | * Query information about GDS |
1050 | * | 1111 | * |
1051 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() | 1112 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() |
@@ -1059,6 +1120,24 @@ int amdgpu_query_gds_info(amdgpu_device_handle dev, | |||
1059 | struct amdgpu_gds_resource_info *gds_info); | 1120 | struct amdgpu_gds_resource_info *gds_info); |
1060 | 1121 | ||
1061 | /** | 1122 | /** |
1123 | * Query information about sensor. | ||
1124 | * | ||
1125 | * The return size is query-specific and depends on the "sensor_type" | ||
1126 | * parameter. No more than "size" bytes is returned. | ||
1127 | * | ||
1128 | * \param dev - \c [in] Device handle. See #amdgpu_device_initialize() | ||
1129 | * \param sensor_type - \c [in] AMDGPU_INFO_SENSOR_* | ||
1130 | * \param size - \c [in] Size of the returned value. | ||
1131 | * \param value - \c [out] Pointer to the return value. | ||
1132 | * | ||
1133 | * \return 0 on success\n | ||
1134 | * <0 - Negative POSIX Error code | ||
1135 | * | ||
1136 | */ | ||
1137 | int amdgpu_query_sensor_info(amdgpu_device_handle dev, unsigned sensor_type, | ||
1138 | unsigned size, void *value); | ||
1139 | |||
1140 | /** | ||
1062 | * Read a set of consecutive memory-mapped registers. | 1141 | * Read a set of consecutive memory-mapped registers. |
1063 | * Not all registers are allowed to be read by userspace. | 1142 | * Not all registers are allowed to be read by userspace. |
1064 | * | 1143 | * |
@@ -1083,6 +1162,7 @@ int amdgpu_read_mm_registers(amdgpu_device_handle dev, unsigned dword_offset, | |||
1083 | * Flag to request VA address range in the 32bit address space | 1162 | * Flag to request VA address range in the 32bit address space |
1084 | */ | 1163 | */ |
1085 | #define AMDGPU_VA_RANGE_32_BIT 0x1 | 1164 | #define AMDGPU_VA_RANGE_32_BIT 0x1 |
1165 | #define AMDGPU_VA_RANGE_HIGH 0x2 | ||
1086 | 1166 | ||
1087 | /** | 1167 | /** |
1088 | * Allocate virtual address range | 1168 | * Allocate virtual address range |
@@ -1186,6 +1266,34 @@ int amdgpu_bo_va_op(amdgpu_bo_handle bo, | |||
1186 | uint32_t ops); | 1266 | uint32_t ops); |
1187 | 1267 | ||
1188 | /** | 1268 | /** |
1269 | * VA mapping/unmapping for a buffer object or PRT region. | ||
1270 | * | ||
1271 | * This is not a simple drop-in extension for amdgpu_bo_va_op; instead, all | ||
1272 | * parameters are treated "raw", i.e. size is not automatically aligned, and | ||
1273 | * all flags must be specified explicitly. | ||
1274 | * | ||
1275 | * \param dev - \c [in] device handle | ||
1276 | * \param bo - \c [in] BO handle (may be NULL) | ||
1277 | * \param offset - \c [in] Start offset to map | ||
1278 | * \param size - \c [in] Size to map | ||
1279 | * \param addr - \c [in] Start virtual address. | ||
1280 | * \param flags - \c [in] Supported flags for mapping/unmapping | ||
1281 | * \param ops - \c [in] AMDGPU_VA_OP_MAP or AMDGPU_VA_OP_UNMAP | ||
1282 | * | ||
1283 | * \return 0 on success\n | ||
1284 | * <0 - Negative POSIX Error code | ||
1285 | * | ||
1286 | */ | ||
1287 | |||
1288 | int amdgpu_bo_va_op_raw(amdgpu_device_handle dev, | ||
1289 | amdgpu_bo_handle bo, | ||
1290 | uint64_t offset, | ||
1291 | uint64_t size, | ||
1292 | uint64_t addr, | ||
1293 | uint64_t flags, | ||
1294 | uint32_t ops); | ||
1295 | |||
1296 | /** | ||
1189 | * create semaphore | 1297 | * create semaphore |
1190 | * | 1298 | * |
1191 | * \param sem - \c [out] semaphore handle | 1299 | * \param sem - \c [out] semaphore handle |
@@ -1255,4 +1363,216 @@ int amdgpu_cs_destroy_semaphore(amdgpu_semaphore_handle sem); | |||
1255 | */ | 1363 | */ |
1256 | const char *amdgpu_get_marketing_name(amdgpu_device_handle dev); | 1364 | const char *amdgpu_get_marketing_name(amdgpu_device_handle dev); |
1257 | 1365 | ||
1366 | /** | ||
1367 | * Create kernel sync object | ||
1368 | * | ||
1369 | * \param dev - \c [in] device handle | ||
1370 | * \param flags - \c [in] flags that affect creation | ||
1371 | * \param syncobj - \c [out] sync object handle | ||
1372 | * | ||
1373 | * \return 0 on success\n | ||
1374 | * <0 - Negative POSIX Error code | ||
1375 | * | ||
1376 | */ | ||
1377 | int amdgpu_cs_create_syncobj2(amdgpu_device_handle dev, | ||
1378 | uint32_t flags, | ||
1379 | uint32_t *syncobj); | ||
1380 | |||
1381 | /** | ||
1382 | * Create kernel sync object | ||
1383 | * | ||
1384 | * \param dev - \c [in] device handle | ||
1385 | * \param syncobj - \c [out] sync object handle | ||
1386 | * | ||
1387 | * \return 0 on success\n | ||
1388 | * <0 - Negative POSIX Error code | ||
1389 | * | ||
1390 | */ | ||
1391 | int amdgpu_cs_create_syncobj(amdgpu_device_handle dev, | ||
1392 | uint32_t *syncobj); | ||
1393 | /** | ||
1394 | * Destroy kernel sync object | ||
1395 | * | ||
1396 | * \param dev - \c [in] device handle | ||
1397 | * \param syncobj - \c [in] sync object handle | ||
1398 | * | ||
1399 | * \return 0 on success\n | ||
1400 | * <0 - Negative POSIX Error code | ||
1401 | * | ||
1402 | */ | ||
1403 | int amdgpu_cs_destroy_syncobj(amdgpu_device_handle dev, | ||
1404 | uint32_t syncobj); | ||
1405 | |||
1406 | /** | ||
1407 | * Reset kernel sync objects to unsignalled state. | ||
1408 | * | ||
1409 | * \param dev - \c [in] device handle | ||
1410 | * \param syncobjs - \c [in] array of sync object handles | ||
1411 | * \param syncobj_count - \c [in] number of handles in syncobjs | ||
1412 | * | ||
1413 | * \return 0 on success\n | ||
1414 | * <0 - Negative POSIX Error code | ||
1415 | * | ||
1416 | */ | ||
1417 | int amdgpu_cs_syncobj_reset(amdgpu_device_handle dev, | ||
1418 | const uint32_t *syncobjs, uint32_t syncobj_count); | ||
1419 | |||
1420 | /** | ||
1421 | * Signal kernel sync objects. | ||
1422 | * | ||
1423 | * \param dev - \c [in] device handle | ||
1424 | * \param syncobjs - \c [in] array of sync object handles | ||
1425 | * \param syncobj_count - \c [in] number of handles in syncobjs | ||
1426 | * | ||
1427 | * \return 0 on success\n | ||
1428 | * <0 - Negative POSIX Error code | ||
1429 | * | ||
1430 | */ | ||
1431 | int amdgpu_cs_syncobj_signal(amdgpu_device_handle dev, | ||
1432 | const uint32_t *syncobjs, uint32_t syncobj_count); | ||
1433 | |||
1434 | /** | ||
1435 | * Wait for one or all sync objects to signal. | ||
1436 | * | ||
1437 | * \param dev - \c [in] self-explanatory | ||
1438 | * \param handles - \c [in] array of sync object handles | ||
1439 | * \param num_handles - \c [in] self-explanatory | ||
1440 | * \param timeout_nsec - \c [in] self-explanatory | ||
1441 | * \param flags - \c [in] a bitmask of DRM_SYNCOBJ_WAIT_FLAGS_* | ||
1442 | * \param first_signaled - \c [in] self-explanatory | ||
1443 | * | ||
1444 | * \return 0 on success\n | ||
1445 | * -ETIME - Timeout | ||
1446 | * <0 - Negative POSIX Error code | ||
1447 | * | ||
1448 | */ | ||
1449 | int amdgpu_cs_syncobj_wait(amdgpu_device_handle dev, | ||
1450 | uint32_t *handles, unsigned num_handles, | ||
1451 | int64_t timeout_nsec, unsigned flags, | ||
1452 | uint32_t *first_signaled); | ||
1453 | |||
1454 | /** | ||
1455 | * Export kernel sync object to shareable fd. | ||
1456 | * | ||
1457 | * \param dev - \c [in] device handle | ||
1458 | * \param syncobj - \c [in] sync object handle | ||
1459 | * \param shared_fd - \c [out] shared file descriptor. | ||
1460 | * | ||
1461 | * \return 0 on success\n | ||
1462 | * <0 - Negative POSIX Error code | ||
1463 | * | ||
1464 | */ | ||
1465 | int amdgpu_cs_export_syncobj(amdgpu_device_handle dev, | ||
1466 | uint32_t syncobj, | ||
1467 | int *shared_fd); | ||
1468 | /** | ||
1469 | * Import kernel sync object from shareable fd. | ||
1470 | * | ||
1471 | * \param dev - \c [in] device handle | ||
1472 | * \param shared_fd - \c [in] shared file descriptor. | ||
1473 | * \param syncobj - \c [out] sync object handle | ||
1474 | * | ||
1475 | * \return 0 on success\n | ||
1476 | * <0 - Negative POSIX Error code | ||
1477 | * | ||
1478 | */ | ||
1479 | int amdgpu_cs_import_syncobj(amdgpu_device_handle dev, | ||
1480 | int shared_fd, | ||
1481 | uint32_t *syncobj); | ||
1482 | |||
1483 | /** | ||
1484 | * Export kernel sync object to a sync_file. | ||
1485 | * | ||
1486 | * \param dev - \c [in] device handle | ||
1487 | * \param syncobj - \c [in] sync object handle | ||
1488 | * \param sync_file_fd - \c [out] sync_file file descriptor. | ||
1489 | * | ||
1490 | * \return 0 on success\n | ||
1491 | * <0 - Negative POSIX Error code | ||
1492 | * | ||
1493 | */ | ||
1494 | int amdgpu_cs_syncobj_export_sync_file(amdgpu_device_handle dev, | ||
1495 | uint32_t syncobj, | ||
1496 | int *sync_file_fd); | ||
1497 | |||
1498 | /** | ||
1499 | * Import kernel sync object from a sync_file. | ||
1500 | * | ||
1501 | * \param dev - \c [in] device handle | ||
1502 | * \param syncobj - \c [in] sync object handle | ||
1503 | * \param sync_file_fd - \c [in] sync_file file descriptor. | ||
1504 | * | ||
1505 | * \return 0 on success\n | ||
1506 | * <0 - Negative POSIX Error code | ||
1507 | * | ||
1508 | */ | ||
1509 | int amdgpu_cs_syncobj_import_sync_file(amdgpu_device_handle dev, | ||
1510 | uint32_t syncobj, | ||
1511 | int sync_file_fd); | ||
1512 | |||
1513 | /** | ||
1514 | * Export an amdgpu fence as a handle (syncobj or fd). | ||
1515 | * | ||
1516 | * \param what AMDGPU_FENCE_TO_HANDLE_GET_{SYNCOBJ, FD} | ||
1517 | * \param out_handle returned handle | ||
1518 | * | ||
1519 | * \return 0 on success\n | ||
1520 | * <0 - Negative POSIX Error code | ||
1521 | */ | ||
1522 | int amdgpu_cs_fence_to_handle(amdgpu_device_handle dev, | ||
1523 | struct amdgpu_cs_fence *fence, | ||
1524 | uint32_t what, | ||
1525 | uint32_t *out_handle); | ||
1526 | |||
1527 | /** | ||
1528 | * Submit raw command submission to kernel | ||
1529 | * | ||
1530 | * \param dev - \c [in] device handle | ||
1531 | * \param context - \c [in] context handle for context id | ||
1532 | * \param bo_list_handle - \c [in] request bo list handle (0 for none) | ||
1533 | * \param num_chunks - \c [in] number of CS chunks to submit | ||
1534 | * \param chunks - \c [in] array of CS chunks | ||
1535 | * \param seq_no - \c [out] output sequence number for submission. | ||
1536 | * | ||
1537 | * \return 0 on success\n | ||
1538 | * <0 - Negative POSIX Error code | ||
1539 | * | ||
1540 | */ | ||
1541 | struct drm_amdgpu_cs_chunk; | ||
1542 | struct drm_amdgpu_cs_chunk_dep; | ||
1543 | struct drm_amdgpu_cs_chunk_data; | ||
1544 | |||
1545 | int amdgpu_cs_submit_raw(amdgpu_device_handle dev, | ||
1546 | amdgpu_context_handle context, | ||
1547 | amdgpu_bo_list_handle bo_list_handle, | ||
1548 | int num_chunks, | ||
1549 | struct drm_amdgpu_cs_chunk *chunks, | ||
1550 | uint64_t *seq_no); | ||
1551 | |||
1552 | void amdgpu_cs_chunk_fence_to_dep(struct amdgpu_cs_fence *fence, | ||
1553 | struct drm_amdgpu_cs_chunk_dep *dep); | ||
1554 | void amdgpu_cs_chunk_fence_info_to_data(struct amdgpu_cs_fence_info *fence_info, | ||
1555 | struct drm_amdgpu_cs_chunk_data *data); | ||
1556 | |||
1557 | /** | ||
1558 | * Reserve VMID | ||
1559 | * \param context - \c [in] GPU Context | ||
1560 | * \param flags - \c [in] TBD | ||
1561 | * | ||
1562 | * \return 0 on success otherwise POSIX Error code | ||
1563 | */ | ||
1564 | int amdgpu_vm_reserve_vmid(amdgpu_device_handle dev, uint32_t flags); | ||
1565 | |||
1566 | /** | ||
1567 | * Free reserved VMID | ||
1568 | * \param context - \c [in] GPU Context | ||
1569 | * \param flags - \c [in] TBD | ||
1570 | * | ||
1571 | * \return 0 on success otherwise POSIX Error code | ||
1572 | */ | ||
1573 | int amdgpu_vm_unreserve_vmid(amdgpu_device_handle dev, uint32_t flags); | ||
1574 | |||
1575 | #ifdef __cplusplus | ||
1576 | } | ||
1577 | #endif | ||
1258 | #endif /* #ifdef _AMDGPU_H_ */ | 1578 | #endif /* #ifdef _AMDGPU_H_ */ |