diff options
author | Marek Olšák | 2015-05-29 12:13:41 -0500 |
---|---|---|
committer | Alex Deucher | 2015-08-05 12:47:50 -0500 |
commit | 194d5c2ee442b0f5020b33dd419f0b4d9e6b9001 (patch) | |
tree | 7002d9593cbbdad2bc9d0d914e1ecff9df6f9d02 | |
parent | 2a344a8d8a7af0b242b262866742c253cd55d334 (diff) | |
download | external-libgbm-194d5c2ee442b0f5020b33dd419f0b4d9e6b9001.tar.gz external-libgbm-194d5c2ee442b0f5020b33dd419f0b4d9e6b9001.tar.xz external-libgbm-194d5c2ee442b0f5020b33dd419f0b4d9e6b9001.zip |
amdgpu: remove amdgpu_ib
Not useful if we're gonna use BO handles directly.
Reviewed-by: Jammy Zhou <Jammy.Zhou@amd.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
-rw-r--r-- | amdgpu/amdgpu.h | 13 | ||||
-rw-r--r-- | amdgpu/amdgpu_cs.c | 72 | ||||
-rw-r--r-- | amdgpu/amdgpu_internal.h | 7 | ||||
-rw-r--r-- | tests/amdgpu/basic_tests.c | 12 | ||||
-rw-r--r-- | tests/amdgpu/cs_tests.c | 4 | ||||
-rw-r--r-- | tests/amdgpu/vce_tests.c | 4 |
6 files changed, 32 insertions, 80 deletions
diff --git a/amdgpu/amdgpu.h b/amdgpu/amdgpu.h index bef7bf58..cb30c0ae 100644 --- a/amdgpu/amdgpu.h +++ b/amdgpu/amdgpu.h | |||
@@ -125,13 +125,6 @@ typedef struct amdgpu_bo *amdgpu_bo_handle; | |||
125 | */ | 125 | */ |
126 | typedef struct amdgpu_bo_list *amdgpu_bo_list_handle; | 126 | typedef struct amdgpu_bo_list *amdgpu_bo_list_handle; |
127 | 127 | ||
128 | /** | ||
129 | * Define handle to be used when dealing with command | ||
130 | * buffers (a.k.a. ibs) | ||
131 | * | ||
132 | */ | ||
133 | typedef struct amdgpu_ib *amdgpu_ib_handle; | ||
134 | |||
135 | 128 | ||
136 | /*--------------------------------------------------------------------------*/ | 129 | /*--------------------------------------------------------------------------*/ |
137 | /* -------------------------- Structures ---------------------------------- */ | 130 | /* -------------------------- Structures ---------------------------------- */ |
@@ -305,7 +298,7 @@ struct amdgpu_gds_alloc_info { | |||
305 | */ | 298 | */ |
306 | struct amdgpu_cs_ib_alloc_result { | 299 | struct amdgpu_cs_ib_alloc_result { |
307 | /** IB allocation handle */ | 300 | /** IB allocation handle */ |
308 | amdgpu_ib_handle handle; | 301 | amdgpu_bo_handle handle; |
309 | 302 | ||
310 | /** Assigned GPU VM MC Address of command buffer */ | 303 | /** Assigned GPU VM MC Address of command buffer */ |
311 | uint64_t mc_address; | 304 | uint64_t mc_address; |
@@ -325,7 +318,7 @@ struct amdgpu_cs_ib_info { | |||
325 | uint64_t flags; | 318 | uint64_t flags; |
326 | 319 | ||
327 | /** Handle of command buffer */ | 320 | /** Handle of command buffer */ |
328 | amdgpu_ib_handle ib_handle; | 321 | amdgpu_bo_handle bo_handle; |
329 | 322 | ||
330 | /** | 323 | /** |
331 | * Size of Command Buffer to be submitted. | 324 | * Size of Command Buffer to be submitted. |
@@ -964,7 +957,7 @@ int amdgpu_cs_alloc_ib(amdgpu_context_handle context, | |||
964 | * \sa amdgpu_cs_alloc_ib() | 957 | * \sa amdgpu_cs_alloc_ib() |
965 | * | 958 | * |
966 | */ | 959 | */ |
967 | int amdgpu_cs_free_ib(amdgpu_ib_handle handle); | 960 | int amdgpu_cs_free_ib(amdgpu_bo_handle handle); |
968 | 961 | ||
969 | /** | 962 | /** |
970 | * Send request to submit command buffers to hardware. | 963 | * Send request to submit command buffers to hardware. |
diff --git a/amdgpu/amdgpu_cs.c b/amdgpu/amdgpu_cs.c index 326e3d32..1429f26b 100644 --- a/amdgpu/amdgpu_cs.c +++ b/amdgpu/amdgpu_cs.c | |||
@@ -42,17 +42,21 @@ | |||
42 | * | 42 | * |
43 | * \return 0 on success otherwise POSIX Error code | 43 | * \return 0 on success otherwise POSIX Error code |
44 | */ | 44 | */ |
45 | static int amdgpu_cs_create_ib(amdgpu_context_handle context, | 45 | int amdgpu_cs_alloc_ib(amdgpu_context_handle context, |
46 | enum amdgpu_cs_ib_size ib_size, | 46 | enum amdgpu_cs_ib_size ib_size, |
47 | amdgpu_ib_handle *ib) | 47 | struct amdgpu_cs_ib_alloc_result *output) |
48 | { | 48 | { |
49 | struct amdgpu_bo_alloc_request alloc_buffer; | 49 | struct amdgpu_bo_alloc_request alloc_buffer = {}; |
50 | struct amdgpu_bo_alloc_result info; | 50 | struct amdgpu_bo_alloc_result info; |
51 | int r; | 51 | int r; |
52 | void *cpu; | 52 | void *cpu; |
53 | struct amdgpu_ib *new_ib; | ||
54 | 53 | ||
55 | memset(&alloc_buffer, 0, sizeof(alloc_buffer)); | 54 | if (NULL == context) |
55 | return -EINVAL; | ||
56 | if (NULL == output) | ||
57 | return -EINVAL; | ||
58 | if (ib_size >= AMDGPU_CS_IB_SIZE_NUM) | ||
59 | return -EINVAL; | ||
56 | 60 | ||
57 | switch (ib_size) { | 61 | switch (ib_size) { |
58 | case amdgpu_cs_ib_size_4K: | 62 | case amdgpu_cs_ib_size_4K: |
@@ -89,18 +93,9 @@ static int amdgpu_cs_create_ib(amdgpu_context_handle context, | |||
89 | return r; | 93 | return r; |
90 | } | 94 | } |
91 | 95 | ||
92 | new_ib = malloc(sizeof(struct amdgpu_ib)); | 96 | output->handle = info.buf_handle; |
93 | if (NULL == new_ib) { | 97 | output->cpu = cpu; |
94 | amdgpu_bo_cpu_unmap(info.buf_handle); | 98 | output->mc_address = info.virtual_mc_base_address; |
95 | amdgpu_bo_free(info.buf_handle); | ||
96 | return -ENOMEM; | ||
97 | } | ||
98 | |||
99 | new_ib->context = context; | ||
100 | new_ib->buf_handle = info.buf_handle; | ||
101 | new_ib->cpu = cpu; | ||
102 | new_ib->virtual_mc_base_address = info.virtual_mc_base_address; | ||
103 | *ib = new_ib; | ||
104 | return 0; | 99 | return 0; |
105 | } | 100 | } |
106 | 101 | ||
@@ -111,47 +106,18 @@ static int amdgpu_cs_create_ib(amdgpu_context_handle context, | |||
111 | * | 106 | * |
112 | * \return 0 on success otherwise POSIX Error code | 107 | * \return 0 on success otherwise POSIX Error code |
113 | */ | 108 | */ |
114 | int amdgpu_cs_free_ib(amdgpu_ib_handle ib) | 109 | int amdgpu_cs_free_ib(amdgpu_bo_handle bo) |
115 | { | 110 | { |
116 | int r; | 111 | int r; |
117 | 112 | ||
118 | if (!ib) | 113 | if (!bo) |
119 | return -EINVAL; | 114 | return -EINVAL; |
120 | 115 | ||
121 | r = amdgpu_bo_cpu_unmap(ib->buf_handle); | 116 | r = amdgpu_bo_cpu_unmap(bo); |
122 | if (r) | 117 | if (r) |
123 | return r; | 118 | return r; |
124 | 119 | ||
125 | r = amdgpu_bo_free(ib->buf_handle); | 120 | return amdgpu_bo_free(bo); |
126 | if (r) | ||
127 | return r; | ||
128 | |||
129 | free(ib); | ||
130 | return 0; | ||
131 | } | ||
132 | |||
133 | int amdgpu_cs_alloc_ib(amdgpu_context_handle context, | ||
134 | enum amdgpu_cs_ib_size ib_size, | ||
135 | struct amdgpu_cs_ib_alloc_result *output) | ||
136 | { | ||
137 | int r; | ||
138 | amdgpu_ib_handle ib; | ||
139 | |||
140 | if (NULL == context) | ||
141 | return -EINVAL; | ||
142 | if (NULL == output) | ||
143 | return -EINVAL; | ||
144 | if (ib_size >= AMDGPU_CS_IB_SIZE_NUM) | ||
145 | return -EINVAL; | ||
146 | |||
147 | r = amdgpu_cs_create_ib(context, ib_size, &ib); | ||
148 | if (!r) { | ||
149 | output->handle = ib; | ||
150 | output->cpu = ib->cpu; | ||
151 | output->mc_address = ib->virtual_mc_base_address; | ||
152 | } | ||
153 | |||
154 | return r; | ||
155 | } | 121 | } |
156 | 122 | ||
157 | /** | 123 | /** |
@@ -346,8 +312,8 @@ static int amdgpu_cs_submit_one(amdgpu_context_handle context, | |||
346 | 312 | ||
347 | ib = &ibs_request->ibs[i]; | 313 | ib = &ibs_request->ibs[i]; |
348 | 314 | ||
349 | chunk_data[i].ib_data.handle = ib->ib_handle->buf_handle->handle; | 315 | chunk_data[i].ib_data.handle = ib->bo_handle->handle; |
350 | chunk_data[i].ib_data.va_start = ib->ib_handle->virtual_mc_base_address | 316 | chunk_data[i].ib_data.va_start = ib->bo_handle->virtual_mc_base_address |
351 | + ib->offset_dw * 4; | 317 | + ib->offset_dw * 4; |
352 | chunk_data[i].ib_data.ib_bytes = ib->size * 4; | 318 | chunk_data[i].ib_data.ib_bytes = ib->size * 4; |
353 | chunk_data[i].ib_data.ip_type = ibs_request->ip_type; | 319 | chunk_data[i].ib_data.ip_type = ibs_request->ip_type; |
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h index a4c29894..ee1cb61c 100644 --- a/amdgpu/amdgpu_internal.h +++ b/amdgpu/amdgpu_internal.h | |||
@@ -111,13 +111,6 @@ struct amdgpu_context { | |||
111 | uint32_t id; | 111 | uint32_t id; |
112 | }; | 112 | }; |
113 | 113 | ||
114 | struct amdgpu_ib { | ||
115 | amdgpu_context_handle context; | ||
116 | amdgpu_bo_handle buf_handle; | ||
117 | void *cpu; | ||
118 | uint64_t virtual_mc_base_address; | ||
119 | }; | ||
120 | |||
121 | /** | 114 | /** |
122 | * Functions. | 115 | * Functions. |
123 | */ | 116 | */ |
diff --git a/tests/amdgpu/basic_tests.c b/tests/amdgpu/basic_tests.c index 0ae25d6f..66847b5f 100644 --- a/tests/amdgpu/basic_tests.c +++ b/tests/amdgpu/basic_tests.c | |||
@@ -184,7 +184,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void) | |||
184 | ptr[1] = 0; | 184 | ptr[1] = 0; |
185 | ptr[2] = 0xc0008400; | 185 | ptr[2] = 0xc0008400; |
186 | ptr[3] = 1; | 186 | ptr[3] = 1; |
187 | ib_info[0].ib_handle = ib_result_ce.handle; | 187 | ib_info[0].bo_handle = ib_result_ce.handle; |
188 | ib_info[0].size = 4; | 188 | ib_info[0].size = 4; |
189 | ib_info[0].flags = AMDGPU_IB_FLAG_CE; | 189 | ib_info[0].flags = AMDGPU_IB_FLAG_CE; |
190 | 190 | ||
@@ -192,7 +192,7 @@ static void amdgpu_command_submission_gfx_separate_ibs(void) | |||
192 | ptr = ib_result.cpu; | 192 | ptr = ib_result.cpu; |
193 | ptr[0] = 0xc0008600; | 193 | ptr[0] = 0xc0008600; |
194 | ptr[1] = 0x00000001; | 194 | ptr[1] = 0x00000001; |
195 | ib_info[1].ib_handle = ib_result.handle; | 195 | ib_info[1].bo_handle = ib_result.handle; |
196 | ib_info[1].size = 2; | 196 | ib_info[1].size = 2; |
197 | 197 | ||
198 | ibs_request.ip_type = AMDGPU_HW_IP_GFX; | 198 | ibs_request.ip_type = AMDGPU_HW_IP_GFX; |
@@ -246,14 +246,14 @@ static void amdgpu_command_submission_gfx_shared_ib(void) | |||
246 | ptr[1] = 0; | 246 | ptr[1] = 0; |
247 | ptr[2] = 0xc0008400; | 247 | ptr[2] = 0xc0008400; |
248 | ptr[3] = 1; | 248 | ptr[3] = 1; |
249 | ib_info[0].ib_handle = ib_result.handle; | 249 | ib_info[0].bo_handle = ib_result.handle; |
250 | ib_info[0].size = 4; | 250 | ib_info[0].size = 4; |
251 | ib_info[0].flags = AMDGPU_IB_FLAG_CE; | 251 | ib_info[0].flags = AMDGPU_IB_FLAG_CE; |
252 | 252 | ||
253 | ptr = (uint32_t *)ib_result.cpu + 4; | 253 | ptr = (uint32_t *)ib_result.cpu + 4; |
254 | ptr[0] = 0xc0008600; | 254 | ptr[0] = 0xc0008600; |
255 | ptr[1] = 0x00000001; | 255 | ptr[1] = 0x00000001; |
256 | ib_info[1].ib_handle = ib_result.handle; | 256 | ib_info[1].bo_handle = ib_result.handle; |
257 | ib_info[1].size = 2; | 257 | ib_info[1].size = 2; |
258 | ib_info[1].offset_dw = 4; | 258 | ib_info[1].offset_dw = 4; |
259 | 259 | ||
@@ -312,7 +312,7 @@ static void amdgpu_command_submission_compute(void) | |||
312 | ptr[i] = 0xffff1000; | 312 | ptr[i] = 0xffff1000; |
313 | 313 | ||
314 | memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info)); | 314 | memset(&ib_info, 0, sizeof(struct amdgpu_cs_ib_info)); |
315 | ib_info.ib_handle = ib_result.handle; | 315 | ib_info.bo_handle = ib_result.handle; |
316 | ib_info.size = 16; | 316 | ib_info.size = 16; |
317 | 317 | ||
318 | memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request)); | 318 | memset(&ibs_request, 0, sizeof(struct amdgpu_cs_request)); |
@@ -375,7 +375,7 @@ static void amdgpu_sdma_test_exec_cs(amdgpu_context_handle context_handle, | |||
375 | ring_ptr = ib_result.cpu; | 375 | ring_ptr = ib_result.cpu; |
376 | memcpy(ring_ptr, pm4_src, pm4_dw * sizeof(*pm4_src)); | 376 | memcpy(ring_ptr, pm4_src, pm4_dw * sizeof(*pm4_src)); |
377 | 377 | ||
378 | ib_info->ib_handle = ib_result.handle; | 378 | ib_info->bo_handle = ib_result.handle; |
379 | ib_info->size = pm4_dw; | 379 | ib_info->size = pm4_dw; |
380 | 380 | ||
381 | ibs_request->ip_type = AMDGPU_HW_IP_DMA; | 381 | ibs_request->ip_type = AMDGPU_HW_IP_DMA; |
diff --git a/tests/amdgpu/cs_tests.c b/tests/amdgpu/cs_tests.c index 5fb11b18..81d5e58e 100644 --- a/tests/amdgpu/cs_tests.c +++ b/tests/amdgpu/cs_tests.c | |||
@@ -40,7 +40,7 @@ static uint32_t minor_version; | |||
40 | static uint32_t family_id; | 40 | static uint32_t family_id; |
41 | 41 | ||
42 | static amdgpu_context_handle context_handle; | 42 | static amdgpu_context_handle context_handle; |
43 | static amdgpu_ib_handle ib_handle; | 43 | static amdgpu_bo_handle ib_handle; |
44 | uint32_t *ib_cpu; | 44 | uint32_t *ib_cpu; |
45 | 45 | ||
46 | static amdgpu_bo_handle resources[MAX_RESOURCES]; | 46 | static amdgpu_bo_handle resources[MAX_RESOURCES]; |
@@ -111,7 +111,7 @@ static int submit(unsigned ndw, unsigned ip) | |||
111 | uint32_t expired; | 111 | uint32_t expired; |
112 | int r; | 112 | int r; |
113 | 113 | ||
114 | ib_info.ib_handle = ib_handle; | 114 | ib_info.bo_handle = ib_handle; |
115 | ib_info.size = ndw; | 115 | ib_info.size = ndw; |
116 | 116 | ||
117 | ibs_request.ip_type = ip; | 117 | ibs_request.ip_type = ip; |
diff --git a/tests/amdgpu/vce_tests.c b/tests/amdgpu/vce_tests.c index aaa29f6e..99aebc97 100644 --- a/tests/amdgpu/vce_tests.c +++ b/tests/amdgpu/vce_tests.c | |||
@@ -61,7 +61,7 @@ static uint32_t minor_version; | |||
61 | static uint32_t family_id; | 61 | static uint32_t family_id; |
62 | 62 | ||
63 | static amdgpu_context_handle context_handle; | 63 | static amdgpu_context_handle context_handle; |
64 | static amdgpu_ib_handle ib_handle; | 64 | static amdgpu_bo_handle ib_handle; |
65 | uint32_t *ib_cpu; | 65 | uint32_t *ib_cpu; |
66 | 66 | ||
67 | struct amdgpu_vce_encode enc; | 67 | struct amdgpu_vce_encode enc; |
@@ -135,7 +135,7 @@ static int submit(unsigned ndw, unsigned ip) | |||
135 | uint32_t expired; | 135 | uint32_t expired; |
136 | int r; | 136 | int r; |
137 | 137 | ||
138 | ib_info.ib_handle = ib_handle; | 138 | ib_info.bo_handle = ib_handle; |
139 | ib_info.size = ndw; | 139 | ib_info.size = ndw; |
140 | 140 | ||
141 | ibs_request.ip_type = ip; | 141 | ibs_request.ip_type = ip; |