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author | James Zhu | 2017-10-05 09:56:51 -0500 |
---|---|---|
committer | Leo Liu | 2017-10-06 08:40:06 -0500 |
commit | 657b09438bf4978c9597368165c56227013625e9 (patch) | |
tree | 6c1e57f3d5668c63f4cf1a35c425bfa80d4f5b5b | |
parent | 670db97dc39a7879f52bad230327edf4374b7516 (diff) | |
download | external-libgbm-657b09438bf4978c9597368165c56227013625e9.tar.gz external-libgbm-657b09438bf4978c9597368165c56227013625e9.tar.xz external-libgbm-657b09438bf4978c9597368165c56227013625e9.zip |
tests/amdgpu: add new uvd enc support check
Query hardware IP information to find out if there are uvd encode rings
ready for use in kernel driver.
Signed-off-by: James Zhu <James.Zhu@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
-rw-r--r-- | tests/amdgpu/uvd_enc_tests.c | 27 |
1 files changed, 21 insertions, 6 deletions
diff --git a/tests/amdgpu/uvd_enc_tests.c b/tests/amdgpu/uvd_enc_tests.c index 6c19f7b6..75181035 100644 --- a/tests/amdgpu/uvd_enc_tests.c +++ b/tests/amdgpu/uvd_enc_tests.c | |||
@@ -79,6 +79,8 @@ static void amdgpu_cs_uvd_enc_session_init(void); | |||
79 | static void amdgpu_cs_uvd_enc_encode(void); | 79 | static void amdgpu_cs_uvd_enc_encode(void); |
80 | static void amdgpu_cs_uvd_enc_destroy(void); | 80 | static void amdgpu_cs_uvd_enc_destroy(void); |
81 | 81 | ||
82 | static bool uvd_enc_support(void); | ||
83 | |||
82 | CU_TestInfo uvd_enc_tests[] = { | 84 | CU_TestInfo uvd_enc_tests[] = { |
83 | { "UVD ENC create", amdgpu_cs_uvd_enc_create }, | 85 | { "UVD ENC create", amdgpu_cs_uvd_enc_create }, |
84 | { "UVD ENC session init", amdgpu_cs_uvd_enc_session_init }, | 86 | { "UVD ENC session init", amdgpu_cs_uvd_enc_session_init }, |
@@ -98,7 +100,7 @@ int suite_uvd_enc_tests_init(void) | |||
98 | 100 | ||
99 | family_id = device_handle->info.family_id; | 101 | family_id = device_handle->info.family_id; |
100 | 102 | ||
101 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) { | 103 | if (!uvd_enc_support()) { |
102 | printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n"); | 104 | printf("\n\nThe ASIC NOT support UVD ENC, all sub-tests will pass\n"); |
103 | return CUE_SUCCESS; | 105 | return CUE_SUCCESS; |
104 | } | 106 | } |
@@ -121,7 +123,7 @@ int suite_uvd_enc_tests_clean(void) | |||
121 | { | 123 | { |
122 | int r; | 124 | int r; |
123 | 125 | ||
124 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) { | 126 | if (!uvd_enc_support()) { |
125 | 127 | ||
126 | r = amdgpu_device_deinitialize(device_handle); | 128 | r = amdgpu_device_deinitialize(device_handle); |
127 | if (r) | 129 | if (r) |
@@ -238,11 +240,24 @@ static void free_resource(struct amdgpu_uvd_enc_bo *uvd_enc_bo) | |||
238 | memset(uvd_enc_bo, 0, sizeof(*uvd_enc_bo)); | 240 | memset(uvd_enc_bo, 0, sizeof(*uvd_enc_bo)); |
239 | } | 241 | } |
240 | 242 | ||
243 | static bool uvd_enc_support(void) | ||
244 | { | ||
245 | int r; | ||
246 | struct drm_amdgpu_info_hw_ip info; | ||
247 | |||
248 | r = amdgpu_query_hw_ip_info(device_handle, AMDGPU_HW_IP_UVD_ENC, 0, &info); | ||
249 | |||
250 | if (r) | ||
251 | return false; | ||
252 | else | ||
253 | return (info.available_rings?true:false); | ||
254 | } | ||
255 | |||
241 | static void amdgpu_cs_uvd_enc_create(void) | 256 | static void amdgpu_cs_uvd_enc_create(void) |
242 | { | 257 | { |
243 | int len, r; | 258 | int len, r; |
244 | 259 | ||
245 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) | 260 | if (!uvd_enc_support()) |
246 | return; | 261 | return; |
247 | 262 | ||
248 | enc.width = 160; | 263 | enc.width = 160; |
@@ -281,7 +296,7 @@ static void amdgpu_cs_uvd_enc_session_init(void) | |||
281 | { | 296 | { |
282 | int len, r; | 297 | int len, r; |
283 | 298 | ||
284 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) | 299 | if (!uvd_enc_support()) |
285 | return; | 300 | return; |
286 | 301 | ||
287 | len = 0; | 302 | len = 0; |
@@ -339,7 +354,7 @@ static void amdgpu_cs_uvd_enc_encode(void) | |||
339 | vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5; | 354 | vbuf_size = ALIGN(enc.width, align) * ALIGN(enc.height, 16) * 1.5; |
340 | cpb_size = vbuf_size * 10; | 355 | cpb_size = vbuf_size * 10; |
341 | 356 | ||
342 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) | 357 | if (!uvd_enc_support()) |
343 | return; | 358 | return; |
344 | 359 | ||
345 | num_resources = 0; | 360 | num_resources = 0; |
@@ -472,7 +487,7 @@ static void amdgpu_cs_uvd_enc_destroy(void) | |||
472 | struct amdgpu_uvd_enc_bo sw_ctx; | 487 | struct amdgpu_uvd_enc_bo sw_ctx; |
473 | int len, r; | 488 | int len, r; |
474 | 489 | ||
475 | if (family_id < AMDGPU_FAMILY_AI || family_id >= AMDGPU_FAMILY_RV) | 490 | if (!uvd_enc_support()) |
476 | return; | 491 | return; |
477 | 492 | ||
478 | num_resources = 0; | 493 | num_resources = 0; |