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authorMichel Dänzer2017-11-30 11:28:01 -0600
committerMichel Dänzer2017-12-01 09:52:01 -0600
commit85c6b0b00ab894116880d2338776727ccff2d5c3 (patch)
treea4d8d3738b77fb3ab1edc1cf04294671cf97baff
parentbc21168fa924d3fc4a000492e861f50a1a135b25 (diff)
downloadexternal-libgbm-85c6b0b00ab894116880d2338776727ccff2d5c3.tar.gz
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amdgpu: Clean up amdgpu_parse_asic_ids error handling
* Move error message printing into amdgpu_parse_asic_ids and make it return void * Print only "Invalid format" error message if parse_one_line returns -EINVAL * Use strerror instead of printing the (negative) error code in hex Acked-by: Slava Abramov <slava.abramov@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--amdgpu/amdgpu_asic_id.c16
-rw-r--r--amdgpu/amdgpu_device.c6
-rw-r--r--amdgpu/amdgpu_internal.h2
3 files changed, 12 insertions, 12 deletions
diff --git a/amdgpu/amdgpu_asic_id.c b/amdgpu/amdgpu_asic_id.c
index e8218974..eb42bbc2 100644
--- a/amdgpu/amdgpu_asic_id.c
+++ b/amdgpu/amdgpu_asic_id.c
@@ -109,7 +109,7 @@ out:
109 return r; 109 return r;
110} 110}
111 111
112int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table) 112void amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
113{ 113{
114 struct amdgpu_asic_id *asic_id_table; 114 struct amdgpu_asic_id *asic_id_table;
115 struct amdgpu_asic_id *id; 115 struct amdgpu_asic_id *id;
@@ -126,7 +126,7 @@ int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
126 if (!fp) { 126 if (!fp) {
127 fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE, 127 fprintf(stderr, "%s: %s\n", AMDGPU_ASIC_ID_TABLE,
128 strerror(errno)); 128 strerror(errno));
129 return -EINVAL; 129 return;
130 } 130 }
131 131
132 asic_id_table = calloc(table_max_size + 1, 132 asic_id_table = calloc(table_max_size + 1,
@@ -177,8 +177,6 @@ int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
177 line_num++; 177 line_num++;
178 continue; 178 continue;
179 } 179 }
180 fprintf(stderr, "Invalid format: %s: line %d: %s\n",
181 AMDGPU_ASIC_ID_TABLE, line_num, line);
182 goto free; 180 goto free;
183 } 181 }
184 182
@@ -201,6 +199,14 @@ int amdgpu_parse_asic_ids(struct amdgpu_asic_id **p_asic_id_table)
201 memset(id, 0, sizeof(struct amdgpu_asic_id)); 199 memset(id, 0, sizeof(struct amdgpu_asic_id));
202 200
203free: 201free:
202 if (r == -EINVAL) {
203 fprintf(stderr, "Invalid format: %s: line %d: %s\n",
204 AMDGPU_ASIC_ID_TABLE, line_num, line);
205 } else if (r) {
206 fprintf(stderr, "%s: Cannot parse ASIC IDs: %s\n",
207 __func__, strerror(-r));
208 }
209
204 free(line); 210 free(line);
205 211
206 if (r && asic_id_table) { 212 if (r && asic_id_table) {
@@ -215,6 +221,4 @@ close:
215 fclose(fp); 221 fclose(fp);
216 222
217 *p_asic_id_table = asic_id_table; 223 *p_asic_id_table = asic_id_table;
218
219 return r;
220} 224}
diff --git a/amdgpu/amdgpu_device.c b/amdgpu/amdgpu_device.c
index 344e87ed..e7aaf4fc 100644
--- a/amdgpu/amdgpu_device.c
+++ b/amdgpu/amdgpu_device.c
@@ -280,11 +280,7 @@ int amdgpu_device_initialize(int fd,
280 amdgpu_vamgr_init(&dev->vamgr, start, max, 280 amdgpu_vamgr_init(&dev->vamgr, start, max,
281 dev->dev_info.virtual_address_alignment); 281 dev->dev_info.virtual_address_alignment);
282 282
283 r = amdgpu_parse_asic_ids(&dev->asic_ids); 283 amdgpu_parse_asic_ids(&dev->asic_ids);
284 if (r) {
285 fprintf(stderr, "%s: Cannot parse ASIC IDs, 0x%x.",
286 __func__, r);
287 }
288 284
289 *major_version = dev->major_version; 285 *major_version = dev->major_version;
290 *minor_version = dev->minor_version; 286 *minor_version = dev->minor_version;
diff --git a/amdgpu/amdgpu_internal.h b/amdgpu/amdgpu_internal.h
index e26e5190..1aff7f8e 100644
--- a/amdgpu/amdgpu_internal.h
+++ b/amdgpu/amdgpu_internal.h
@@ -148,7 +148,7 @@ drm_private void amdgpu_vamgr_init(struct amdgpu_bo_va_mgr *mgr, uint64_t start,
148 148
149drm_private void amdgpu_vamgr_deinit(struct amdgpu_bo_va_mgr *mgr); 149drm_private void amdgpu_vamgr_deinit(struct amdgpu_bo_va_mgr *mgr);
150 150
151drm_private int amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids); 151drm_private void amdgpu_parse_asic_ids(struct amdgpu_asic_id **asic_ids);
152 152
153drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev); 153drm_private int amdgpu_query_gpu_info_init(amdgpu_device_handle dev);
154 154