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authorIan Romanick2012-09-10 06:15:02 -0500
committerIan Romanick2013-11-07 21:14:31 -0600
commit6335e1d28c422050024bcf4100c4fb3a5bac2afb (patch)
treecd81da3155a27842f4f7d0996ce36b323dfdadc0 /include/drm/i915_drm.h
parentdad3c6b9791920f2bda1193d76f260827c4cd3f1 (diff)
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intel: Add support for GPU reset status query ioctl
I would have just used the drmIoctl interface directly in Mesa, but the ioctl needs some data from the drm_intel_context that is not exposed outside libdrm. v2: Update based on Mika's kernel work. v3: Fix compile failures from last-minute typos. Sigh. Signed-off-by: Ian Romanick <ian.d.romanick@intel.com> Reviewed-by: Kenneth Graunke <kenneth@whitecape.org> Cc: Mika Kuoppala <mika.kuoppala@intel.com> Cc: Daniel Vetter <daniel.vetter@ffwll.ch>
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r--include/drm/i915_drm.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index aa983f34..2703dede 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -198,6 +198,7 @@ typedef struct _drm_i915_sarea {
198#define DRM_I915_GEM_SET_CACHEING 0x2f 198#define DRM_I915_GEM_SET_CACHEING 0x2f
199#define DRM_I915_GEM_GET_CACHEING 0x30 199#define DRM_I915_GEM_GET_CACHEING 0x30
200#define DRM_I915_REG_READ 0x31 200#define DRM_I915_REG_READ 0x31
201#define DRM_I915_GET_RESET_STATS 0x32
201 202
202#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 203#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
203#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 204#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -247,6 +248,7 @@ typedef struct _drm_i915_sarea {
247#define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create) 248#define DRM_IOCTL_I915_GEM_CONTEXT_CREATE DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_CREATE, struct drm_i915_gem_context_create)
248#define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy) 249#define DRM_IOCTL_I915_GEM_CONTEXT_DESTROY DRM_IOW (DRM_COMMAND_BASE + DRM_I915_GEM_CONTEXT_DESTROY, struct drm_i915_gem_context_destroy)
249#define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read) 250#define DRM_IOCTL_I915_REG_READ DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_REG_READ, struct drm_i915_reg_read)
251#define DRM_IOCTL_I915_GET_RESET_STATS DRM_IOWR (DRM_COMMAND_BASE + DRM_I915_GET_RESET_STATS, struct drm_i915_reset_stats)
250 252
251/* Allow drivers to submit batchbuffers directly to hardware, relying 253/* Allow drivers to submit batchbuffers directly to hardware, relying
252 * on the security mechanisms provided by hardware. 254 * on the security mechanisms provided by hardware.
@@ -943,4 +945,19 @@ struct drm_i915_reg_read {
943 __u64 offset; 945 __u64 offset;
944 __u64 val; /* Return value */ 946 __u64 val; /* Return value */
945}; 947};
948
949struct drm_i915_reset_stats {
950 __u32 ctx_id;
951 __u32 flags;
952
953 /* For all contexts */
954 __u32 reset_count;
955
956 /* For this context */
957 __u32 batch_active;
958 __u32 batch_pending;
959
960 __u32 pad;
961};
962
946#endif /* _I915_DRM_H_ */ 963#endif /* _I915_DRM_H_ */