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authorJesse Barnes2012-01-09 12:22:33 -0600
committerJesse Barnes2012-01-09 12:22:33 -0600
commit66518ab5653cfdc840cd69e7b653ec05df060584 (patch)
tree14e4a1025ced903ffb3d52981eeee2bfca5254f8 /include/drm/i915_drm.h
parentadf1428915bfd0ee24758a3cbd56ce9b64f6eefb (diff)
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intel: add sprite ioctl defines and struct for i915 sprite code
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r--include/drm/i915_drm.h36
1 files changed, 36 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index 846897cf..de724964 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -189,6 +189,8 @@ typedef struct _drm_i915_sarea {
189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27 189#define DRM_I915_OVERLAY_PUT_IMAGE 0x27
190#define DRM_I915_OVERLAY_ATTRS 0x28 190#define DRM_I915_OVERLAY_ATTRS 0x28
191#define DRM_I915_GEM_EXECBUFFER2 0x29 191#define DRM_I915_GEM_EXECBUFFER2 0x29
192#define DRM_I915_GET_SPRITE_COLORKEY 0x2a
193#define DRM_I915_SET_SPRITE_COLORKEY 0x2b
192 194
193#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t) 195#define DRM_IOCTL_I915_INIT DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
194#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH) 196#define DRM_IOCTL_I915_FLUSH DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
@@ -230,6 +232,8 @@ typedef struct _drm_i915_sarea {
230#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise) 232#define DRM_IOCTL_I915_GEM_MADVISE DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GEM_MADVISE, struct drm_i915_gem_madvise)
231#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image) 233#define DRM_IOCTL_I915_OVERLAY_PUT_IMAGE DRM_IOW(DRM_COMMAND_BASE + DRM_I915_OVERLAY_PUT_IMAGE, struct drm_intel_overlay_put_image)
232#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs) 234#define DRM_IOCTL_I915_OVERLAY_ATTRS DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_OVERLAY_ATTRS, struct drm_intel_overlay_attrs)
235#define DRM_IOCTL_I915_SET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
236#define DRM_IOCTL_I915_GET_SPRITE_COLORKEY DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_SET_SPRITE_COLORKEY, struct drm_intel_sprite_colorkey)
233 237
234/* Allow drivers to submit batchbuffers directly to hardware, relying 238/* Allow drivers to submit batchbuffers directly to hardware, relying
235 * on the security mechanisms provided by hardware. 239 * on the security mechanisms provided by hardware.
@@ -839,4 +843,36 @@ struct drm_intel_overlay_attrs {
839 __u32 gamma5; 843 __u32 gamma5;
840}; 844};
841 845
846/*
847 * Intel sprite handling
848 *
849 * Color keying works with a min/mask/max tuple. Both source and destination
850 * color keying is allowed.
851 *
852 * Source keying:
853 * Sprite pixels within the min & max values, masked against the color channels
854 * specified in the mask field, will be transparent. All other pixels will
855 * be displayed on top of the primary plane. For RGB surfaces, only the min
856 * and mask fields will be used; ranged compares are not allowed.
857 *
858 * Destination keying:
859 * Primary plane pixels that match the min value, masked against the color
860 * channels specified in the mask field, will be replaced by corresponding
861 * pixels from the sprite plane.
862 *
863 * Note that source & destination keying are exclusive; only one can be
864 * active on a given plane.
865 */
866
867#define I915_SET_COLORKEY_NONE (1<<0) /* disable color key matching */
868#define I915_SET_COLORKEY_DESTINATION (1<<1)
869#define I915_SET_COLORKEY_SOURCE (1<<2)
870struct drm_intel_sprite_colorkey {
871 __u32 plane_id;
872 __u32 min_value;
873 __u32 channel_mask;
874 __u32 max_value;
875 __u32 flags;
876};
877
842#endif /* _I915_DRM_H_ */ 878#endif /* _I915_DRM_H_ */