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authorYang Rong2016-08-02 02:50:34 -0500
committerChris Wilson2016-09-07 07:50:23 -0500
commit98887140e343493f01be7a1dec721c024bcf72c7 (patch)
tree1527e4ad88154c9225ddcd848736dd57ec0fba67 /include/drm/i915_drm.h
parenta625ba8d2d4da33bd6d7bb057d2bdf7cb484fd6c (diff)
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intel: Export pooled EU and min no. of eus in a pool.
Update kernel interface with new I915_GETPARAM ioctl entries for pooled EU and min no. of eus in a pool. Add a wrapping function for each parameter. Userspace drivers need these values when decide the thread count. This kernel enabled pooled eu by default for BXT and for fused down 2x6 parts it is advised to turn it off. But there is another HW issue in these parts (fused down 2x6 parts) before C0 that requires Pooled EU to be enabled as a workaround. In this case the pool configuration changes depending upon which subslice is disabled and the no. of eus in a pool is different, So userspace need to know min no. of eus in a pool. V2: use return value as the query results. ret < 0 when error, ret = 0 when not support, and ret > 0 indicate query results.(Chris) V3: Correct V2 errors. Signed-off-by: Yang Rong <rong.r.yang@intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Diffstat (limited to 'include/drm/i915_drm.h')
-rw-r--r--include/drm/i915_drm.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/drm/i915_drm.h b/include/drm/i915_drm.h
index c4ce6b2c..eb611a7a 100644
--- a/include/drm/i915_drm.h
+++ b/include/drm/i915_drm.h
@@ -357,6 +357,8 @@ typedef struct drm_i915_irq_wait {
357#define I915_PARAM_HAS_GPU_RESET 35 357#define I915_PARAM_HAS_GPU_RESET 35
358#define I915_PARAM_HAS_RESOURCE_STREAMER 36 358#define I915_PARAM_HAS_RESOURCE_STREAMER 36
359#define I915_PARAM_HAS_EXEC_SOFTPIN 37 359#define I915_PARAM_HAS_EXEC_SOFTPIN 37
360#define I915_PARAM_HAS_POOLED_EU 38
361#define I915_PARAM_MIN_EU_IN_POOL 39
360 362
361typedef struct drm_i915_getparam { 363typedef struct drm_i915_getparam {
362 __s32 param; 364 __s32 param;