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authorAndreas Boll2016-07-22 04:45:36 -0500
committerAndreas Boll2016-07-23 02:45:53 -0500
commit9af2ccdef3428ade565d8213803a9dd094427f26 (patch)
tree92588cb82fd7a54a75d9af9870e1587c6b703060 /include
parenta5446775f27b52c120c75b8f82656aa64f93319d (diff)
downloadexternal-libgbm-9af2ccdef3428ade565d8213803a9dd094427f26.tar.gz
external-libgbm-9af2ccdef3428ade565d8213803a9dd094427f26.tar.xz
external-libgbm-9af2ccdef3428ade565d8213803a9dd094427f26.zip
virtgpu: Update kernel header
Generated using make headers_install. This brings the C++ guard, proper include path for drm.h and the switching to kernel types for fixed-with integers. Generated from drm-next commit c11dea5b0290984fa48111957ba3fdc5b3bdae5a Suggested-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Andreas Boll <andreas.boll.dev@gmail.com> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com>
Diffstat (limited to 'include')
-rw-r--r--include/drm/virtgpu_drm.h109
1 files changed, 58 insertions, 51 deletions
diff --git a/include/drm/virtgpu_drm.h b/include/drm/virtgpu_drm.h
index abf11c58..91a31ffe 100644
--- a/include/drm/virtgpu_drm.h
+++ b/include/drm/virtgpu_drm.h
@@ -24,13 +24,16 @@
24#ifndef VIRTGPU_DRM_H 24#ifndef VIRTGPU_DRM_H
25#define VIRTGPU_DRM_H 25#define VIRTGPU_DRM_H
26 26
27#include <stddef.h> 27#include "drm.h"
28#include "drm/drm.h" 28
29#if defined(__cplusplus)
30extern "C" {
31#endif
29 32
30/* Please note that modifications to all structs defined here are 33/* Please note that modifications to all structs defined here are
31 * subject to backwards-compatibility constraints. 34 * subject to backwards-compatibility constraints.
32 * 35 *
33 * Do not use pointers, use uint64_t instead for 32 bit / 64 bit user/kernel 36 * Do not use pointers, use __u64 instead for 32 bit / 64 bit user/kernel
34 * compatibility Keep fields aligned to their size 37 * compatibility Keep fields aligned to their size
35 */ 38 */
36 39
@@ -45,88 +48,88 @@
45#define DRM_VIRTGPU_GET_CAPS 0x09 48#define DRM_VIRTGPU_GET_CAPS 0x09
46 49
47struct drm_virtgpu_map { 50struct drm_virtgpu_map {
48 uint64_t offset; /* use for mmap system call */ 51 __u64 offset; /* use for mmap system call */
49 uint32_t handle; 52 __u32 handle;
50 uint32_t pad; 53 __u32 pad;
51}; 54};
52 55
53struct drm_virtgpu_execbuffer { 56struct drm_virtgpu_execbuffer {
54 uint32_t flags; /* for future use */ 57 __u32 flags; /* for future use */
55 uint32_t size; 58 __u32 size;
56 uint64_t command; /* void* */ 59 __u64 command; /* void* */
57 uint64_t bo_handles; 60 __u64 bo_handles;
58 uint32_t num_bo_handles; 61 __u32 num_bo_handles;
59 uint32_t pad; 62 __u32 pad;
60}; 63};
61 64
62#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */ 65#define VIRTGPU_PARAM_3D_FEATURES 1 /* do we have 3D features in the hw */
63 66
64struct drm_virtgpu_getparam { 67struct drm_virtgpu_getparam {
65 uint64_t param; 68 __u64 param;
66 uint64_t value; 69 __u64 value;
67}; 70};
68 71
69/* NO_BO flags? NO resource flag? */ 72/* NO_BO flags? NO resource flag? */
70/* resource flag for y_0_top */ 73/* resource flag for y_0_top */
71struct drm_virtgpu_resource_create { 74struct drm_virtgpu_resource_create {
72 uint32_t target; 75 __u32 target;
73 uint32_t format; 76 __u32 format;
74 uint32_t bind; 77 __u32 bind;
75 uint32_t width; 78 __u32 width;
76 uint32_t height; 79 __u32 height;
77 uint32_t depth; 80 __u32 depth;
78 uint32_t array_size; 81 __u32 array_size;
79 uint32_t last_level; 82 __u32 last_level;
80 uint32_t nr_samples; 83 __u32 nr_samples;
81 uint32_t flags; 84 __u32 flags;
82 uint32_t bo_handle; /* if this is set - recreate a new resource attached to this bo ? */ 85 __u32 bo_handle; /* if this is set - recreate a new resource attached to this bo ? */
83 uint32_t res_handle; /* returned by kernel */ 86 __u32 res_handle; /* returned by kernel */
84 uint32_t size; /* validate transfer in the host */ 87 __u32 size; /* validate transfer in the host */
85 uint32_t stride; /* validate transfer in the host */ 88 __u32 stride; /* validate transfer in the host */
86}; 89};
87 90
88struct drm_virtgpu_resource_info { 91struct drm_virtgpu_resource_info {
89 uint32_t bo_handle; 92 __u32 bo_handle;
90 uint32_t res_handle; 93 __u32 res_handle;
91 uint32_t size; 94 __u32 size;
92 uint32_t stride; 95 __u32 stride;
93}; 96};
94 97
95struct drm_virtgpu_3d_box { 98struct drm_virtgpu_3d_box {
96 uint32_t x; 99 __u32 x;
97 uint32_t y; 100 __u32 y;
98 uint32_t z; 101 __u32 z;
99 uint32_t w; 102 __u32 w;
100 uint32_t h; 103 __u32 h;
101 uint32_t d; 104 __u32 d;
102}; 105};
103 106
104struct drm_virtgpu_3d_transfer_to_host { 107struct drm_virtgpu_3d_transfer_to_host {
105 uint32_t bo_handle; 108 __u32 bo_handle;
106 struct drm_virtgpu_3d_box box; 109 struct drm_virtgpu_3d_box box;
107 uint32_t level; 110 __u32 level;
108 uint32_t offset; 111 __u32 offset;
109}; 112};
110 113
111struct drm_virtgpu_3d_transfer_from_host { 114struct drm_virtgpu_3d_transfer_from_host {
112 uint32_t bo_handle; 115 __u32 bo_handle;
113 struct drm_virtgpu_3d_box box; 116 struct drm_virtgpu_3d_box box;
114 uint32_t level; 117 __u32 level;
115 uint32_t offset; 118 __u32 offset;
116}; 119};
117 120
118#define VIRTGPU_WAIT_NOWAIT 1 /* like it */ 121#define VIRTGPU_WAIT_NOWAIT 1 /* like it */
119struct drm_virtgpu_3d_wait { 122struct drm_virtgpu_3d_wait {
120 uint32_t handle; /* 0 is an invalid handle */ 123 __u32 handle; /* 0 is an invalid handle */
121 uint32_t flags; 124 __u32 flags;
122}; 125};
123 126
124struct drm_virtgpu_get_caps { 127struct drm_virtgpu_get_caps {
125 uint32_t cap_set_id; 128 __u32 cap_set_id;
126 uint32_t cap_set_ver; 129 __u32 cap_set_ver;
127 uint64_t addr; 130 __u64 addr;
128 uint32_t size; 131 __u32 size;
129 uint32_t pad; 132 __u32 pad;
130}; 133};
131 134
132#define DRM_IOCTL_VIRTGPU_MAP \ 135#define DRM_IOCTL_VIRTGPU_MAP \
@@ -164,4 +167,8 @@ struct drm_virtgpu_get_caps {
164 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \ 167 DRM_IOWR(DRM_COMMAND_BASE + DRM_VIRTGPU_GET_CAPS, \
165 struct drm_virtgpu_get_caps) 168 struct drm_virtgpu_get_caps)
166 169
170#if defined(__cplusplus)
171}
172#endif
173
167#endif 174#endif